From 92da06f999511ebf5f871ec40dffd3cb456be55f Mon Sep 17 00:00:00 2001 From: Scott Murray Date: Mon, 4 Oct 2021 11:43:39 -0400 Subject: Updates for BSP v5.5.0 Changes: - Kernel patches updated for the 5.10.41 linux-renesas kernel, most changes are for the upstream rename of the non-engineering sample H3 from r8a7795 to r8a77951. - The kernel patches have been renamed to match git format-patch / devtool naming conventions to be a bit more consistent and hopefully simplify future updates. - To maintain consistency with the other rcar3 boards, as part of the kernel patch updates the reference hardware devicetree has been renamed to r8a77951-agl-refhw, which does result in a user visible change in the .dtb name. - The upstreamed, then reverted upstream patch to arm-trusted-firmware to disable FDT generation has been replaced with a simpler patch to just put "renesas,unknown" in the compatible string instead of panic-ing. This should be easier to carry forward. - Documentation updated for new branch & tag. Bug-AGL: SPEC-4103 Signed-off-by: Scott Murray Change-Id: I48b2cce5d55df3fff49e556821b27b8f516b98e1 --- README | 4 +- meta-agl-refhw-gen3/conf/machine/agl-refhw-h3.conf | 2 +- meta-agl-refhw-gen3/docs/ReferenceHW_Rcar_gen3.md | 6 +- .../arm-trusted-firmware_%.bbappend | 2 +- ...-rcar_gen3-plat-Delete-FDT-function-calls.patch | 145 -- ...-plat-Do-not-panic-on-unrecognized-boards.patch | 36 + .../files/0001-Add-support-for-TI-WL1837.patch | 233 ---- .../0001-Create-r8a7795-USB-OVC-pin-groups.patch | 416 ++++++ .../linux/files/0001-add-agl-refhw.patch | 1383 ------------------- ...0001-create-r8a7795-usb-ovc-pinmux-groups.patch | 411 ------ .../0002-Add-AGL-reference-hardware-support.patch | 1390 ++++++++++++++++++++ .../linux/files/0002-revert-e233201a.patch | 47 - .../files/0003-Add-support-for-TI-WL1837.patch | 240 ++++ .../linux/files/0003-rcar3-dw-hdmi-cec-mute.patch | 25 - .../0004-Mute-CEC-IRQ-in-dw-hdmi-driver-init.patch | 33 + .../recipes-kernel/linux/linux-renesas_%.bbappend | 9 +- 16 files changed, 2126 insertions(+), 2256 deletions(-) delete mode 100644 meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Delete-FDT-function-calls.patch create mode 100644 meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Do-not-panic-on-unrecognized-boards.patch delete mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Add-support-for-TI-WL1837.patch create mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Create-r8a7795-USB-OVC-pin-groups.patch delete mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-add-agl-refhw.patch delete mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-create-r8a7795-usb-ovc-pinmux-groups.patch create mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0002-Add-AGL-reference-hardware-support.patch delete mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0002-revert-e233201a.patch create mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-Add-support-for-TI-WL1837.patch delete mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-rcar3-dw-hdmi-cec-mute.patch create mode 100644 meta-agl-refhw-gen3/recipes-kernel/linux/files/0004-Mute-CEC-IRQ-in-dw-hdmi-driver-init.patch diff --git a/README b/README index 0f4d00d..29d6040 100644 --- a/README +++ b/README @@ -16,8 +16,8 @@ This layer depends on: branch: dunfell URI: https://github.com/renesas-rcar/meta-renesas - branch: dunfell-dev - - Note that the dunfell-Yocto-v4.7.0 tag is currently the latest revision + branch: dunfell + - Note that the Renesas-Yocto-v5.5.0 tag is currently the latest revision verified as compatible, it is recommended that it be used. diff --git a/meta-agl-refhw-gen3/conf/machine/agl-refhw-h3.conf b/meta-agl-refhw-gen3/conf/machine/agl-refhw-h3.conf index f302d45..97c4854 100644 --- a/meta-agl-refhw-gen3/conf/machine/agl-refhw-h3.conf +++ b/meta-agl-refhw-gen3/conf/machine/agl-refhw-h3.conf @@ -13,4 +13,4 @@ MACHINEOVERRIDES_append = ":salvator-x" # Reference hardware has USB3 MACHINE_FEATURES_append = " usb3" -KERNEL_DEVICETREE_append = " renesas/r8a7795-agl-refhw.dtb" +KERNEL_DEVICETREE_append = " renesas/r8a77951-agl-refhw.dtb" diff --git a/meta-agl-refhw-gen3/docs/ReferenceHW_Rcar_gen3.md b/meta-agl-refhw-gen3/docs/ReferenceHW_Rcar_gen3.md index 0e60a22..dcaab5b 100644 --- a/meta-agl-refhw-gen3/docs/ReferenceHW_Rcar_gen3.md +++ b/meta-agl-refhw-gen3/docs/ReferenceHW_Rcar_gen3.md @@ -141,7 +141,7 @@ download. | cert_header_sa6-agl-refhw-4x2g.srec | 1 | H'000180 | H'E6320000 | Certification | bl31-agl-refhw-4x2g.srec | 1 | H'000200 | H'44000000 | bl3 loader | tee-h3ulcb.srec | 1 | H'001000 | H'44100000 | OP-Tee - | u-boot-elf-agl-refhw-4x2g.srec | 2 | H'000000 | H'50000000 | U-boot + | u-boot-elf-agl-refhw.srec | 2 | H'000000 | H'50000000 | U-boot If the firmware has been built using a standalone build outside of AGL (see [below](#standalone-build)), then the firmware files can be be found in @@ -154,7 +154,7 @@ download. | cert_header_sa6-4x2g.srec | 1 | H'000180 | H'E6320000 | Certification | bl31-agl-refhw-h3-4x2g.srec | 1 | H'000200 | H'44000000 | bl3 loader | tee-agl-refhw-h3.srec | 1 | H'001000 | H'44100000 | OP-Tee - | u-boot-elf-salvator-xs-4x2g.srec | 2 | H'000000 | H'50000000 | U-boot + | u-boot-elf-salvator-x.srec | 2 | H'000000 | H'50000000 | U-boot The firmware files can be flashed by using **EM_W** command for each of them: @@ -216,7 +216,7 @@ BSP layer on top of the meta-rcar-gen3 layer in meta-renesas. ``` git clone https://github.com/renesas-rcar/meta-renesas cd meta-renesas - git checkout dunfell-dev-4.14 + git checkout Renesas-Yocto-v5.5.0 cd .. git clone git://git.openembedded.org/meta-openembedded cd meta-openembedded diff --git a/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend b/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend index 038e0a4..b02096f 100644 --- a/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend +++ b/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend @@ -1,6 +1,6 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/files:" -SRC_URI_append_rcar-gen3 = " file://0001-rcar_gen3-plat-Delete-FDT-function-calls.patch" +SRC_URI_append_rcar-gen3 = " file://0001-rcar_gen3-plat-Do-not-panic-on-unrecognized-boards.patch" # Apply the patch AGL applies for all rcar3 in meta-agl-bsp when # building the standalone agl-refhw-h3 machine. diff --git a/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Delete-FDT-function-calls.patch b/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Delete-FDT-function-calls.patch deleted file mode 100644 index 067bbb2..0000000 --- a/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Delete-FDT-function-calls.patch +++ /dev/null @@ -1,145 +0,0 @@ -From a8e6139af9a307cc30d2e804819da963e419f017 Mon Sep 17 00:00:00 2001 -From: Toshiyuki Ogasahara -Date: Tue, 15 Dec 2020 18:23:32 +0900 -Subject: [PATCH] rcar_gen3: plat: Delete FDT function calls - -Since U-boot configures the device tree, the FDT function call by -BL31 is removed. - -Signed-off-by: Toshiyuki Ogasahara -Signed-off-by: Yoshifumi Hosoya ---- - plat/renesas/rcar/bl2_plat_setup.c | 27 +++++++++++++++++++-------- - 1 file changed, 19 insertions(+), 8 deletions(-) - -diff --git a/plat/renesas/rcar/bl2_plat_setup.c b/plat/renesas/rcar/bl2_plat_setup.c -index 24a13c7f7..59a72b5bb 100644 ---- a/plat/renesas/rcar/bl2_plat_setup.c -+++ b/plat/renesas/rcar/bl2_plat_setup.c -@@ -110,6 +110,7 @@ static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); - - /* FDT with DRAM configuration */ - uint64_t fdt_blob[PAGE_SIZE_4KB / sizeof(uint64_t)]; -+#if 0 - static void *fdt = (void *)fdt_blob; - - static void unsigned_num_print(unsigned long long int unum, unsigned int radix, -@@ -133,7 +134,7 @@ static void unsigned_num_print(unsigned long long int unum, unsigned int radix, - while (--i >= 0) - *string++ = num_buf[i]; - } -- -+#endif - #if (RCAR_LOSSY_ENABLE == 1) - typedef struct bl2_lossy_info { - uint32_t magic; -@@ -145,6 +146,7 @@ static void bl2_lossy_gen_fdt(uint32_t no, uint64_t start_addr, - uint64_t end_addr, uint32_t format, - uint32_t enable, int fcnlnode) - { -+#if 0 - const uint64_t fcnlsize = cpu_to_fdt64(end_addr - start_addr); - char nodename[40] = { 0 }; - int ret, node; -@@ -199,6 +201,7 @@ static void bl2_lossy_gen_fdt(uint32_t no, uint64_t start_addr, - NOTICE("BL2: Cannot add FCNL formats prop (ret=%i)\n", ret); - panic(); - } -+#endif - } - - static void bl2_lossy_setting(uint32_t no, uint64_t start_addr, -@@ -449,6 +452,7 @@ struct meminfo *bl2_plat_sec_mem_layout(void) - return &bl2_tzram_layout; - } - -+#if 0 - static void bl2_populate_compatible_string(void *dt) - { - uint32_t board_type; -@@ -537,13 +541,17 @@ static void bl2_populate_compatible_string(void *dt) - panic(); - } - } -+#endif - - static void bl2_advertise_dram_entries(uint64_t dram_config[8]) - { -+#if 0 - char nodename[32] = { 0 }; -- uint64_t start, size; - uint64_t fdtsize; -- int ret, node, chan; -+ int ret, node; -+#endif -+ uint64_t start, size; -+ int chan; - - for (chan = 0; chan < 4; chan++) { - start = dram_config[2 * chan]; -@@ -556,7 +564,7 @@ static void bl2_advertise_dram_entries(uint64_t dram_config[8]) - (size >> 30) ? : size >> 20, - (size >> 30) ? "G" : "M"); - } -- -+#if 0 - /* - * We add the DT nodes in reverse order here. The fdt_add_subnode() - * adds the DT node before the first existing DT node, so we have -@@ -604,6 +612,7 @@ static void bl2_advertise_dram_entries(uint64_t dram_config[8]) - err: - NOTICE("BL2: Cannot add memory node to FDT (ret=%i)\n", ret); - panic(); -+#endif - } - - static void bl2_advertise_dram_size(uint32_t product) -@@ -927,7 +936,7 @@ lcm_state: - } - rcar_qos_init(); - } -- -+#if 0 - /* Set up FDT */ - ret = fdt_create_empty_tree(fdt, sizeof(fdt_blob)); - if (ret) { -@@ -937,7 +946,7 @@ lcm_state: - - /* Add platform compatible string */ - bl2_populate_compatible_string(fdt); -- -+#endif - /* Print DRAM layout */ - bl2_advertise_dram_size(product); - -@@ -989,14 +998,14 @@ lcm_state: - } - #if (RCAR_LOSSY_ENABLE == 1) - NOTICE("BL2: Lossy Decomp areas\n"); -- -+#if 0 - fcnlnode = fdt_add_subnode(fdt, 0, "reserved-memory"); - if (fcnlnode < 0) { - NOTICE("BL2: Cannot create reserved mem node (ret=%i)\n", - fcnlnode); - panic(); - } -- -+#endif - bl2_lossy_setting(0, LOSSY_ST_ADDR0, LOSSY_END_ADDR0, - LOSSY_FMT0, LOSSY_ENA_DIS0, fcnlnode); - bl2_lossy_setting(1, LOSSY_ST_ADDR1, LOSSY_END_ADDR1, -@@ -1005,8 +1014,10 @@ lcm_state: - LOSSY_FMT2, LOSSY_ENA_DIS2, fcnlnode); - #endif - -+#if 0 - fdt_pack(fdt); - NOTICE("BL2: FDT at %p\n", fdt); -+#endif - - if (boot_dev == MODEMR_BOOT_DEV_EMMC_25X1 || - boot_dev == MODEMR_BOOT_DEV_EMMC_50X8) --- -2.30.2 - diff --git a/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Do-not-panic-on-unrecognized-boards.patch b/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Do-not-panic-on-unrecognized-boards.patch new file mode 100644 index 0000000..4b51f37 --- /dev/null +++ b/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/files/0001-rcar_gen3-plat-Do-not-panic-on-unrecognized-boards.patch @@ -0,0 +1,36 @@ +From 61ffc5ec5ad1755d5d22b4386f8ad027bb59e1d5 Mon Sep 17 00:00:00 2001 +From: Scott Murray +Date: Tue, 5 Oct 2021 12:10:23 -0400 +Subject: [PATCH] rcar_gen3: plat: Do not panic on unrecognized boards + +Replace the panic in bl2_populate_compatible_string with just putting +"unknown" into the compatible string for the FDT. This allows us to +boot on the AGL reference hardware where the board type seems +unavailable. + +Upstream-Status: Inappropriate [board specific usecase] + +Signed-off-by: Scott Murray +--- + plat/renesas/rcar/bl2_plat_setup.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/plat/renesas/rcar/bl2_plat_setup.c b/plat/renesas/rcar/bl2_plat_setup.c +index bf077c483..7fcc75a13 100644 +--- a/plat/renesas/rcar/bl2_plat_setup.c ++++ b/plat/renesas/rcar/bl2_plat_setup.c +@@ -489,8 +489,9 @@ static void bl2_populate_compatible_string(void *dt) + "renesas,draak"); + break; + default: +- NOTICE("BL2: Cannot set compatible string, board unsupported\n"); +- panic(); ++ ret = fdt_setprop_string(dt, 0, "compatible", ++ "renesas,unknown"); ++ break; + } + + if (ret < 0) { +-- +2.31.1 + diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Add-support-for-TI-WL1837.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Add-support-for-TI-WL1837.patch deleted file mode 100644 index cfd1276..0000000 --- a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Add-support-for-TI-WL1837.patch +++ /dev/null @@ -1,233 +0,0 @@ -Add support for TI WL1837 - -This patch adds description of TI WL1837 and links interfaces -to communicate with the IC. - -Signed-off-by: ito.yoshiki001 - -Reworked: -- WL1837 specific devicetree configuration moved to the board - specific r8a7795-agl-refhw.dts from agl-refhw-common.dtsi. -- Switched to HCI_LL driver for BT support to match other upstream - users and prepare for btwilink driver going away (dropped in 5.5 - upstream). -- WLAN_PWR_EN enabling moved to GPIO initialization to work around - BT initialization problems. -- Update sound configuration to enable WL1837 BT audio, and disable - the HDMI1 audio left over from the original Salvator-X devicetree. - The latter is clean up, as HDMI1 as defined uses a SSI that - conflicts with the ak4613 configuration. - -Signed-off-by: Scott Murray ---- - arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi | 37 +++++++--- - arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts | 84 ++++++++++++++++++----- - 2 files changed, 94 insertions(+), 27 deletions(-) - -diff --git a/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi -index 796ac4c078e0..6f34b54c6ce1 100644 ---- a/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi -+++ b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi -@@ -183,6 +183,18 @@ - 1800000 0>; - }; - -+ wlan_en: regulator-wlan_en { -+ compatible = "regulator-fixed"; -+ -+ regulator-name = "wlan-en-regulator"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ gpio = <&gpio7 2 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <70000>; -+ enable-active-high; -+ }; -+ - hdmi0-out { - compatible = "hdmi-connector"; - label = "HDMI0 OUT"; -@@ -672,7 +684,8 @@ - }; - - sound_pins: sound { -- groups = "ssi349_ctrl", "ssi3_data", "ssi4_data"; -+ groups = "ssi349_ctrl", "ssi3_data", "ssi4_data", -+ "ssi78_ctrl", "ssi7_data", "ssi8_data"; - function = "ssi"; - }; - -@@ -827,24 +840,28 @@ - }; - - &sdhi3 { -+ /* Default WLAN card configuration */ - pinctrl-0 = <&sdhi3_pins>; -- pinctrl-1 = <&sdhi3_pins_uhs>; -- pinctrl-names = "default", "state_uhs"; -+ pinctrl-names = "default"; - -- vmmc-supply = <&vcc_sdhi3>; -- vqmmc-supply = <&vccq_sdhi3>; -- cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; -- wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; -+ vmmc-supply = <&wlan_en>; - bus-width = <4>; -- sd-uhs-sdr50; -- sd-uhs-sdr104; -- status = "okay"; -+ no-1-8-v; -+ non-removable; -+ cap-power-off-card; -+ keep-power-in-suspend; -+ -+ /* leave disabled by default */ - }; - - &ssi4 { - shared-pin; - }; - -+&ssi8 { -+ shared-pin; -+}; -+ - &usb_extal_clk { - clock-frequency = <50000000>; - }; -diff --git a/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts b/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts -index 83638a6228c0..97cc6e08ee8f 100644 ---- a/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts -+++ b/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts -@@ -119,6 +119,23 @@ - }; - }; - -+ sound_wl18xx { -+ compatible = "audio-graph-card"; -+ label = "wl18xx"; -+ -+ dais = <&rsnd_port2>; -+ }; -+ -+ wl18xx_pcm { -+ compatible = "ti,wl18xx-pcm"; -+ status = "okay"; -+ -+ port { -+ wl18xx_endpoint: endpoint { -+ remote-endpoint = <&rsnd_for_wl18xx>; -+ }; -+ }; -+ }; - }; - - &adsp { -@@ -155,8 +172,14 @@ - - &sound_card { - dais = <&rsnd_port0 /* ak4613 */ -- &rsnd_port1 /* HDMI0 */ -- &rsnd_port2>; /* HDMI1 */ -+ &rsnd_port1>; /* HDMI0 */ -+}; -+ -+&hscif0 { -+ bluetooth { -+ compatible = "ti,wl1837-st"; -+ enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &hdmi0 { -@@ -192,12 +215,6 @@ - remote-endpoint = <&hdmi1_con>; - }; - }; -- port@2 { -- reg = <2>; -- dw_hdmi1_snd_in: endpoint { -- remote-endpoint = <&rsnd_endpoint2>; -- }; -- }; - }; - }; - -@@ -215,8 +232,11 @@ - }; - - &rcar_sound { -+ /* Multi DAI */ -+ #sound-dai-cells = <1>; -+ - ports { -- /* rsnd_port0 is on salvator-common */ -+ /* rsnd_port0 is in agl-refhw-common */ - rsnd_port1: port@1 { - reg = <1>; - rsnd_endpoint1: endpoint { -@@ -231,14 +251,15 @@ - }; - rsnd_port2: port@2 { - reg = <2>; -- rsnd_endpoint2: endpoint { -- remote-endpoint = <&dw_hdmi1_snd_in>; -+ rsnd_for_wl18xx: endpoint { -+ remote-endpoint = <&wl18xx_endpoint>; - -- dai-format = "i2s"; -- bitclock-master = <&rsnd_endpoint2>; -- frame-master = <&rsnd_endpoint2>; -+ simple-audio-card,format = "i2s"; -+ bitclock-master = <&wl18xx_endpoint>; -+ frame-master = <&wl18xx_endpoint>; - -- playback = <&ssi3>; -+ playback = <&ssi7>; -+ capture = <&ssi8>; - }; - }; - }; -@@ -373,11 +394,40 @@ - }; - - &sdhi3 { -- /delete-property/ wp-gpios; -- non-removable; -+ status = "okay"; -+ -+ max-frequency = <50000000>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ wlcore: wlcore@2 { -+ compatible = "ti,wl1837"; -+ reg = <2>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>; -+ }; - }; - - &gpio6 { -+ /* -+ * Enable WLAN_PWR_EN right from boot to get reliable BT -+ * initialization, as doing it at SDHI initialization -+ * does not seem to do so, no matter how much BT_EN is -+ * delayed. -+ * -+ * This is perhaps not ideal per the requirements described -+ * in the "Level Shifting WL18xx/WL18xxMOD/WL18xxQ I/Os" -+ * document (SWRA448A)[1], but the BT UART seems unusable -+ * otherwise. -+ * -+ * [1] https://www.ti.com/lit/an/swra448a/swra448a.pdf -+ */ -+ wlan-pwr-en { -+ gpio-hog; -+ gpios = <9 GPIO_ACTIVE_HIGH>; -+ output-high; -+ }; -+ - /* Enable the CAN 1 & 2 transceivers */ - can-1-transceiver-stb { - gpio-hog; diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Create-r8a7795-USB-OVC-pin-groups.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Create-r8a7795-USB-OVC-pin-groups.patch new file mode 100644 index 0000000..c2a63b5 --- /dev/null +++ b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-Create-r8a7795-USB-OVC-pin-groups.patch @@ -0,0 +1,416 @@ +From 931e6487ca7642f94721a07c1e7da2152bda3baf Mon Sep 17 00:00:00 2001 +From: Scott Murray +Date: Tue, 21 Sep 2021 15:31:36 -0400 +Subject: [PATCH 1/4] Create r8a7795 USB OVC pin groups + +Split the r8a7795 USB pin groups to create separate groups for the +OVC pins. This is required for the AGL reference hardware boards, +which use some of the OVC pins in other pinmux modes. + +Upstream-Status: pending + +Signed-off-by: Scott Murray +Signed-off-by: Raquel Medina +--- + .../boot/dts/renesas/r8a77950-salvator-x.dts | 2 +- + .../boot/dts/renesas/r8a77951-salvator-x.dts | 2 +- + .../boot/dts/renesas/r8a77951-salvator-xs.dts | 4 +- + .../boot/dts/renesas/salvator-common.dtsi | 6 +- + arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 2 +- + arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 +- + drivers/pinctrl/renesas/pfc-r8a77950.c | 75 +++++++++++++++---- + drivers/pinctrl/renesas/pfc-r8a77951.c | 75 +++++++++++++++---- + 8 files changed, 129 insertions(+), 39 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/r8a77950-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a77950-salvator-x.dts +index 1a1f2324dd6e..776082563a30 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77950-salvator-x.dts ++++ b/arch/arm64/boot/dts/renesas/r8a77950-salvator-x.dts +@@ -143,7 +143,7 @@ &ohci2 { + + &pfc { + usb2_pins: usb2 { +- groups = "usb2"; ++ groups = "usb2", "usb2_ovc"; + function = "usb2"; + }; + }; +diff --git a/arch/arm64/boot/dts/renesas/r8a77951-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a77951-salvator-x.dts +index ade33b2ee741..466b8b4f4fef 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77951-salvator-x.dts ++++ b/arch/arm64/boot/dts/renesas/r8a77951-salvator-x.dts +@@ -143,7 +143,7 @@ &ohci2 { + + &pfc { + usb2_pins: usb2 { +- groups = "usb2"; ++ groups = "usb2", "usb2_ovc"; + function = "usb2"; + }; + }; +diff --git a/arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dts +index aa1ff538a4b6..fb1f286e2cd2 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dts ++++ b/arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dts +@@ -167,7 +167,7 @@ pcie-sata-switch-hog { + + &pfc { + usb2_pins: usb2 { +- groups = "usb2"; ++ groups = "usb2", "usb2_ovc"; + function = "usb2"; + }; + +@@ -184,7 +184,7 @@ usb2_pins: usb2 { + * - Connect GP6_{04,21} to ADV7842. + */ + usb2_ch3_pins: usb2_ch3 { +- groups = "usb2_ch3"; ++ groups = "usb2_ch3", "usb2_ch3_ovc"; + function = "usb2_ch3"; + }; + }; +diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi +index 3cc16111ede3..f26902f8ae9a 100644 +--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi ++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi +@@ -773,13 +773,13 @@ sound_clk_pins: sound_clk { + }; + + usb0_pins: usb0 { +- groups = "usb0"; ++ groups = "usb0", "usb0_ovc"; + function = "usb0"; + }; + + usb1_pins: usb1 { + mux { +- groups = "usb1"; ++ groups = "usb1", "usb1_ovc"; + function = "usb1"; + }; + +@@ -795,7 +795,7 @@ pwen { + }; + + usb30_pins: usb30 { +- groups = "usb30"; ++ groups = "usb30", "usb30_ovc"; + function = "usb30"; + }; + }; +diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi +index 18867a494f85..6a74f21948da 100644 +--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi ++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi +@@ -1008,7 +1008,7 @@ sound_pcm_pins: sound-pcm { + }; + + usb0_pins: usb0 { +- groups = "usb0"; ++ groups = "usb0", "usb0_ovc"; + function = "usb0"; + }; + +diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi +index cf1ec42a662b..ad0f04d9ee67 100644 +--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi ++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi +@@ -376,7 +376,7 @@ sound_clk_pins: sound-clk { + }; + + usb1_pins: usb1 { +- groups = "usb1"; ++ groups = "usb1", "usb1_ovc"; + function = "usb1"; + }; + }; +diff --git a/drivers/pinctrl/renesas/pfc-r8a77950.c b/drivers/pinctrl/renesas/pfc-r8a77950.c +index fd884a0a3206..6d899897b3d2 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a77950.c ++++ b/drivers/pinctrl/renesas/pfc-r8a77950.c +@@ -3841,44 +3841,79 @@ static const unsigned int tpu_to3_mux[] = { + + /* - USB0 ------------------------------------------------------------------- */ + static const unsigned int usb0_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 24), + }; + static const unsigned int usb0_mux[] = { +- USB0_PWEN_MARK, USB0_OVC_MARK, ++ USB0_PWEN_MARK, ++}; ++static const unsigned int usb0_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 25), ++}; ++static const unsigned int usb0_ovc_mux[] = { ++ USB0_OVC_MARK, + }; + /* - USB1 ------------------------------------------------------------------- */ + static const unsigned int usb1_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 26), + }; + static const unsigned int usb1_mux[] = { +- USB1_PWEN_MARK, USB1_OVC_MARK, ++ USB1_PWEN_MARK, ++}; ++static const unsigned int usb1_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 27), ++}; ++static const unsigned int usb1_ovc_mux[] = { ++ USB1_OVC_MARK, + }; + /* - USB2 ------------------------------------------------------------------- */ + static const unsigned int usb2_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 14), + }; + static const unsigned int usb2_mux[] = { +- USB2_PWEN_MARK, USB2_OVC_MARK, ++ USB2_PWEN_MARK, ++}; ++static const unsigned int usb2_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 15), ++}; ++static const unsigned int usb2_ovc_mux[] = { ++ USB2_OVC_MARK, + }; + + /* - USB30 ------------------------------------------------------------------ */ + static const unsigned int usb30_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 28), + }; + static const unsigned int usb30_mux[] = { +- USB30_PWEN_MARK, USB30_OVC_MARK, ++ USB30_PWEN_MARK, ++}; ++static const unsigned int usb30_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 29), ++}; ++static const unsigned int usb30_ovc_mux[] = { ++ USB30_OVC_MARK, + }; + /* - USB31 ------------------------------------------------------------------ */ + static const unsigned int usb31_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 30), + }; + static const unsigned int usb31_mux[] = { +- USB31_PWEN_MARK, USB31_OVC_MARK, ++ USB31_PWEN_MARK, ++}; ++static const unsigned int usb31_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 31), ++}; ++static const unsigned int usb31_ovc_mux[] = { ++ USB31_OVC_MARK, + }; + + static const unsigned int vin4_data18_a_pins[] = { +@@ -4434,10 +4469,15 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(tpu_to2), + SH_PFC_PIN_GROUP(tpu_to3), + SH_PFC_PIN_GROUP(usb0), ++ SH_PFC_PIN_GROUP(usb0_ovc), + SH_PFC_PIN_GROUP(usb1), ++ SH_PFC_PIN_GROUP(usb1_ovc), + SH_PFC_PIN_GROUP(usb2), ++ SH_PFC_PIN_GROUP(usb2_ovc), + SH_PFC_PIN_GROUP(usb30), ++ SH_PFC_PIN_GROUP(usb30_ovc), + SH_PFC_PIN_GROUP(usb31), ++ SH_PFC_PIN_GROUP(usb31_ovc), + VIN_DATA_PIN_GROUP(vin4_data, 8, _a), + VIN_DATA_PIN_GROUP(vin4_data, 16, _a), + SH_PFC_PIN_GROUP(vin4_data18_a), +@@ -4936,22 +4976,27 @@ static const char * const tpu_groups[] = { + + static const char * const usb0_groups[] = { + "usb0", ++ "usb0_ovc", + }; + + static const char * const usb1_groups[] = { + "usb1", ++ "usb1_ovc", + }; + + static const char * const usb2_groups[] = { + "usb2", ++ "usb2_ovc", + }; + + static const char * const usb30_groups[] = { + "usb30", ++ "usb30_ovc", + }; + + static const char * const usb31_groups[] = { + "usb31", ++ "usb31_ovc", + }; + + static const char * const vin4_groups[] = { +diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c +index 36436907e215..523a2d7e5e48 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a77951.c ++++ b/drivers/pinctrl/renesas/pfc-r8a77951.c +@@ -3985,44 +3985,79 @@ static const unsigned int tpu_to3_mux[] = { + + /* - USB0 ------------------------------------------------------------------- */ + static const unsigned int usb0_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 24), + }; + static const unsigned int usb0_mux[] = { +- USB0_PWEN_MARK, USB0_OVC_MARK, ++ USB0_PWEN_MARK, ++}; ++static const unsigned int usb0_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 25), ++}; ++static const unsigned int usb0_ovc_mux[] = { ++ USB0_OVC_MARK, + }; + /* - USB1 ------------------------------------------------------------------- */ + static const unsigned int usb1_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 26), + }; + static const unsigned int usb1_mux[] = { +- USB1_PWEN_MARK, USB1_OVC_MARK, ++ USB1_PWEN_MARK, ++}; ++static const unsigned int usb1_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 27), ++}; ++static const unsigned int usb1_ovc_mux[] = { ++ USB1_OVC_MARK, + }; + /* - USB2 ------------------------------------------------------------------- */ + static const unsigned int usb2_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 14), + }; + static const unsigned int usb2_mux[] = { +- USB2_PWEN_MARK, USB2_OVC_MARK, ++ USB2_PWEN_MARK, ++}; ++static const unsigned int usb2_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 15), ++}; ++static const unsigned int usb2_ovc_mux[] = { ++ USB2_OVC_MARK, + }; + /* - USB2_CH3 --------------------------------------------------------------- */ + static const unsigned int usb2_ch3_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 30), + }; + static const unsigned int usb2_ch3_mux[] = { +- USB2_CH3_PWEN_MARK, USB2_CH3_OVC_MARK, ++ USB2_CH3_PWEN_MARK, ++}; ++static const unsigned int usb2_ch3_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 31), ++}; ++static const unsigned int usb2_ch3_ovc_mux[] = { ++ USB2_CH3_OVC_MARK, + }; + + /* - USB30 ------------------------------------------------------------------ */ + static const unsigned int usb30_pins[] = { +- /* PWEN, OVC */ +- RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), ++ /* PWEN */ ++ RCAR_GP_PIN(6, 28), + }; + static const unsigned int usb30_mux[] = { +- USB30_PWEN_MARK, USB30_OVC_MARK, ++ USB30_PWEN_MARK, ++}; ++static const unsigned int usb30_ovc_pins[] = { ++ /* OVC */ ++ RCAR_GP_PIN(6, 29), ++}; ++static const unsigned int usb30_ovc_mux[] = { ++ USB30_OVC_MARK, + }; + + /* - VIN4 ------------------------------------------------------------------- */ +@@ -4545,10 +4580,15 @@ static const struct { + SH_PFC_PIN_GROUP(tpu_to2), + SH_PFC_PIN_GROUP(tpu_to3), + SH_PFC_PIN_GROUP(usb0), ++ SH_PFC_PIN_GROUP(usb0_ovc), + SH_PFC_PIN_GROUP(usb1), ++ SH_PFC_PIN_GROUP(usb1_ovc), + SH_PFC_PIN_GROUP(usb2), ++ SH_PFC_PIN_GROUP(usb2_ovc), + SH_PFC_PIN_GROUP(usb2_ch3), ++ SH_PFC_PIN_GROUP(usb2_ch3_ovc), + SH_PFC_PIN_GROUP(usb30), ++ SH_PFC_PIN_GROUP(usb30_ovc), + VIN_DATA_PIN_GROUP(vin4_data, 8, _a), + VIN_DATA_PIN_GROUP(vin4_data, 10, _a), + VIN_DATA_PIN_GROUP(vin4_data, 12, _a), +@@ -5103,22 +5143,27 @@ static const char * const tpu_groups[] = { + + static const char * const usb0_groups[] = { + "usb0", ++ "usb0_ovc", + }; + + static const char * const usb1_groups[] = { + "usb1", ++ "usb1_ovc", + }; + + static const char * const usb2_groups[] = { + "usb2", ++ "usb2_ovc", + }; + + static const char * const usb2_ch3_groups[] = { + "usb2_ch3", ++ "usb2_ch3_ovc", + }; + + static const char * const usb30_groups[] = { + "usb30", ++ "usb30_ovc", + }; + + static const char * const vin4_groups[] = { +-- +2.31.1 + diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-add-agl-refhw.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-add-agl-refhw.patch deleted file mode 100644 index f9c9726..0000000 --- a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-add-agl-refhw.patch +++ /dev/null @@ -1,1383 +0,0 @@ -Add AGL reference hardware support - -Upstream-Status: pending - -Signed-off-by: Scott Murray -Signed-off-by: Raquel Medina -[asm330lhh interrupt fix] -Signed-off-by: Hiroyuki Ishii - ---- - arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi | 919 ++++++++++++++++++++++ - arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts | 392 +++++++++ - drivers/media/i2c/adv748x/adv748x-core.c | 24 +- - 3 files changed, 1334 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi -new file mode 100644 -index 000000000000..7474ed578c21 ---- /dev/null -+++ b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi -@@ -0,0 +1,919 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Device Tree Source for common parts of AGL Reference Hardware board variants -+ * -+ * Copyright (C) 2015-2017 Renesas Electronics Corp. -+ * Copyright (C) 2020 Konsulko Group -+ */ -+ -+/* -+ * This file is derived from salvator-common.dtsi -+ * -+ * It is currently unclear if the modifications made are such that they could -+ * be done on top of salvator-common.dtsi to allow removing the duplication. -+ * It is likely that the common pieces with salvator-common.dtsi would need to -+ * be factored out into a new common file, which is perhaps hard to justify. -+ */ -+ -+/* -+ * SSI-AK4613 -+ * -+ * This command is required when Playback/Capture -+ * -+ * amixer set "DVC Out" 100% -+ * amixer set "DVC In" 100% -+ * -+ * You can use Mute -+ * -+ * amixer set "DVC Out Mute" on -+ * amixer set "DVC In Mute" on -+ * -+ * You can use Volume Ramp -+ * -+ * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" -+ * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" -+ * amixer set "DVC Out Ramp" on -+ * aplay xxx.wav & -+ * amixer set "DVC Out" 80% // Volume Down -+ * amixer set "DVC Out" 100% // Volume Up -+ */ -+ -+#include -+ -+/ { -+ aliases { -+ serial0 = &scif2; -+ serial1 = &scif1; -+ serial2 = &scif5; -+ serial3 = &hscif1; -+ serial4 = &hscif0; -+ serial5 = &hscif2; -+ ethernet0 = &avb; -+ }; -+ -+ chosen { -+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ audio_clkout: audio-clkout { -+ /* -+ * This is same as <&rcar_sound 0> -+ * but needed to avoid cs2000/rcar_sound probe dead-lock -+ */ -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <12288000>; -+ }; -+ -+ avb-mch@ec5a0100 { -+ compatible = "renesas,avb-mch-gen3"; -+ reg = <0 0xec5a0100 0 0x100>; /* ADG_AVB */ -+ reg-name = "adg_avb"; -+ -+ clocks = <&cpg CPG_MOD 922>; -+ clock-names = "adg"; -+ resets = <&cpg 922>; -+ }; -+ -+ hdmi0-in { -+ compatible = "hdmi-connector"; -+ label = "HDMI0 IN"; -+ type = "a"; -+ -+ port { -+ hdmi_in_con: endpoint { -+ remote-endpoint = <&adv7481_hdmi>; -+ }; -+ }; -+ }; -+ -+ hdmi2-in { -+ compatible = "hdmi-connector"; -+ label = "HDMI2 IN"; -+ type = "a"; -+ -+ port { -+ hdmi_in_con2: endpoint { -+ remote-endpoint = <&adv7481_hdmi2>; -+ }; -+ }; -+ }; -+ -+ reg_1p8v: regulator0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-1.8V"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: regulator1 { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-3.3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ reg_12v: regulator2 { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-12V"; -+ regulator-min-microvolt = <12000000>; -+ regulator-max-microvolt = <12000000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sound_card: sound { -+ compatible = "audio-graph-card"; -+ -+ label = "ak4613"; -+ -+ dais = <&rsnd_port0>; -+ }; -+ -+ vcc_sdhi0: regulator-vcc-sdhi0 { -+ compatible = "regulator-fixed"; -+ -+ regulator-name = "SDHI0 Vcc"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+ -+ vccq_sdhi0: regulator-vccq-sdhi0 { -+ compatible = "regulator-gpio"; -+ -+ regulator-name = "SDHI0 VccQ"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ -+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; -+ gpios-states = <1>; -+ states = <3300000 1 -+ 1800000 0>; -+ }; -+ -+ vcc_sdhi3: regulator-vcc-sdhi3 { -+ compatible = "regulator-fixed"; -+ -+ regulator-name = "SDHI3 Vcc"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+ -+ vccq_sdhi3: regulator-vccq-sdhi3 { -+ compatible = "regulator-gpio"; -+ -+ regulator-name = "SDHI3 VccQ"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ -+ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; -+ gpios-states = <1>; -+ states = <3300000 1 -+ 1800000 0>; -+ }; -+ -+ hdmi0-out { -+ compatible = "hdmi-connector"; -+ label = "HDMI0 OUT"; -+ type = "a"; -+ -+ port { -+ hdmi0_con: endpoint { -+ }; -+ }; -+ }; -+ -+ hdmi1-out { -+ compatible = "hdmi-connector"; -+ label = "HDMI1 OUT"; -+ type = "a"; -+ -+ port { -+ hdmi1_con: endpoint { -+ }; -+ }; -+ }; -+ -+ x12_clk: x12 { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <24576000>; -+ }; -+ -+ /* External DU dot clocks */ -+ x21_clk: x21-clock { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <33000000>; -+ }; -+ -+ x22_clk: x22-clock { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <33000000>; -+ }; -+ -+ x23_clk: x23-clock { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <25000000>; -+ }; -+}; -+ -+&a57_0 { -+ cpu-supply = <&dvfs>; -+}; -+ -+&audio_clk_a { -+ clock-frequency = <22579200>; -+}; -+ -+&avb { -+ pinctrl-0 = <&avb_pins>; -+ pinctrl-names = "default"; -+ phy-handle = <&phy0>; -+ phy-mode = "rgmii-txid"; -+ status = "okay"; -+ -+ phy0: ethernet-phy@0 { -+ rxc-skew-ps = <1500>; -+ reg = <0>; -+ interrupt-parent = <&gpio2>; -+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>; -+ reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; -+ }; -+}; -+ -+&csi40 { -+ status = "okay"; -+ -+ ports { -+ port@0 { -+ reg = <0>; -+ -+ csi40_in: endpoint { -+ clock-lanes = <0>; -+ data-lanes = <1 2 3 4>; -+ remote-endpoint = <&adv7481_txa>; -+ }; -+ }; -+ }; -+}; -+ -+&csi41 { -+ status = "okay"; -+ -+ ports { -+ port@0 { -+ reg = <0>; -+ -+ csi41_in: endpoint { -+ clock-lanes = <0>; -+ data-lanes = <1 2 3 4>; -+ remote-endpoint = <&adv7481_txa2>; -+ }; -+ }; -+ }; -+}; -+ -+&du { -+ status = "okay"; -+ -+}; -+ -+&ehci0 { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&extalr_clk { -+ clock-frequency = <32768>; -+}; -+ -+&hscif0 { -+ pinctrl-0 = <&hscif0_pins>; -+ pinctrl-names = "default"; -+ uart-has-rtscts; -+ -+ status = "okay"; -+}; -+ -+&hscif1 { -+ pinctrl-0 = <&hscif1_pins>; -+ pinctrl-names = "default"; -+ -+ /* Please use exclusively to the scif1 node */ -+ status = "okay"; -+}; -+ -+&hscif2 { -+ pinctrl-0 = <&hscif2_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -+ -+&hsusb { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&i2c2 { -+ pinctrl-0 = <&i2c2_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+ -+ clock-frequency = <100000>; -+ -+ video-receiver@70 { -+ compatible = "adi,adv7481"; -+ reg = <0x70 0x26 0x22 0x34 0x36 0x32 -+ 0x31 0x30 0x41 0x79 0x4a 0x48>; -+ reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", -+ "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ interrupt-parent = <&gpio0>; -+ interrupt-names = "intrq1", "intrq3"; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>, -+ <5 IRQ_TYPE_LEVEL_LOW>; -+ -+ port@8 { -+ reg = <8>; -+ -+ adv7481_hdmi: endpoint { -+ remote-endpoint = <&hdmi_in_con>; -+ }; -+ }; -+ -+ port@a { -+ reg = <10>; -+ -+ adv7481_txa: endpoint { -+ clock-lanes = <0>; -+ data-lanes = <1 2 3 4>; -+ remote-endpoint = <&csi40_in>; -+ }; -+ }; -+ -+ }; -+ -+ video-receiver@71 { -+ compatible = "adi,adv7481"; -+ reg = <0x71 0x27 0x23 0x35 0x37 0x33 -+ 0x28 0x29 0x42 0x78 0x4b 0x49>; -+ reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", -+ "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ interrupt-parent = <&gpio6>; -+ interrupt-names = "intrq1", "intrq3"; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>, -+ <1 IRQ_TYPE_LEVEL_LOW>; -+ -+ port@8 { -+ reg = <8>; -+ -+ adv7481_hdmi2: endpoint { -+ remote-endpoint = <&hdmi_in_con2>; -+ }; -+ }; -+ -+ port@a { -+ reg = <10>; -+ -+ adv7481_txa2: endpoint { -+ clock-lanes = <0>; -+ data-lanes = <1 2 3 4>; -+ remote-endpoint = <&csi41_in>; -+ }; -+ }; -+ }; -+ -+ cs2000: clk_multiplier@4f { -+ #clock-cells = <0>; -+ compatible = "cirrus,cs2000-cp"; -+ reg = <0x4f>; -+ clocks = <&audio_clkout>, <&x12_clk>; -+ clock-names = "clk_in", "ref_clk"; -+ -+ assigned-clocks = <&cs2000>; -+ assigned-clock-rates = <24576000>; /* 1/1 divide */ -+ }; -+}; -+ -+&i2c3 { -+ pinctrl-0 = <&i2c3_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+ -+ clock-frequency = <400000>; -+ -+ asm330lhh@6a { -+ compatible = "st,asm330lhh"; -+ reg = <0x6a>; -+ -+ interrupt-names = "int1", "int2"; -+ interrupts-extended = <&gpio6 23 IRQ_TYPE_EDGE_RISING>, -+ <&gpio2 6 IRQ_TYPE_EDGE_RISING>; -+ st,drdy-int-pin = <1>; -+ }; -+}; -+ -+&i2c4 { -+ status = "okay"; -+ -+ versaclock5: clock-generator@68 { -+ compatible = "idt,9fgv0841"; -+ reg = <0x68>; -+ #clock-cells = <1>; -+ clocks = <&x23_clk>; -+ clock-names = "xin"; -+ }; -+}; -+ -+&i2c5 { -+ pinctrl-0 = <&i2c5_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+ -+ clock-frequency = <100000>; -+ -+ ak4613: codec@10 { -+ compatible = "asahi-kasei,ak4613"; -+ #sound-dai-cells = <0>; -+ reg = <0x10>; -+ clocks = <&rcar_sound 3>; -+ -+ asahi-kasei,in1-single-end; -+ asahi-kasei,in2-single-end; -+ asahi-kasei,out1-single-end; -+ asahi-kasei,out2-single-end; -+ asahi-kasei,out3-single-end; -+ asahi-kasei,out4-single-end; -+ asahi-kasei,out5-single-end; -+ asahi-kasei,out6-single-end; -+ -+ port { -+ ak4613_endpoint: endpoint { -+ remote-endpoint = <&rsnd_endpoint0>; -+ }; -+ }; -+ }; -+}; -+ -+&i2c_dvfs { -+ status = "okay"; -+ -+ clock-frequency = <400000>; -+ -+ pmic: pmic@30 { -+ pinctrl-0 = <&irq0_pins>; -+ pinctrl-names = "default"; -+ -+ compatible = "rohm,bd9571mwv"; -+ reg = <0x30>; -+ interrupt-parent = <&intc_ex>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ rohm,ddr-backup-power = <0xf>; -+ rohm,rstbmode-level; -+ -+ regulators { -+ dvfs: dvfs { -+ regulator-name = "dvfs"; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1030000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ -+ eeprom@50 { -+ compatible = "rohm,br24t01", "atmel,24c01"; -+ reg = <0x50>; -+ pagesize = <8>; -+ }; -+}; -+ -+&ohci0 { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&pcie_bus_clk { -+ clock-frequency = <100000000>; -+ status = "okay"; -+}; -+ -+&pciec0 { -+ status = "okay"; -+}; -+ -+&pciec1 { -+ status = "okay"; -+}; -+ -+&canfd { -+ pinctrl-0 = <&canfd0_pins &canfd1_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+ -+ channel0 { -+ status = "okay"; -+ }; -+ -+ channel1 { -+ status = "okay"; -+ }; -+}; -+ -+&pfc { -+ pinctrl-0 = <&scif_clk_pins>; -+ pinctrl-names = "default"; -+ -+ avb_pins: avb { -+ mux { -+ groups = "avb_link", "avb_mdio", "avb_mii"; -+ function = "avb"; -+ }; -+ -+ pins_mdio { -+ groups = "avb_mdio"; -+ drive-strength = <24>; -+ }; -+ -+ pins_mii_tx { -+ pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", -+ "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; -+ drive-strength = <12>; -+ }; -+ }; -+ -+ hscif0_pins: hscif0 { -+ groups = "hscif0_data", "hscif0_ctrl"; -+ function = "hscif0"; -+ }; -+ -+ hscif1_pins: hscif1 { -+ groups = "hscif1_data_a"; -+ function = "hscif1"; -+ }; -+ -+ hscif2_pins: hscif2 { -+ groups = "hscif2_data_c"; -+ function = "hscif2"; -+ }; -+ -+ i2c2_pins: i2c2 { -+ groups = "i2c2_a"; -+ function = "i2c2"; -+ }; -+ -+ i2c3_pins: i2c3 { -+ groups = "i2c3"; -+ function = "i2c3"; -+ }; -+ -+ i2c5_pins: i2c5 { -+ groups = "i2c5"; -+ function = "i2c5"; -+ }; -+ -+ irq0_pins: irq0 { -+ groups = "intc_ex_irq0"; -+ function = "intc_ex"; -+ }; -+ -+ scif1_pins: scif1 { -+ groups = "scif1_data_b"; -+ function = "scif1"; -+ }; -+ -+ scif2_pins: scif2 { -+ groups = "scif2_data_a"; -+ function = "scif2"; -+ }; -+ -+ scif5_pins: scif5 { -+ groups = "scif5_data_a"; -+ function = "scif5"; -+ }; -+ -+ scif_clk_pins: scif_clk { -+ groups = "scif_clk_a"; -+ function = "scif_clk"; -+ }; -+ -+ sdhi0_pins: sd0 { -+ groups = "sdhi0_data4", "sdhi0_ctrl"; -+ function = "sdhi0"; -+ power-source = <3300>; -+ }; -+ -+ sdhi0_pins_uhs: sd0_uhs { -+ groups = "sdhi0_data4", "sdhi0_ctrl"; -+ function = "sdhi0"; -+ power-source = <1800>; -+ }; -+ -+ sdhi2_pins: sd2 { -+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; -+ function = "sdhi2"; -+ power-source = <3300>; -+ }; -+ -+ sdhi2_pins_uhs: sd2_uhs { -+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; -+ function = "sdhi2"; -+ power-source = <1800>; -+ }; -+ -+ sdhi3_pins: sd3 { -+ groups = "sdhi3_data4", "sdhi3_ctrl"; -+ function = "sdhi3"; -+ power-source = <3300>; -+ }; -+ -+ sdhi3_pins_uhs: sd3_uhs { -+ groups = "sdhi3_data4", "sdhi3_ctrl"; -+ function = "sdhi3"; -+ power-source = <1800>; -+ }; -+ -+ sound_pins: sound { -+ groups = "ssi349_ctrl", "ssi3_data", "ssi4_data"; -+ function = "ssi"; -+ }; -+ -+ sound_clk_pins: sound_clk { -+ groups = "audio_clk_a_a", "audio_clk_b_a", -+ "audio_clkout_a", "audio_clkout3_b"; -+ function = "audio_clk"; -+ }; -+ -+ usb0_pins: usb0 { -+ groups = "usb0"; -+ function = "usb0"; -+ }; -+ -+ usb1_pins: usb1 { -+ groups = "usb1_ovc"; -+ function = "usb1"; -+ }; -+ -+ usb30_pins: usb30 { -+ groups = "usb30", "usb30_ovc"; -+ function = "usb30"; -+ }; -+ -+ canfd0_pins: canfd0 { -+ groups = "canfd0_data_a"; -+ function = "canfd0"; -+ }; -+ -+ canfd1_pins: canfd1 { -+ groups = "canfd1_data"; -+ function = "canfd1"; -+ }; -+}; -+ -+&rcar_sound { -+ pinctrl-0 = <&sound_pins &sound_clk_pins>; -+ pinctrl-names = "default"; -+ -+ /* Single DAI */ -+ #sound-dai-cells = <0>; -+ -+ /* audio_clkout0/1/2/3 */ -+ #clock-cells = <1>; -+ clock-frequency = <12288000 11289600>; -+ -+ status = "okay"; -+ -+ /* update to */ -+ clocks = <&cpg CPG_MOD 1005>, -+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, -+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, -+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, -+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, -+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, -+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, -+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, -+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, -+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, -+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, -+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, -+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, -+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, -+ <&audio_clk_a>, <&cs2000>, -+ <&audio_clk_c>, -+ <&cpg CPG_CORE CPG_AUDIO_CLK_I>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ rsnd_port0: port@0 { -+ reg = <0>; -+ rsnd_endpoint0: endpoint { -+ remote-endpoint = <&ak4613_endpoint>; -+ -+ dai-format = "left_j"; -+ bitclock-master = <&rsnd_endpoint0>; -+ frame-master = <&rsnd_endpoint0>; -+ -+ playback = <&ssi3>; //ssi0 -> ssi3 -+ capture = <&ssi4>; //ssi1 -> ssi4 -+ }; -+ }; -+ }; -+}; -+ -+&rwdt { -+ timeout-sec = <60>; -+ status = "okay"; -+}; -+ -+&scif1 { -+ pinctrl-0 = <&scif1_pins>; -+ pinctrl-names = "default"; -+ -+ uart-has-rtscts; -+ /* Please use exclusively to the hscif1 node */ -+ status = "okay"; -+}; -+ -+&scif2 { -+ pinctrl-0 = <&scif2_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -+ -+&scif5 { -+ pinctrl-0 = <&scif5_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -+ -+&scif_clk { -+ clock-frequency = <14745600>; -+}; -+ -+&sdhi0 { -+ pinctrl-0 = <&sdhi0_pins>; -+ pinctrl-1 = <&sdhi0_pins_uhs>; -+ pinctrl-names = "default", "state_uhs"; -+ -+ vmmc-supply = <&vcc_sdhi0>; -+ vqmmc-supply = <&vccq_sdhi0>; -+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; -+ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; -+ bus-width = <4>; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ status = "okay"; -+}; -+ -+&sdhi2 { -+ /* used for on-board 8bit eMMC */ -+ pinctrl-0 = <&sdhi2_pins>; -+ pinctrl-1 = <&sdhi2_pins_uhs>; -+ pinctrl-names = "default", "state_uhs"; -+ -+ iommus = <&ipmmu_ds1 34>; -+ -+ vmmc-supply = <®_3p3v>; -+ vqmmc-supply = <®_1p8v>; -+ bus-width = <8>; -+ mmc-hs200-1_8v; -+ mmc-hs400-1_8v; -+ no-sd; -+ no-sdio; -+ non-removable; -+ fixed-emmc-driver-type = <1>; -+ status = "okay"; -+}; -+ -+&sdhi3 { -+ pinctrl-0 = <&sdhi3_pins>; -+ pinctrl-1 = <&sdhi3_pins_uhs>; -+ pinctrl-names = "default", "state_uhs"; -+ -+ vmmc-supply = <&vcc_sdhi3>; -+ vqmmc-supply = <&vccq_sdhi3>; -+ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; -+ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; -+ bus-width = <4>; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ status = "okay"; -+}; -+ -+&ssi4 { -+ shared-pin; -+}; -+ -+&usb_extal_clk { -+ clock-frequency = <50000000>; -+}; -+ -+&usb2_phy0 { -+ pinctrl-0 = <&usb0_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -+ -+&usb2_phy1 { -+ pinctrl-0 = <&usb1_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -+ -+&usb3_peri0 { -+ phys = <&usb3_phy0>; -+ phy-names = "usb"; -+ -+ status = "okay"; -+}; -+ -+&usb3_phy0 { -+ status = "okay"; -+}; -+ -+&usb3s0_clk { -+ clock-frequency = <100000000>; -+}; -+ -+&vin0 { -+ status = "okay"; -+}; -+ -+&vin1 { -+ status = "okay"; -+}; -+ -+&vin2 { -+ status = "okay"; -+}; -+ -+&vin3 { -+ status = "okay"; -+}; -+ -+&vin4 { -+ status = "okay"; -+}; -+ -+&vin5 { -+ status = "okay"; -+}; -+ -+&vin6 { -+ status = "okay"; -+}; -+ -+&vin7 { -+ status = "okay"; -+}; -+ -+&xhci0 { -+ pinctrl-0 = <&usb30_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -diff --git a/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts b/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts -new file mode 100644 -index 000000000000..6c846a94afe2 ---- /dev/null -+++ b/arch/arm64/boot/dts/renesas/r8a7795-agl-refhw.dts -@@ -0,0 +1,392 @@ -+/* -+ * Device Tree Source for the AGL reference hardware board with R-Car H3 ES3.0 -+ * -+ * Copyright (C) 2019 Panasonic Corp. -+ * Copyright (C) 2020 Konsulko Group -+ * -+ * This file is licensed under the terms of the GNU General Public License -+ * version 2. This program is licensed "as is" without any warranty of any -+ * kind, whether express or implied. -+ */ -+ -+/* -+ * This file is for the most part derived from: -+ * -+ * - r8a7795-salvator-xs-4x2g.dts -+ * - r8a7795-salvator-xs.dts -+ * - salvator-xs.dtsi -+ * -+ * With agl-refhw-common.dtsi replacing (and derived from) salvator-common.dtsi. -+ */ -+ -+/dts-v1/; -+#include "r8a7795.dtsi" -+#include "agl-refhw-common.dtsi" -+ -+/ { -+ model = "AGL Reference Hardware based on r8a7795 ES3.0+ with 8GiB (4 x 2 GiB)"; -+ compatible = "agl,refhw-h3", "renesas,r8a7795"; -+ -+ memory@48000000 { -+ device_type = "memory"; -+ /* first 128MB is reserved for secure area. */ -+ reg = <0x0 0x48000000 0x0 0x78000000>; -+ }; -+ -+ memory@500000000 { -+ device_type = "memory"; -+ reg = <0x5 0x00000000 0x0 0x80000000>; -+ }; -+ -+ memory@600000000 { -+ device_type = "memory"; -+ reg = <0x6 0x00000000 0x0 0x80000000>; -+ }; -+ -+ memory@700000000 { -+ device_type = "memory"; -+ reg = <0x7 0x00000000 0x0 0x80000000>; -+ }; -+ -+ reserved-memory { -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ /* device specific region for Lossy Decompression */ -+ lossy_decompress: linux,lossy_decompress@54000000 { -+ no-map; -+ reg = <0x00000000 0x54000000 0x0 0x03000000>; -+ }; -+ -+ /* For Audio DSP */ -+ adsp_reserved: linux,adsp@57000000 { -+ compatible = "shared-dma-pool"; -+ reusable; -+ reg = <0x00000000 0x57000000 0x0 0x01000000>; -+ }; -+ -+ /* global autoconfigured region for contiguous allocations */ -+ linux,cma@58000000 { -+ compatible = "shared-dma-pool"; -+ reusable; -+ reg = <0x00000000 0x58000000 0x0 0x18000000>; -+ linux,cma-default; -+ }; -+ -+ /* device specific region for contiguous allocations */ -+ mmp_reserved: linux,multimedia@70000000 { -+ compatible = "shared-dma-pool"; -+ reusable; -+ reg = <0x00000000 0x70000000 0x0 0x10000000>; -+ }; -+ }; -+ -+ mmngr { -+ compatible = "renesas,mmngr"; -+ memory-region = <&mmp_reserved>, <&lossy_decompress>; -+ }; -+ -+ mmngrbuf { -+ compatible = "renesas,mmngrbuf"; -+ }; -+ -+ vspm_if { -+ compatible = "renesas,vspm_if"; -+ }; -+ -+ vga { -+ port { -+ vga_in: endpoint { -+ /delete-property/remote-endpoint; -+ }; -+ }; -+ }; -+ -+ vga-encoder { -+ ports { -+ port@0 { -+ adv7123_in: endpoint { -+ /delete-property/remote-endpoint; -+ }; -+ }; -+ -+ port@1 { -+ adv7123_out: endpoint { -+ /delete-property/remote-endpoint; -+ }; -+ }; -+ }; -+ }; -+ -+}; -+ -+&adsp { -+ status = "okay"; -+ memory-region = <&adsp_reserved>; -+}; -+ -+&du { -+ clocks = <&cpg CPG_MOD 724>, -+ <&cpg CPG_MOD 723>, -+ <&cpg CPG_MOD 722>, -+ <&cpg CPG_MOD 721>, -+ <&versaclock6 1>, -+ <&x21_clk>, -+ <&x22_clk>, -+ <&versaclock6 2>; -+ clock-names = "du.0", "du.1", "du.2", "du.3", -+ "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; -+}; -+ -+&ehci2 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&hsusb3 { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&sound_card { -+ dais = <&rsnd_port0 /* ak4613 */ -+ &rsnd_port1 /* HDMI0 */ -+ &rsnd_port2>; /* HDMI1 */ -+}; -+ -+&hdmi0 { -+ status = "okay"; -+ -+ ports { -+ port@1 { -+ reg = <1>; -+ rcar_dw_hdmi0_out: endpoint { -+ remote-endpoint = <&hdmi0_con>; -+ }; -+ }; -+ port@2 { -+ reg = <2>; -+ dw_hdmi0_snd_in: endpoint { -+ remote-endpoint = <&rsnd_endpoint1>; -+ }; -+ }; -+ }; -+}; -+ -+&hdmi0_con { -+ remote-endpoint = <&rcar_dw_hdmi0_out>; -+}; -+ -+&hdmi1 { -+ status = "okay"; -+ -+ ports { -+ port@1 { -+ reg = <1>; -+ rcar_dw_hdmi1_out: endpoint { -+ remote-endpoint = <&hdmi1_con>; -+ }; -+ }; -+ port@2 { -+ reg = <2>; -+ dw_hdmi1_snd_in: endpoint { -+ remote-endpoint = <&rsnd_endpoint2>; -+ }; -+ }; -+ }; -+}; -+ -+&hdmi1_con { -+ remote-endpoint = <&rcar_dw_hdmi1_out>; -+}; -+ -+&ohci2 { -+ status = "okay"; -+}; -+ -+&ohci3 { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&rcar_sound { -+ ports { -+ /* rsnd_port0 is on salvator-common */ -+ rsnd_port1: port@1 { -+ reg = <1>; -+ rsnd_endpoint1: endpoint { -+ remote-endpoint = <&dw_hdmi0_snd_in>; -+ -+ dai-format = "i2s"; -+ bitclock-master = <&rsnd_endpoint1>; -+ frame-master = <&rsnd_endpoint1>; -+ -+ playback = <&ssi2>; -+ }; -+ }; -+ rsnd_port2: port@2 { -+ reg = <2>; -+ rsnd_endpoint2: endpoint { -+ remote-endpoint = <&dw_hdmi1_snd_in>; -+ -+ dai-format = "i2s"; -+ bitclock-master = <&rsnd_endpoint2>; -+ frame-master = <&rsnd_endpoint2>; -+ -+ playback = <&ssi3>; -+ }; -+ }; -+ }; -+}; -+ -+&pfc { -+ usb2_pins: usb2 { -+ groups = "usb2", "usb2_ovc"; -+ function = "usb2"; -+ }; -+ -+ /* -+ * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins -+ * (when SW31 is the default setting on Salvator-XS). -+ * - If SW31 is the default setting, you cannot use USB2.0 ch3 on -+ * r8a7795 with Salvator-XS. -+ * Hence the SW31 setting must be changed like 2) below. -+ * 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF: -+ * - Connect GP6_3[01] to ADV7842. -+ * 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON: -+ * - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power). -+ * - Connect GP6_{04,21} to ADV7842. -+ */ -+ usb2_ch3_pins: usb2_ch3 { -+ groups = "usb2_ch3"; -+ function = "usb2_ch3"; -+ }; -+}; -+ -+&usb2_phy2 { -+ pinctrl-0 = <&usb2_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -+ -+&usb2_phy3 { -+ pinctrl-0 = <&usb2_ch3_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+}; -+ -+&vspbc { -+ status = "okay"; -+}; -+ -+&vspbd { -+ status = "okay"; -+}; -+ -+&vspi0 { -+ status = "okay"; -+}; -+ -+&vspi1 { -+ status = "okay"; -+}; -+ -+/* End r8a7795-salvator-xs.dts content */ -+ -+ -+/* Start r8a7795-salvator-xs-4x2g.dts content */ -+ -+&pciec0 { -+ /* Map all possible DDR as inbound ranges */ -+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; -+}; -+ -+&pciec1 { -+ /* Map all possible DDR as inbound ranges */ -+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; -+}; -+ -+/* End r8a7795-salvator-xs-4x2g.dts content */ -+ -+ -+/* Start salvator-xs.dts content */ -+ -+&extal_clk { -+ clock-frequency = <16640000>; -+}; -+ -+&i2c4 { -+ clock-frequency = <400000>; -+ -+ versaclock6: clock-generator@6a { -+ compatible = "idt,5p49v6901"; -+ reg = <0x6a>; -+ #clock-cells = <1>; -+ clocks = <&x23_clk>; -+ clock-names = "xin"; -+ }; -+}; -+ -+/* End salvator-xs.dts content */ -+ -+ -+/* Start reference hardware specific tweaks */ -+ -+&du { -+ ports { -+ port@0 { -+ endpoint { -+ /delete-property/remote-endpoint; -+ }; -+ }; -+ -+ port@3 { -+ endpoint { -+ /delete-property/remote-endpoint; -+ }; -+ }; -+ }; -+}; -+ -+&lvds0 { -+ status = "disabled"; -+}; -+ -+&pwm1 { -+ status = "disabled"; -+}; -+ -+&scif_clk { -+ clock-frequency = <0>; -+}; -+ -+&sdhi0 { -+ /delete-property/ wp-gpios; -+ non-removable; -+}; -+ -+&sdhi3 { -+ /delete-property/ wp-gpios; -+ non-removable; -+}; -+ -+&gpio6 { -+ /* Enable the CAN 1 & 2 transceivers */ -+ can-1-transceiver-stb { -+ gpio-hog; -+ gpios = <21 GPIO_ACTIVE_HIGH>; -+ output-low; -+ }; -+ can-2-transceiver-stb { -+ gpio-hog; -+ gpios = <12 GPIO_ACTIVE_HIGH>; -+ output-low; -+ }; -+}; -diff --git a/drivers/media/i2c/adv748x/adv748x-core.c b/drivers/media/i2c/adv748x/adv748x-core.c -index 87092ce5ba73..357c334113aa 100644 ---- a/drivers/media/i2c/adv748x/adv748x-core.c -+++ b/drivers/media/i2c/adv748x/adv748x-core.c -@@ -97,6 +97,21 @@ static const struct adv748x_register_map adv748x_default_addresses[] = { - [ADV748X_PAGE_TXA] = { "txa", 0x4a }, - }; - -+static const struct adv748x_register_map adv748x_default_addresses2[] = { -+ [ADV748X_PAGE_IO] = { "main", 0x71 }, -+ [ADV748X_PAGE_DPLL] = { "dpll", 0x27 }, -+ [ADV748X_PAGE_CP] = { "cp", 0x23 }, -+ [ADV748X_PAGE_HDMI] = { "hdmi", 0x35 }, -+ [ADV748X_PAGE_EDID] = { "edid", 0x37 }, -+ [ADV748X_PAGE_REPEATER] = { "repeater", 0x33 }, -+ [ADV748X_PAGE_INFOFRAME] = { "infoframe", 0x28 }, -+ [ADV748X_PAGE_CBUS] = { "cbus", 0x29 }, -+ [ADV748X_PAGE_CEC] = { "cec", 0x42 }, -+ [ADV748X_PAGE_SDP] = { "sdp", 0x78 }, -+ [ADV748X_PAGE_TXB] = { "txb", 0x49 }, -+ [ADV748X_PAGE_TXA] = { "txa", 0x4b }, -+}; -+ - static int adv748x_read_check(struct adv748x_state *state, - int client_page, u8 reg) - { -@@ -183,10 +198,17 @@ static int adv748x_initialise_clients(struct adv748x_state *state) - int ret; - - for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) { -- state->i2c_clients[i] = i2c_new_ancillary_device( -+ if ((state->client->addr << 1) == 0xe0) { -+ state->i2c_clients[i] = i2c_new_ancillary_device( - state->client, - adv748x_default_addresses[i].name, - adv748x_default_addresses[i].default_addr); -+ } else { -+ state->i2c_clients[i] = i2c_new_ancillary_device( -+ state->client, -+ adv748x_default_addresses2[i].name, -+ adv748x_default_addresses2[i].default_addr); -+ } - - if (IS_ERR(state->i2c_clients[i])) { - adv_err(state, "failed to create i2c client %u\n", i); diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-create-r8a7795-usb-ovc-pinmux-groups.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-create-r8a7795-usb-ovc-pinmux-groups.patch deleted file mode 100644 index 8e0c4ac..0000000 --- a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0001-create-r8a7795-usb-ovc-pinmux-groups.patch +++ /dev/null @@ -1,411 +0,0 @@ -Create r8a7795 USB OVC pin groups - -Split the r8a7795 USB pin groups to create separate groups for the -OVC pins. This is required for the AGL reference hardware boards, -which use some of the OVC pins in other pinmux modes. - -Upstream-Status: pending - -Signed-off-by: Scott Murray -Signed-off-by: Raquel Medina +Date: Tue, 21 Sep 2021 15:45:18 -0400 +Subject: [PATCH 2/4] Add AGL reference hardware support + +Upstream-Status: pending + +Signed-off-by: Scott Murray +Signed-off-by: Raquel Medina +[asm330lhh interrupt fix] +Signed-off-by: Hiroyuki Ishii +--- + .../boot/dts/renesas/agl-refhw-common.dtsi | 919 ++++++++++++++++++ + .../boot/dts/renesas/r8a77951-agl-refhw.dts | 392 ++++++++ + drivers/media/i2c/adv748x/adv748x-core.c | 24 +- + 3 files changed, 1334 insertions(+), 1 deletion(-) + create mode 100644 arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi + create mode 100644 arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts + +diff --git a/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi +new file mode 100644 +index 000000000000..7474ed578c21 +--- /dev/null ++++ b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi +@@ -0,0 +1,919 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Device Tree Source for common parts of AGL Reference Hardware board variants ++ * ++ * Copyright (C) 2015-2017 Renesas Electronics Corp. ++ * Copyright (C) 2020 Konsulko Group ++ */ ++ ++/* ++ * This file is derived from salvator-common.dtsi ++ * ++ * It is currently unclear if the modifications made are such that they could ++ * be done on top of salvator-common.dtsi to allow removing the duplication. ++ * It is likely that the common pieces with salvator-common.dtsi would need to ++ * be factored out into a new common file, which is perhaps hard to justify. ++ */ ++ ++/* ++ * SSI-AK4613 ++ * ++ * This command is required when Playback/Capture ++ * ++ * amixer set "DVC Out" 100% ++ * amixer set "DVC In" 100% ++ * ++ * You can use Mute ++ * ++ * amixer set "DVC Out Mute" on ++ * amixer set "DVC In Mute" on ++ * ++ * You can use Volume Ramp ++ * ++ * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" ++ * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" ++ * amixer set "DVC Out Ramp" on ++ * aplay xxx.wav & ++ * amixer set "DVC Out" 80% // Volume Down ++ * amixer set "DVC Out" 100% // Volume Up ++ */ ++ ++#include ++ ++/ { ++ aliases { ++ serial0 = &scif2; ++ serial1 = &scif1; ++ serial2 = &scif5; ++ serial3 = &hscif1; ++ serial4 = &hscif0; ++ serial5 = &hscif2; ++ ethernet0 = &avb; ++ }; ++ ++ chosen { ++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ audio_clkout: audio-clkout { ++ /* ++ * This is same as <&rcar_sound 0> ++ * but needed to avoid cs2000/rcar_sound probe dead-lock ++ */ ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <12288000>; ++ }; ++ ++ avb-mch@ec5a0100 { ++ compatible = "renesas,avb-mch-gen3"; ++ reg = <0 0xec5a0100 0 0x100>; /* ADG_AVB */ ++ reg-name = "adg_avb"; ++ ++ clocks = <&cpg CPG_MOD 922>; ++ clock-names = "adg"; ++ resets = <&cpg 922>; ++ }; ++ ++ hdmi0-in { ++ compatible = "hdmi-connector"; ++ label = "HDMI0 IN"; ++ type = "a"; ++ ++ port { ++ hdmi_in_con: endpoint { ++ remote-endpoint = <&adv7481_hdmi>; ++ }; ++ }; ++ }; ++ ++ hdmi2-in { ++ compatible = "hdmi-connector"; ++ label = "HDMI2 IN"; ++ type = "a"; ++ ++ port { ++ hdmi_in_con2: endpoint { ++ remote-endpoint = <&adv7481_hdmi2>; ++ }; ++ }; ++ }; ++ ++ reg_1p8v: regulator0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-1.8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_3p3v: regulator1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_12v: regulator2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-12V"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ sound_card: sound { ++ compatible = "audio-graph-card"; ++ ++ label = "ak4613"; ++ ++ dais = <&rsnd_port0>; ++ }; ++ ++ vcc_sdhi0: regulator-vcc-sdhi0 { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "SDHI0 Vcc"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ vccq_sdhi0: regulator-vccq-sdhi0 { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "SDHI0 VccQ"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; ++ gpios-states = <1>; ++ states = <3300000 1 ++ 1800000 0>; ++ }; ++ ++ vcc_sdhi3: regulator-vcc-sdhi3 { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "SDHI3 Vcc"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ vccq_sdhi3: regulator-vccq-sdhi3 { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "SDHI3 VccQ"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; ++ gpios-states = <1>; ++ states = <3300000 1 ++ 1800000 0>; ++ }; ++ ++ hdmi0-out { ++ compatible = "hdmi-connector"; ++ label = "HDMI0 OUT"; ++ type = "a"; ++ ++ port { ++ hdmi0_con: endpoint { ++ }; ++ }; ++ }; ++ ++ hdmi1-out { ++ compatible = "hdmi-connector"; ++ label = "HDMI1 OUT"; ++ type = "a"; ++ ++ port { ++ hdmi1_con: endpoint { ++ }; ++ }; ++ }; ++ ++ x12_clk: x12 { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24576000>; ++ }; ++ ++ /* External DU dot clocks */ ++ x21_clk: x21-clock { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <33000000>; ++ }; ++ ++ x22_clk: x22-clock { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <33000000>; ++ }; ++ ++ x23_clk: x23-clock { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <25000000>; ++ }; ++}; ++ ++&a57_0 { ++ cpu-supply = <&dvfs>; ++}; ++ ++&audio_clk_a { ++ clock-frequency = <22579200>; ++}; ++ ++&avb { ++ pinctrl-0 = <&avb_pins>; ++ pinctrl-names = "default"; ++ phy-handle = <&phy0>; ++ phy-mode = "rgmii-txid"; ++ status = "okay"; ++ ++ phy0: ethernet-phy@0 { ++ rxc-skew-ps = <1500>; ++ reg = <0>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <11 IRQ_TYPE_LEVEL_LOW>; ++ reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&csi40 { ++ status = "okay"; ++ ++ ports { ++ port@0 { ++ reg = <0>; ++ ++ csi40_in: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&adv7481_txa>; ++ }; ++ }; ++ }; ++}; ++ ++&csi41 { ++ status = "okay"; ++ ++ ports { ++ port@0 { ++ reg = <0>; ++ ++ csi41_in: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&adv7481_txa2>; ++ }; ++ }; ++ }; ++}; ++ ++&du { ++ status = "okay"; ++ ++}; ++ ++&ehci0 { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&extalr_clk { ++ clock-frequency = <32768>; ++}; ++ ++&hscif0 { ++ pinctrl-0 = <&hscif0_pins>; ++ pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ status = "okay"; ++}; ++ ++&hscif1 { ++ pinctrl-0 = <&hscif1_pins>; ++ pinctrl-names = "default"; ++ ++ /* Please use exclusively to the scif1 node */ ++ status = "okay"; ++}; ++ ++&hscif2 { ++ pinctrl-0 = <&hscif2_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&hsusb { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&i2c2 { ++ pinctrl-0 = <&i2c2_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++ ++ clock-frequency = <100000>; ++ ++ video-receiver@70 { ++ compatible = "adi,adv7481"; ++ reg = <0x70 0x26 0x22 0x34 0x36 0x32 ++ 0x31 0x30 0x41 0x79 0x4a 0x48>; ++ reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", ++ "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ interrupt-parent = <&gpio0>; ++ interrupt-names = "intrq1", "intrq3"; ++ interrupts = <4 IRQ_TYPE_LEVEL_LOW>, ++ <5 IRQ_TYPE_LEVEL_LOW>; ++ ++ port@8 { ++ reg = <8>; ++ ++ adv7481_hdmi: endpoint { ++ remote-endpoint = <&hdmi_in_con>; ++ }; ++ }; ++ ++ port@a { ++ reg = <10>; ++ ++ adv7481_txa: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&csi40_in>; ++ }; ++ }; ++ ++ }; ++ ++ video-receiver@71 { ++ compatible = "adi,adv7481"; ++ reg = <0x71 0x27 0x23 0x35 0x37 0x33 ++ 0x28 0x29 0x42 0x78 0x4b 0x49>; ++ reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", ++ "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ interrupt-parent = <&gpio6>; ++ interrupt-names = "intrq1", "intrq3"; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>, ++ <1 IRQ_TYPE_LEVEL_LOW>; ++ ++ port@8 { ++ reg = <8>; ++ ++ adv7481_hdmi2: endpoint { ++ remote-endpoint = <&hdmi_in_con2>; ++ }; ++ }; ++ ++ port@a { ++ reg = <10>; ++ ++ adv7481_txa2: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&csi41_in>; ++ }; ++ }; ++ }; ++ ++ cs2000: clk_multiplier@4f { ++ #clock-cells = <0>; ++ compatible = "cirrus,cs2000-cp"; ++ reg = <0x4f>; ++ clocks = <&audio_clkout>, <&x12_clk>; ++ clock-names = "clk_in", "ref_clk"; ++ ++ assigned-clocks = <&cs2000>; ++ assigned-clock-rates = <24576000>; /* 1/1 divide */ ++ }; ++}; ++ ++&i2c3 { ++ pinctrl-0 = <&i2c3_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++ ++ clock-frequency = <400000>; ++ ++ asm330lhh@6a { ++ compatible = "st,asm330lhh"; ++ reg = <0x6a>; ++ ++ interrupt-names = "int1", "int2"; ++ interrupts-extended = <&gpio6 23 IRQ_TYPE_EDGE_RISING>, ++ <&gpio2 6 IRQ_TYPE_EDGE_RISING>; ++ st,drdy-int-pin = <1>; ++ }; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ ++ versaclock5: clock-generator@68 { ++ compatible = "idt,9fgv0841"; ++ reg = <0x68>; ++ #clock-cells = <1>; ++ clocks = <&x23_clk>; ++ clock-names = "xin"; ++ }; ++}; ++ ++&i2c5 { ++ pinctrl-0 = <&i2c5_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++ ++ clock-frequency = <100000>; ++ ++ ak4613: codec@10 { ++ compatible = "asahi-kasei,ak4613"; ++ #sound-dai-cells = <0>; ++ reg = <0x10>; ++ clocks = <&rcar_sound 3>; ++ ++ asahi-kasei,in1-single-end; ++ asahi-kasei,in2-single-end; ++ asahi-kasei,out1-single-end; ++ asahi-kasei,out2-single-end; ++ asahi-kasei,out3-single-end; ++ asahi-kasei,out4-single-end; ++ asahi-kasei,out5-single-end; ++ asahi-kasei,out6-single-end; ++ ++ port { ++ ak4613_endpoint: endpoint { ++ remote-endpoint = <&rsnd_endpoint0>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c_dvfs { ++ status = "okay"; ++ ++ clock-frequency = <400000>; ++ ++ pmic: pmic@30 { ++ pinctrl-0 = <&irq0_pins>; ++ pinctrl-names = "default"; ++ ++ compatible = "rohm,bd9571mwv"; ++ reg = <0x30>; ++ interrupt-parent = <&intc_ex>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ rohm,ddr-backup-power = <0xf>; ++ rohm,rstbmode-level; ++ ++ regulators { ++ dvfs: dvfs { ++ regulator-name = "dvfs"; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1030000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ }; ++ }; ++ ++ eeprom@50 { ++ compatible = "rohm,br24t01", "atmel,24c01"; ++ reg = <0x50>; ++ pagesize = <8>; ++ }; ++}; ++ ++&ohci0 { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&pcie_bus_clk { ++ clock-frequency = <100000000>; ++ status = "okay"; ++}; ++ ++&pciec0 { ++ status = "okay"; ++}; ++ ++&pciec1 { ++ status = "okay"; ++}; ++ ++&canfd { ++ pinctrl-0 = <&canfd0_pins &canfd1_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++ ++ channel0 { ++ status = "okay"; ++ }; ++ ++ channel1 { ++ status = "okay"; ++ }; ++}; ++ ++&pfc { ++ pinctrl-0 = <&scif_clk_pins>; ++ pinctrl-names = "default"; ++ ++ avb_pins: avb { ++ mux { ++ groups = "avb_link", "avb_mdio", "avb_mii"; ++ function = "avb"; ++ }; ++ ++ pins_mdio { ++ groups = "avb_mdio"; ++ drive-strength = <24>; ++ }; ++ ++ pins_mii_tx { ++ pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", ++ "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; ++ drive-strength = <12>; ++ }; ++ }; ++ ++ hscif0_pins: hscif0 { ++ groups = "hscif0_data", "hscif0_ctrl"; ++ function = "hscif0"; ++ }; ++ ++ hscif1_pins: hscif1 { ++ groups = "hscif1_data_a"; ++ function = "hscif1"; ++ }; ++ ++ hscif2_pins: hscif2 { ++ groups = "hscif2_data_c"; ++ function = "hscif2"; ++ }; ++ ++ i2c2_pins: i2c2 { ++ groups = "i2c2_a"; ++ function = "i2c2"; ++ }; ++ ++ i2c3_pins: i2c3 { ++ groups = "i2c3"; ++ function = "i2c3"; ++ }; ++ ++ i2c5_pins: i2c5 { ++ groups = "i2c5"; ++ function = "i2c5"; ++ }; ++ ++ irq0_pins: irq0 { ++ groups = "intc_ex_irq0"; ++ function = "intc_ex"; ++ }; ++ ++ scif1_pins: scif1 { ++ groups = "scif1_data_b"; ++ function = "scif1"; ++ }; ++ ++ scif2_pins: scif2 { ++ groups = "scif2_data_a"; ++ function = "scif2"; ++ }; ++ ++ scif5_pins: scif5 { ++ groups = "scif5_data_a"; ++ function = "scif5"; ++ }; ++ ++ scif_clk_pins: scif_clk { ++ groups = "scif_clk_a"; ++ function = "scif_clk"; ++ }; ++ ++ sdhi0_pins: sd0 { ++ groups = "sdhi0_data4", "sdhi0_ctrl"; ++ function = "sdhi0"; ++ power-source = <3300>; ++ }; ++ ++ sdhi0_pins_uhs: sd0_uhs { ++ groups = "sdhi0_data4", "sdhi0_ctrl"; ++ function = "sdhi0"; ++ power-source = <1800>; ++ }; ++ ++ sdhi2_pins: sd2 { ++ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; ++ function = "sdhi2"; ++ power-source = <3300>; ++ }; ++ ++ sdhi2_pins_uhs: sd2_uhs { ++ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; ++ function = "sdhi2"; ++ power-source = <1800>; ++ }; ++ ++ sdhi3_pins: sd3 { ++ groups = "sdhi3_data4", "sdhi3_ctrl"; ++ function = "sdhi3"; ++ power-source = <3300>; ++ }; ++ ++ sdhi3_pins_uhs: sd3_uhs { ++ groups = "sdhi3_data4", "sdhi3_ctrl"; ++ function = "sdhi3"; ++ power-source = <1800>; ++ }; ++ ++ sound_pins: sound { ++ groups = "ssi349_ctrl", "ssi3_data", "ssi4_data"; ++ function = "ssi"; ++ }; ++ ++ sound_clk_pins: sound_clk { ++ groups = "audio_clk_a_a", "audio_clk_b_a", ++ "audio_clkout_a", "audio_clkout3_b"; ++ function = "audio_clk"; ++ }; ++ ++ usb0_pins: usb0 { ++ groups = "usb0"; ++ function = "usb0"; ++ }; ++ ++ usb1_pins: usb1 { ++ groups = "usb1_ovc"; ++ function = "usb1"; ++ }; ++ ++ usb30_pins: usb30 { ++ groups = "usb30", "usb30_ovc"; ++ function = "usb30"; ++ }; ++ ++ canfd0_pins: canfd0 { ++ groups = "canfd0_data_a"; ++ function = "canfd0"; ++ }; ++ ++ canfd1_pins: canfd1 { ++ groups = "canfd1_data"; ++ function = "canfd1"; ++ }; ++}; ++ ++&rcar_sound { ++ pinctrl-0 = <&sound_pins &sound_clk_pins>; ++ pinctrl-names = "default"; ++ ++ /* Single DAI */ ++ #sound-dai-cells = <0>; ++ ++ /* audio_clkout0/1/2/3 */ ++ #clock-cells = <1>; ++ clock-frequency = <12288000 11289600>; ++ ++ status = "okay"; ++ ++ /* update to */ ++ clocks = <&cpg CPG_MOD 1005>, ++ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, ++ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, ++ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, ++ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, ++ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, ++ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, ++ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, ++ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, ++ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, ++ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, ++ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, ++ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, ++ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, ++ <&audio_clk_a>, <&cs2000>, ++ <&audio_clk_c>, ++ <&cpg CPG_CORE CPG_AUDIO_CLK_I>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ rsnd_port0: port@0 { ++ reg = <0>; ++ rsnd_endpoint0: endpoint { ++ remote-endpoint = <&ak4613_endpoint>; ++ ++ dai-format = "left_j"; ++ bitclock-master = <&rsnd_endpoint0>; ++ frame-master = <&rsnd_endpoint0>; ++ ++ playback = <&ssi3>; //ssi0 -> ssi3 ++ capture = <&ssi4>; //ssi1 -> ssi4 ++ }; ++ }; ++ }; ++}; ++ ++&rwdt { ++ timeout-sec = <60>; ++ status = "okay"; ++}; ++ ++&scif1 { ++ pinctrl-0 = <&scif1_pins>; ++ pinctrl-names = "default"; ++ ++ uart-has-rtscts; ++ /* Please use exclusively to the hscif1 node */ ++ status = "okay"; ++}; ++ ++&scif2 { ++ pinctrl-0 = <&scif2_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&scif5 { ++ pinctrl-0 = <&scif5_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&scif_clk { ++ clock-frequency = <14745600>; ++}; ++ ++&sdhi0 { ++ pinctrl-0 = <&sdhi0_pins>; ++ pinctrl-1 = <&sdhi0_pins_uhs>; ++ pinctrl-names = "default", "state_uhs"; ++ ++ vmmc-supply = <&vcc_sdhi0>; ++ vqmmc-supply = <&vccq_sdhi0>; ++ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; ++ bus-width = <4>; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&sdhi2 { ++ /* used for on-board 8bit eMMC */ ++ pinctrl-0 = <&sdhi2_pins>; ++ pinctrl-1 = <&sdhi2_pins_uhs>; ++ pinctrl-names = "default", "state_uhs"; ++ ++ iommus = <&ipmmu_ds1 34>; ++ ++ vmmc-supply = <®_3p3v>; ++ vqmmc-supply = <®_1p8v>; ++ bus-width = <8>; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ no-sd; ++ no-sdio; ++ non-removable; ++ fixed-emmc-driver-type = <1>; ++ status = "okay"; ++}; ++ ++&sdhi3 { ++ pinctrl-0 = <&sdhi3_pins>; ++ pinctrl-1 = <&sdhi3_pins_uhs>; ++ pinctrl-names = "default", "state_uhs"; ++ ++ vmmc-supply = <&vcc_sdhi3>; ++ vqmmc-supply = <&vccq_sdhi3>; ++ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; ++ bus-width = <4>; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&ssi4 { ++ shared-pin; ++}; ++ ++&usb_extal_clk { ++ clock-frequency = <50000000>; ++}; ++ ++&usb2_phy0 { ++ pinctrl-0 = <&usb0_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&usb2_phy1 { ++ pinctrl-0 = <&usb1_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&usb3_peri0 { ++ phys = <&usb3_phy0>; ++ phy-names = "usb"; ++ ++ status = "okay"; ++}; ++ ++&usb3_phy0 { ++ status = "okay"; ++}; ++ ++&usb3s0_clk { ++ clock-frequency = <100000000>; ++}; ++ ++&vin0 { ++ status = "okay"; ++}; ++ ++&vin1 { ++ status = "okay"; ++}; ++ ++&vin2 { ++ status = "okay"; ++}; ++ ++&vin3 { ++ status = "okay"; ++}; ++ ++&vin4 { ++ status = "okay"; ++}; ++ ++&vin5 { ++ status = "okay"; ++}; ++ ++&vin6 { ++ status = "okay"; ++}; ++ ++&vin7 { ++ status = "okay"; ++}; ++ ++&xhci0 { ++ pinctrl-0 = <&usb30_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts b/arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts +new file mode 100644 +index 000000000000..3d1107f6d9cc +--- /dev/null ++++ b/arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts +@@ -0,0 +1,392 @@ ++/* ++ * Device Tree Source for the AGL reference hardware board with R-Car H3 ES3.0 ++ * ++ * Copyright (C) 2019 Panasonic Corp. ++ * Copyright (C) 2020 Konsulko Group ++ * ++ * This file is licensed under the terms of the GNU General Public License ++ * version 2. This program is licensed "as is" without any warranty of any ++ * kind, whether express or implied. ++ */ ++ ++/* ++ * This file is for the most part derived from: ++ * ++ * - r8a77951-salvator-xs-4x2g.dts ++ * - r8a77951-salvator-xs.dts ++ * - salvator-xs.dtsi ++ * ++ * With agl-refhw-common.dtsi replacing (and derived from) salvator-common.dtsi. ++ */ ++ ++/dts-v1/; ++#include "r8a77951.dtsi" ++#include "agl-refhw-common.dtsi" ++ ++/ { ++ model = "AGL Reference Hardware based on r8a77951 ES3.0+ with 8GiB (4 x 2 GiB)"; ++ compatible = "agl,refhw-h3", "renesas,r8a7795"; ++ ++ memory@48000000 { ++ device_type = "memory"; ++ /* first 128MB is reserved for secure area. */ ++ reg = <0x0 0x48000000 0x0 0x78000000>; ++ }; ++ ++ memory@500000000 { ++ device_type = "memory"; ++ reg = <0x5 0x00000000 0x0 0x80000000>; ++ }; ++ ++ memory@600000000 { ++ device_type = "memory"; ++ reg = <0x6 0x00000000 0x0 0x80000000>; ++ }; ++ ++ memory@700000000 { ++ device_type = "memory"; ++ reg = <0x7 0x00000000 0x0 0x80000000>; ++ }; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ /* device specific region for Lossy Decompression */ ++ lossy_decompress: linux,lossy_decompress@54000000 { ++ no-map; ++ reg = <0x00000000 0x54000000 0x0 0x03000000>; ++ }; ++ ++ /* For Audio DSP */ ++ adsp_reserved: linux,adsp@57000000 { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x00000000 0x57000000 0x0 0x01000000>; ++ }; ++ ++ /* global autoconfigured region for contiguous allocations */ ++ linux,cma@58000000 { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x00000000 0x58000000 0x0 0x18000000>; ++ linux,cma-default; ++ }; ++ ++ /* device specific region for contiguous allocations */ ++ mmp_reserved: linux,multimedia@70000000 { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x00000000 0x70000000 0x0 0x10000000>; ++ }; ++ }; ++ ++ mmngr { ++ compatible = "renesas,mmngr"; ++ memory-region = <&mmp_reserved>, <&lossy_decompress>; ++ }; ++ ++ mmngrbuf { ++ compatible = "renesas,mmngrbuf"; ++ }; ++ ++ vspm_if { ++ compatible = "renesas,vspm_if"; ++ }; ++ ++ vga { ++ port { ++ vga_in: endpoint { ++ /delete-property/remote-endpoint; ++ }; ++ }; ++ }; ++ ++ vga-encoder { ++ ports { ++ port@0 { ++ adv7123_in: endpoint { ++ /delete-property/remote-endpoint; ++ }; ++ }; ++ ++ port@1 { ++ adv7123_out: endpoint { ++ /delete-property/remote-endpoint; ++ }; ++ }; ++ }; ++ }; ++ ++}; ++ ++&adsp { ++ status = "okay"; ++ memory-region = <&adsp_reserved>; ++}; ++ ++&du { ++ clocks = <&cpg CPG_MOD 724>, ++ <&cpg CPG_MOD 723>, ++ <&cpg CPG_MOD 722>, ++ <&cpg CPG_MOD 721>, ++ <&versaclock6 1>, ++ <&x21_clk>, ++ <&x22_clk>, ++ <&versaclock6 2>; ++ clock-names = "du.0", "du.1", "du.2", "du.3", ++ "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&hsusb3 { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&sound_card { ++ dais = <&rsnd_port0 /* ak4613 */ ++ &rsnd_port1 /* HDMI0 */ ++ &rsnd_port2>; /* HDMI1 */ ++}; ++ ++&hdmi0 { ++ status = "okay"; ++ ++ ports { ++ port@1 { ++ reg = <1>; ++ rcar_dw_hdmi0_out: endpoint { ++ remote-endpoint = <&hdmi0_con>; ++ }; ++ }; ++ port@2 { ++ reg = <2>; ++ dw_hdmi0_snd_in: endpoint { ++ remote-endpoint = <&rsnd_endpoint1>; ++ }; ++ }; ++ }; ++}; ++ ++&hdmi0_con { ++ remote-endpoint = <&rcar_dw_hdmi0_out>; ++}; ++ ++&hdmi1 { ++ status = "okay"; ++ ++ ports { ++ port@1 { ++ reg = <1>; ++ rcar_dw_hdmi1_out: endpoint { ++ remote-endpoint = <&hdmi1_con>; ++ }; ++ }; ++ port@2 { ++ reg = <2>; ++ dw_hdmi1_snd_in: endpoint { ++ remote-endpoint = <&rsnd_endpoint2>; ++ }; ++ }; ++ }; ++}; ++ ++&hdmi1_con { ++ remote-endpoint = <&rcar_dw_hdmi1_out>; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&rcar_sound { ++ ports { ++ /* rsnd_port0 is on salvator-common */ ++ rsnd_port1: port@1 { ++ reg = <1>; ++ rsnd_endpoint1: endpoint { ++ remote-endpoint = <&dw_hdmi0_snd_in>; ++ ++ dai-format = "i2s"; ++ bitclock-master = <&rsnd_endpoint1>; ++ frame-master = <&rsnd_endpoint1>; ++ ++ playback = <&ssi2>; ++ }; ++ }; ++ rsnd_port2: port@2 { ++ reg = <2>; ++ rsnd_endpoint2: endpoint { ++ remote-endpoint = <&dw_hdmi1_snd_in>; ++ ++ dai-format = "i2s"; ++ bitclock-master = <&rsnd_endpoint2>; ++ frame-master = <&rsnd_endpoint2>; ++ ++ playback = <&ssi3>; ++ }; ++ }; ++ }; ++}; ++ ++&pfc { ++ usb2_pins: usb2 { ++ groups = "usb2", "usb2_ovc"; ++ function = "usb2"; ++ }; ++ ++ /* ++ * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins ++ * (when SW31 is the default setting on Salvator-XS). ++ * - If SW31 is the default setting, you cannot use USB2.0 ch3 on ++ * r8a77951 with Salvator-XS. ++ * Hence the SW31 setting must be changed like 2) below. ++ * 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF: ++ * - Connect GP6_3[01] to ADV7842. ++ * 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON: ++ * - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power). ++ * - Connect GP6_{04,21} to ADV7842. ++ */ ++ usb2_ch3_pins: usb2_ch3 { ++ groups = "usb2_ch3"; ++ function = "usb2_ch3"; ++ }; ++}; ++ ++&usb2_phy2 { ++ pinctrl-0 = <&usb2_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&usb2_phy3 { ++ pinctrl-0 = <&usb2_ch3_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&vspbc { ++ status = "okay"; ++}; ++ ++&vspbd { ++ status = "okay"; ++}; ++ ++&vspi0 { ++ status = "okay"; ++}; ++ ++&vspi1 { ++ status = "okay"; ++}; ++ ++/* End r8a77951-salvator-xs.dts content */ ++ ++ ++/* Start r8a77951-salvator-xs-4x2g.dts content */ ++ ++&pciec0 { ++ /* Map all possible DDR as inbound ranges */ ++ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; ++}; ++ ++&pciec1 { ++ /* Map all possible DDR as inbound ranges */ ++ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; ++}; ++ ++/* End r8a77951-salvator-xs-4x2g.dts content */ ++ ++ ++/* Start salvator-xs.dts content */ ++ ++&extal_clk { ++ clock-frequency = <16640000>; ++}; ++ ++&i2c4 { ++ clock-frequency = <400000>; ++ ++ versaclock6: clock-generator@6a { ++ compatible = "idt,5p49v6901"; ++ reg = <0x6a>; ++ #clock-cells = <1>; ++ clocks = <&x23_clk>; ++ clock-names = "xin"; ++ }; ++}; ++ ++/* End salvator-xs.dts content */ ++ ++ ++/* Start reference hardware specific tweaks */ ++ ++&du { ++ ports { ++ port@0 { ++ endpoint { ++ /delete-property/remote-endpoint; ++ }; ++ }; ++ ++ port@3 { ++ endpoint { ++ /delete-property/remote-endpoint; ++ }; ++ }; ++ }; ++}; ++ ++&lvds0 { ++ status = "disabled"; ++}; ++ ++&pwm1 { ++ status = "disabled"; ++}; ++ ++&scif_clk { ++ clock-frequency = <0>; ++}; ++ ++&sdhi0 { ++ /delete-property/ wp-gpios; ++ non-removable; ++}; ++ ++&sdhi3 { ++ /delete-property/ wp-gpios; ++ non-removable; ++}; ++ ++&gpio6 { ++ /* Enable the CAN 1 & 2 transceivers */ ++ can-1-transceiver-stb { ++ gpio-hog; ++ gpios = <21 GPIO_ACTIVE_HIGH>; ++ output-low; ++ }; ++ can-2-transceiver-stb { ++ gpio-hog; ++ gpios = <12 GPIO_ACTIVE_HIGH>; ++ output-low; ++ }; ++}; +diff --git a/drivers/media/i2c/adv748x/adv748x-core.c b/drivers/media/i2c/adv748x/adv748x-core.c +index fe156e8f88b8..da295b106561 100644 +--- a/drivers/media/i2c/adv748x/adv748x-core.c ++++ b/drivers/media/i2c/adv748x/adv748x-core.c +@@ -97,6 +97,21 @@ static const struct adv748x_register_map adv748x_default_addresses[] = { + [ADV748X_PAGE_TXA] = { "txa", 0x4a }, + }; + ++static const struct adv748x_register_map adv748x_default_addresses2[] = { ++ [ADV748X_PAGE_IO] = { "main", 0x71 }, ++ [ADV748X_PAGE_DPLL] = { "dpll", 0x27 }, ++ [ADV748X_PAGE_CP] = { "cp", 0x23 }, ++ [ADV748X_PAGE_HDMI] = { "hdmi", 0x35 }, ++ [ADV748X_PAGE_EDID] = { "edid", 0x37 }, ++ [ADV748X_PAGE_REPEATER] = { "repeater", 0x33 }, ++ [ADV748X_PAGE_INFOFRAME] = { "infoframe", 0x28 }, ++ [ADV748X_PAGE_CBUS] = { "cbus", 0x29 }, ++ [ADV748X_PAGE_CEC] = { "cec", 0x42 }, ++ [ADV748X_PAGE_SDP] = { "sdp", 0x78 }, ++ [ADV748X_PAGE_TXB] = { "txb", 0x49 }, ++ [ADV748X_PAGE_TXA] = { "txa", 0x4b }, ++}; ++ + static int adv748x_read_check(struct adv748x_state *state, + int client_page, u8 reg) + { +@@ -183,10 +198,17 @@ static int adv748x_initialise_clients(struct adv748x_state *state) + int ret; + + for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) { +- state->i2c_clients[i] = i2c_new_ancillary_device( ++ if ((state->client->addr << 1) == 0xe0) { ++ state->i2c_clients[i] = i2c_new_ancillary_device( + state->client, + adv748x_default_addresses[i].name, + adv748x_default_addresses[i].default_addr); ++ } else { ++ state->i2c_clients[i] = i2c_new_ancillary_device( ++ state->client, ++ adv748x_default_addresses2[i].name, ++ adv748x_default_addresses2[i].default_addr); ++ } + + if (IS_ERR(state->i2c_clients[i])) { + adv_err(state, "failed to create i2c client %u\n", i); +-- +2.31.1 + diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0002-revert-e233201a.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0002-revert-e233201a.patch deleted file mode 100644 index 76039be..0000000 --- a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0002-revert-e233201a.patch +++ /dev/null @@ -1,47 +0,0 @@ -Revert "wl18xx: do not invert IRQ on WLxxxx side" - -This reverts commit 2bcfc394307ae164cbbdff74b902af61dc0181b4. -The hard-coded assumption that the IRQ inversion logic is not -needed breaks non-Kingfisher users, specifically the WLAN card -for the AGL reference hardware board. - -Signed-off-by: Scott Murray - ---- - drivers/net/wireless/ti/wl18xx/main.c | 8 -------- - 1 file changed, 8 deletions(-) - -diff --git a/drivers/net/wireless/ti/wl18xx/main.c b/drivers/net/wireless/ti/wl18xx/main.c -index 764987101116..0b3cf8477c6c 100644 ---- a/drivers/net/wireless/ti/wl18xx/main.c -+++ b/drivers/net/wireless/ti/wl18xx/main.c -@@ -865,9 +865,7 @@ static int wl18xx_pre_upload(struct wl1271 *wl) - { - u32 tmp; - int ret; --#if 0 - u16 irq_invert; --#endif - - BUILD_BUG_ON(sizeof(struct wl18xx_mac_and_phy_params) > - WL18XX_PHY_INIT_MEM_SIZE); -@@ -920,11 +918,6 @@ static int wl18xx_pre_upload(struct wl1271 *wl) - if (ret < 0) - goto out; - --#if 0 -- /* We have level translator with inversion on IRQ line so we -- * set IRQ_TYPE_EDGE_FALLING in DTS, but we do not need to -- * invert IRQ logic on WLxxxx side! -- */ - ret = irq_get_trigger_type(wl->irq); - if ((ret == IRQ_TYPE_LEVEL_LOW) || (ret == IRQ_TYPE_EDGE_FALLING)) { - wl1271_info("using inverted interrupt logic: %d", ret); -@@ -944,7 +937,6 @@ static int wl18xx_pre_upload(struct wl1271 *wl) - - ret = wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]); - } --#endif - - out: - return ret; diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-Add-support-for-TI-WL1837.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-Add-support-for-TI-WL1837.patch new file mode 100644 index 0000000..7cb1521 --- /dev/null +++ b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-Add-support-for-TI-WL1837.patch @@ -0,0 +1,240 @@ +From 8d08ab1372ede05e1c9dabdd242fd4bb1e0be414 Mon Sep 17 00:00:00 2001 +From: Scott Murray +Date: Tue, 21 Sep 2021 15:52:18 -0400 +Subject: [PATCH 3/4] Add support for TI WL1837 + +This patch adds description of TI WL1837 and links interfaces +to communicate with the IC. + +Signed-off-by: ito.yoshiki001 + +Reworked: +- WL1837 specific devicetree configuration moved to the board + specific r8a77951-agl-refhw.dts from agl-refhw-common.dtsi. +- Switched to HCI_LL driver for BT support to match other upstream + users and prepare for btwilink driver going away (dropped in 5.5 + upstream). +- WLAN_PWR_EN enabling moved to GPIO initialization to work around + BT initialization problems. +- Update sound configuration to enable WL1837 BT audio, and disable + the HDMI1 audio left over from the original Salvator-X devicetree. + The latter is clean up, as HDMI1 as defined uses a SSI that + conflicts with the ak4613 configuration. +- Updated for kernel 5.10 in BSP v5.5.0. + +Signed-off-by: Scott Murray +--- + .../boot/dts/renesas/agl-refhw-common.dtsi | 37 +++++--- + .../boot/dts/renesas/r8a77951-agl-refhw.dts | 84 +++++++++++++++---- + 2 files changed, 94 insertions(+), 27 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi +index 7474ed578c21..3ae835a1ff13 100644 +--- a/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi ++++ b/arch/arm64/boot/dts/renesas/agl-refhw-common.dtsi +@@ -183,6 +183,18 @@ vccq_sdhi3: regulator-vccq-sdhi3 { + 1800000 0>; + }; + ++ wlan_en: regulator-wlan_en { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "wlan-en-regulator"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpio = <&gpio7 2 GPIO_ACTIVE_HIGH>; ++ startup-delay-us = <70000>; ++ enable-active-high; ++ }; ++ + hdmi0-out { + compatible = "hdmi-connector"; + label = "HDMI0 OUT"; +@@ -673,7 +685,8 @@ sdhi3_pins_uhs: sd3_uhs { + }; + + sound_pins: sound { +- groups = "ssi349_ctrl", "ssi3_data", "ssi4_data"; ++ groups = "ssi349_ctrl", "ssi3_data", "ssi4_data", ++ "ssi78_ctrl", "ssi7_data", "ssi8_data"; + function = "ssi"; + }; + +@@ -828,24 +841,28 @@ &sdhi2 { + }; + + &sdhi3 { ++ /* Default WLAN card configuration */ + pinctrl-0 = <&sdhi3_pins>; +- pinctrl-1 = <&sdhi3_pins_uhs>; +- pinctrl-names = "default", "state_uhs"; ++ pinctrl-names = "default"; + +- vmmc-supply = <&vcc_sdhi3>; +- vqmmc-supply = <&vccq_sdhi3>; +- cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; +- wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; ++ vmmc-supply = <&wlan_en>; + bus-width = <4>; +- sd-uhs-sdr50; +- sd-uhs-sdr104; +- status = "okay"; ++ no-1-8-v; ++ non-removable; ++ cap-power-off-card; ++ keep-power-in-suspend; ++ ++ /* leave disabled by default */ + }; + + &ssi4 { + shared-pin; + }; + ++&ssi8 { ++ shared-pin; ++}; ++ + &usb_extal_clk { + clock-frequency = <50000000>; + }; +diff --git a/arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts b/arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts +index 3d1107f6d9cc..24ba2c5c4b88 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts ++++ b/arch/arm64/boot/dts/renesas/r8a77951-agl-refhw.dts +@@ -119,6 +119,23 @@ adv7123_out: endpoint { + }; + }; + ++ sound_wl18xx { ++ compatible = "audio-graph-card"; ++ label = "wl18xx"; ++ ++ dais = <&rsnd_port2>; ++ }; ++ ++ wl18xx_pcm { ++ compatible = "ti,wl18xx-pcm"; ++ status = "okay"; ++ ++ port { ++ wl18xx_endpoint: endpoint { ++ remote-endpoint = <&rsnd_for_wl18xx>; ++ }; ++ }; ++ }; + }; + + &adsp { +@@ -155,8 +172,14 @@ &hsusb3 { + + &sound_card { + dais = <&rsnd_port0 /* ak4613 */ +- &rsnd_port1 /* HDMI0 */ +- &rsnd_port2>; /* HDMI1 */ ++ &rsnd_port1>; /* HDMI0 */ ++}; ++ ++&hscif0 { ++ bluetooth { ++ compatible = "ti,wl1837-st"; ++ enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &hdmi0 { +@@ -192,12 +215,6 @@ rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; +- port@2 { +- reg = <2>; +- dw_hdmi1_snd_in: endpoint { +- remote-endpoint = <&rsnd_endpoint2>; +- }; +- }; + }; + }; + +@@ -215,8 +232,11 @@ &ohci3 { + }; + + &rcar_sound { ++ /* Multi DAI */ ++ #sound-dai-cells = <1>; ++ + ports { +- /* rsnd_port0 is on salvator-common */ ++ /* rsnd_port0 is in agl-refhw-common */ + rsnd_port1: port@1 { + reg = <1>; + rsnd_endpoint1: endpoint { +@@ -231,14 +251,15 @@ rsnd_endpoint1: endpoint { + }; + rsnd_port2: port@2 { + reg = <2>; +- rsnd_endpoint2: endpoint { +- remote-endpoint = <&dw_hdmi1_snd_in>; ++ rsnd_for_wl18xx: endpoint { ++ remote-endpoint = <&wl18xx_endpoint>; + +- dai-format = "i2s"; +- bitclock-master = <&rsnd_endpoint2>; +- frame-master = <&rsnd_endpoint2>; ++ simple-audio-card,format = "i2s"; ++ bitclock-master = <&wl18xx_endpoint>; ++ frame-master = <&wl18xx_endpoint>; + +- playback = <&ssi3>; ++ playback = <&ssi7>; ++ capture = <&ssi8>; + }; + }; + }; +@@ -373,11 +394,40 @@ &sdhi0 { + }; + + &sdhi3 { +- /delete-property/ wp-gpios; +- non-removable; ++ status = "okay"; ++ ++ max-frequency = <50000000>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ wlcore: wlcore@2 { ++ compatible = "ti,wl1837"; ++ reg = <2>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <25 IRQ_TYPE_EDGE_FALLING>; ++ }; + }; + + &gpio6 { ++ /* ++ * Enable WLAN_PWR_EN right from boot to get reliable BT ++ * initialization, as doing it at SDHI initialization ++ * does not seem to do so, no matter how much BT_EN is ++ * delayed. ++ * ++ * This is perhaps not ideal per the requirements described ++ * in the "Level Shifting WL18xx/WL18xxMOD/WL18xxQ I/Os" ++ * document (SWRA448A)[1], but the BT UART seems unusable ++ * otherwise. ++ * ++ * [1] https://www.ti.com/lit/an/swra448a/swra448a.pdf ++ */ ++ wlan-pwr-en { ++ gpio-hog; ++ gpios = <9 GPIO_ACTIVE_HIGH>; ++ output-high; ++ }; ++ + /* Enable the CAN 1 & 2 transceivers */ + can-1-transceiver-stb { + gpio-hog; +-- +2.31.1 + diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-rcar3-dw-hdmi-cec-mute.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-rcar3-dw-hdmi-cec-mute.patch deleted file mode 100644 index b0663ca..0000000 --- a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0003-rcar3-dw-hdmi-cec-mute.patch +++ /dev/null @@ -1,25 +0,0 @@ -Mute CEC IRQ in dw-hdmi driver init - -Add muting of the CEC interrupt to initialize_hdmi_rcar_ih_mutes, -which it previously did not have, unlike the original generic -initialize_hdmi_ih_mutes function. - -Author: Kato Kazuomi (加藤 一臣) -Signed-off-by: Scott Murray - ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index cedae37e6d28..b4a29d3954ae 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1906,6 +1906,7 @@ static void initialize_hdmi_rcar_ih_mutes(struct dw_hdmi *hdmi) - hdmi_writeb(hdmi, 0x1f, HDMI_IH_MUTE_AS_STAT0); - hdmi_writeb(hdmi, 0x3f, HDMI_IH_MUTE_PHY_STAT0); - hdmi_writeb(hdmi, 0x03, HDMI_IH_MUTE_I2CM_STAT0); -+ hdmi_writeb(hdmi, 0x7f, HDMI_IH_MUTE_CEC_STAT0); - hdmi_writeb(hdmi, 0x0f, HDMI_IH_MUTE_VP_STAT0); - hdmi_writeb(hdmi, 0x03, HDMI_IH_MUTE_I2CMPHY_STAT0); - diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/files/0004-Mute-CEC-IRQ-in-dw-hdmi-driver-init.patch b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0004-Mute-CEC-IRQ-in-dw-hdmi-driver-init.patch new file mode 100644 index 0000000..0ad8374 --- /dev/null +++ b/meta-agl-refhw-gen3/recipes-kernel/linux/files/0004-Mute-CEC-IRQ-in-dw-hdmi-driver-init.patch @@ -0,0 +1,33 @@ +From 23cc66769400cc94c6baad7be66475ff004da3cc Mon Sep 17 00:00:00 2001 +From: invalid_git config +Date: Tue, 26 Oct 2021 21:15:42 +0000 +Subject: [PATCH 4/4] Mute CEC IRQ in dw-hdmi driver init +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add muting of the CEC interrupt to initialize_hdmi_rcar_ih_mutes, +which it previously did not have, unlike the original generic +initialize_hdmi_ih_mutes function. + +Author: Kato Kazuomi (加藤 一臣) +Signed-off-by: Scott Murray +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index e856bffa4f70..dd31ebeb8ddf 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2329,6 +2329,7 @@ static void initialize_hdmi_rcar_ih_mutes(struct dw_hdmi *hdmi) + hdmi_writeb(hdmi, 0x1f, HDMI_IH_MUTE_AS_STAT0); + hdmi_writeb(hdmi, 0x3f, HDMI_IH_MUTE_PHY_STAT0); + hdmi_writeb(hdmi, 0x03, HDMI_IH_MUTE_I2CM_STAT0); ++ hdmi_writeb(hdmi, 0x7f, HDMI_IH_MUTE_CEC_STAT0); + hdmi_writeb(hdmi, 0x0f, HDMI_IH_MUTE_VP_STAT0); + hdmi_writeb(hdmi, 0x03, HDMI_IH_MUTE_I2CMPHY_STAT0); + +-- +2.31.1 + diff --git a/meta-agl-refhw-gen3/recipes-kernel/linux/linux-renesas_%.bbappend b/meta-agl-refhw-gen3/recipes-kernel/linux/linux-renesas_%.bbappend index 325e507..fee4c77 100644 --- a/meta-agl-refhw-gen3/recipes-kernel/linux/linux-renesas_%.bbappend +++ b/meta-agl-refhw-gen3/recipes-kernel/linux/linux-renesas_%.bbappend @@ -1,11 +1,10 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/files:" SRC_URI_append = " \ - file://0001-create-r8a7795-usb-ovc-pinmux-groups.patch \ - file://0001-add-agl-refhw.patch \ - file://0003-rcar3-dw-hdmi-cec-mute.patch \ - file://0001-Add-support-for-TI-WL1837.patch \ - file://0002-revert-e233201a.patch \ + file://0001-Create-r8a7795-USB-OVC-pin-groups.patch \ + file://0002-Add-AGL-reference-hardware-support.patch \ + file://0003-Add-support-for-TI-WL1837.patch \ + file://0004-Mute-CEC-IRQ-in-dw-hdmi-driver-init.patch \ file://refhw-rcar.cfg \ " -- cgit 1.2.3-korg