/* * Jailhouse, a Linux-based partitioning hypervisor * * Configuration for Linux inmate, 1 CPU, 74 MB RAM, ~1MB shmem, serial ports * * Copyright (c) Siemens AG, 2013-2015 * * Authors: * Jan Kiszka * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include #include struct { struct jailhouse_cell_desc cell; __u64 cpus[1]; struct jailhouse_memory mem_regions[20]; struct jailhouse_cache cache_regions[1]; struct jailhouse_irqchip irqchips[1]; struct jailhouse_pio pio_regions[1]; struct jailhouse_pci_device pci_devices[4]; struct jailhouse_pci_capability pci_caps[6]; } __attribute__((packed)) config = { .cell = { .signature = JAILHOUSE_CELL_DESC_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .name = "linux-x86-demo", .flags = JAILHOUSE_CELL_PASSIVE_COMMREG | JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED, .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_cache_regions = ARRAY_SIZE(config.cache_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .num_pio_regions = ARRAY_SIZE(config.pio_regions), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .num_pci_caps = ARRAY_SIZE(config.pci_caps), }, .cpus = { 0b1100, }, .mem_regions = { /* IVSHMEM shared memory region (virtio-blk front) */ { .phys_start = 0x27000000, /* to 0x27001000 */ .virt_start = 0x27000000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0x27001000,/* to 0x270e0000 */ .virt_start = 0x27001000, .size = 0xdf000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, { 0 }, { 0 }, /* IVSHMEM shared memory region (virtio-con front) */ { .phys_start = 0x270e0000,/* to 0x270e1000 */ .virt_start = 0x270e0000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0x270e1000,/*to 0x270f0000 */ .virt_start = 0x270e1000, .size = 0xf000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, { 0 }, { 0 }, /* IVSHMEM shared memory regions (demo) */ { .phys_start = 0x270f0000,/*to 0x270f1000 */ .virt_start = 0x270f0000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0x270f1000,/*to 0x270fa000 */ .virt_start = 0x270f1000, .size = 0x9000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0x270fa000,/* to 0x270fc000 */ .virt_start = 0x270fa000, .size = 0x2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0x270fc000,/* to 0x270fe000*/ .virt_start = 0x270fc000, .size = 0x2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0x270fe000,/* to 0x27100000 */ .virt_start = 0x270fe000, .size = 0x2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, /* IVSHMEM shared memory regions (networking) */ JAILHOUSE_SHMEM_NET_REGIONS(0x27100000, 1), /* low RAM */ { .phys_start = 0x22600000,/* to 0x22700000*/ .virt_start = 0, .size = 0x00100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | JAILHOUSE_MEM_LOADABLE, }, /* communication region */ { /*.phys_start = ? */ .virt_start = 0x00100000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_COMM_REGION, }, /* high RAM */ { .phys_start = 0x22700000,/*to 0x26e00000 */ .virt_start = 0x00200000, .size = 0x4700000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | JAILHOUSE_MEM_LOADABLE, }, }, .cache_regions = { { .start = 0, .size = 2, .type = JAILHOUSE_CACHE_L3, }, }, .irqchips = { /* IOAPIC */ { .address = 0xfec00000, .id = 0xff00, .pin_bitmap = { (1 << 3) | (1 << 4), }, }, }, .pio_regions = { PIO_RANGE(0x2f8, 8), /* serial 2 */ // PIO_RANGE(0x3f8, 8), /* serial 1 */ PIO_RANGE(0xe010, 8), /* OXPCIe952 serial1 */ }, .pci_devices = { { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 0x0, .bdf = 0x0c << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX, .num_msix_vectors = 2, .shmem_regions_start = 0, .shmem_dev_id = 1, .shmem_peers = 2, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VIRTIO_FRONT + VIRTIO_DEV_BLOCK, }, { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 0x0, .bdf = 0x0d << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX, .num_msix_vectors = 3, .shmem_regions_start = 4, .shmem_dev_id = 1, .shmem_peers = 2, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VIRTIO_FRONT + VIRTIO_DEV_CONSOLE, }, { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 0x0, .bdf = 0x0e << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX, .num_msix_vectors = 16, .shmem_regions_start = 8, .shmem_dev_id = 2, .shmem_peers = 3, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, }, { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 0x0, .bdf = 0x0f << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX, .num_msix_vectors = 2, .shmem_regions_start = 13, .shmem_dev_id = 1, .shmem_peers = 2, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, }, }, .pci_caps = { { .id = PCI_CAP_ID_MSI, .start = 0xd0, .len = 14, .flags = JAILHOUSE_PCICAPS_WRITE, }, { .id = PCI_CAP_ID_EXP, .start = 0xe0, .len = 20, .flags = JAILHOUSE_PCICAPS_WRITE, }, { .id = PCI_CAP_ID_MSIX, .start = 0xa0, .len = 12, .flags = JAILHOUSE_PCICAPS_WRITE, }, { .id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP, .start = 0x100, .len = 4, .flags = 0, }, { .id = PCI_EXT_CAP_ID_DSN | JAILHOUSE_PCI_EXT_CAP, .start = 0x140, .len = 4, .flags = 0, }, } };