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authorRonan Le Martret <ronan.lemartret@iot.bzh>2018-08-30 12:16:20 +0000
committerRonan Le Martret <ronan.lemartret@iot.bzh>2018-09-22 12:31:15 +0000
commite549f0c0e9d5c4d62394c7cef89a913eeb76f904 (patch)
tree21109582936ba7a63fb3ae4461906885c464813a
parentb78b98ae25057d5afe4bff70581f37a0ff5e4a0e (diff)
* As the driver files come from out of git repository, we need to check driver file integrity. Change-Id: I46f2a281f8da1ae606e8ae1ee55324fd5fd9b772 Signed-off-by: Ronan Le Martret <ronan.lemartret@iot.bzh>
-rw-r--r--meta-rcar-gen3/include/checksum_control.inc25
-rw-r--r--meta-rcar-gen3/include/checksum_control_files.inc15
-rw-r--r--meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb2
-rw-r--r--meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb2
-rw-r--r--meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb1
5 files changed, 45 insertions, 0 deletions
diff --git a/meta-rcar-gen3/include/checksum_control.inc b/meta-rcar-gen3/include/checksum_control.inc
new file mode 100644
index 0000000..e0decc7
--- /dev/null
+++ b/meta-rcar-gen3/include/checksum_control.inc
@@ -0,0 +1,25 @@
+require include/checksum_control_files.inc
+
+python do_checksum_control() {
+ to_check_dico = d.getVarFlags("CTL_CHECKSUM")
+ if to_check_dico is None:
+ return 0
+
+ src_uri = (d.getVar('SRC_URI') or "").split()
+ for s in src_uri:
+ c_source=os.path.basename(s)
+ bb.note("Check source: %s " % (c_source))
+ if c_source in to_check_dico:
+ f_data = bb.fetch2.FetchData(s, d, True)
+ f_data.setup_localpath(d)
+ if os.path.exists(f_data.localpath):
+ mdr5_sum=bb.utils.md5_file(f_data.localpath)
+ mdr5_ctl=to_check_dico[c_source]
+ if mdr5_sum != mdr5_ctl:
+ bb.fatal( "File %s hash should be %s but %s find, please update your driver files." % (c_source, mdr5_ctl, mdr5_sum))
+}
+
+do_checksum_control[doc] = "Do a checksum of the archives source files"
+do_checksum_control[vardeps] = "CTL_CHECKSUM"
+
+addtask do_checksum_control before do_unpack after do_fetch
diff --git a/meta-rcar-gen3/include/checksum_control_files.inc b/meta-rcar-gen3/include/checksum_control_files.inc
new file mode 100644
index 0000000..258df0e
--- /dev/null
+++ b/meta-rcar-gen3/include/checksum_control_files.inc
@@ -0,0 +1,15 @@
+CTL_CHECKSUM[RCG3VUDRL4101ZDO.tar.bz2] = "0e546389d77b9108a1475356fa49c5a7"
+CTL_CHECKSUM[GSX_KM_M3.tar.bz2] = "0e40eb2e123918655a0e4a42015240b9"
+CTL_CHECKSUM[GSX_KM_H3.tar.bz2] = "b70995eb15a784c7f622fe036179d0bb"
+CTL_CHECKSUM[r8a77951_linux_gsx_binaries_gles.tar.bz2] = "2fd68a3e08c6f593e6a7b85c20b063dd"
+CTL_CHECKSUM[r8a77960_linux_gsx_binaries_gles.tar.bz2] = "654b905d938ef8ae8ea257d14d578108"
+CTL_CHECKSUM[RTM0AC0000ADAACMZ1SL41C.tar.gz] = "83c22b66ecde28ab236a868af6b1a66c"
+CTL_CHECKSUM[RTM0AC0000AEAACMZ1SL41C.tar.gz] = "c1fa7b811b28546734aa4716fdec24d1"
+CTL_CHECKSUM[EVARTM0AC0000XV264D30SL41C.tar.bz2] = "7ac0ffe1deaf56e7df8db9a9cf2431ed"
+CTL_CHECKSUM[EVARTM0AC0000XVCMND30SL41C.tar.bz2] = "d29d7ec63470ab2c8441848d526b408c"
+CTL_CHECKSUM[RTM0AC0000XAAACD30SL41C.tar.gz] = "35554c434797a28a40520f8db1962e9f"
+CTL_CHECKSUM[EVARTM0AC0000XV264E30SL41C.tar.bz2] = "27c54775b3fefadb902d4474f73b8802"
+CTL_CHECKSUM[RTM0AC0000XAAACE30SL41C.tar.gz] = "e052a270ae2737b90092d0fba69cdecb"
+CTL_CHECKSUM[EVARTM0AC0000XVCMNE30SL41C.tar.bz2] = "f04c724c982b9ade3acc76a577c6a2c3"
+CTL_CHECKSUM[RTM0AC0000XACMND30SL41C.tar.gz] = "f515f19fd9d7a5f0845ebb2143d169d8"
+CTL_CHECKSUM[EVARTM0AC0000XCMCTL30SL41C.tar.bz2] = "553d57dbe2b379edf15bd15b6c5a9724"
diff --git a/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb b/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb
index f43a791..dc70d6a 100644
--- a/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb
+++ b/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb
@@ -5,6 +5,8 @@ LIC_FILES_CHKSUM = " \
file://MIT-COPYING;md5=8c2810fa6bfdc5ae5c15a0c1ade34054 \
"
inherit module
+require include/checksum_control.inc
+
PN = "kernel-module-gles"
PR = "r0"
diff --git a/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb b/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb
index 7fbc430..0503101 100644
--- a/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb
+++ b/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb
@@ -12,8 +12,10 @@ LIC_FILES_CHKSUM = " \
"
require include/omx-control.inc
require include/rcar-gen3-path-common.inc
+require include/checksum_control.inc
inherit module
+
PR = "r0"
UVCS_SRC = "${@base_conditional('USE_VIDEO_OMX', '1', 'file://RCG3VUDRL4101ZDO.tar.bz2', '', d)}"
diff --git a/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb b/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb
index 6515e1f..ea24a41 100644
--- a/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb
+++ b/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb
@@ -17,6 +17,7 @@ include ${INCLUDE_FILE}-omx-user-module.inc
DEPENDS += '${@base_conditional("USE_VIDEO_OMX", "1", "kernel-module-uvcs-drv", "", d )}'
inherit autotools
+require include/checksum_control.inc
includedir = "${RENESAS_DATADIR}/include"
CFLAGS += " -I${STAGING_DIR_HOST}${RENESAS_DATADIR}/include"