rcar-gen3: IPL: Update SRCREV to follow the latest version

This commit updates IPL and Secure Monitor to Rev1.0.20 rev2 for
following changes:

[IPL]
- [H/W Restriction No.100] Disable TLB function on IPMMU-PV1 cache on
H3 Ver.2.0.
- Update H3 Ver.3.0 QoS setting rev.0.06.
- Fix the IPL cannot load images to 40-bit address space with eMMC when
D-Cache enables.
- Add processing to read MSTP status into BL2.
- Delete unnecessary register setting.
- Add the SWTCNT setting of E3.
- Change the unit of transfer size to 256 bytes for RPC, and improved
DMA transfer processing.
- Add DDR Memory Config log.

[Secure Monitor]
- Add processing to read MSTP status into BL31.

For optee_os, it updates reversion to Rev1.0.13 for following change:
- Add processing to read MSTP status into MFIS.

It deletes the option which enables Lossy area for E3.
It also supports build option for H3:

- For R-Car H3 SiP DDR 8GiB (2GiB x 4ch), specify "RCAR_DRAM_SPLIT=1"
- For R-Car H3 SiP DDR 4GiB (2GiB X 2ch), specify "RCAR_DRAM_SPLIT=2
RCAR_DRAM_CHANNEL=5"
- For R-Car H3 SiP DDR 4GiB (1GiB x 4ch), specify "RCAR_DRAM_SPLIT=1
RCAR_DRAM_LPDDR4_MEMCONF=0"

Signed-off-by: Khang Nguyen <khang.nguyen.xv@rvc.renesas.com>
Signed-off-by: Takamitsu Honda <takamitsu.honda.pv@renesas.com>

2 files changed, 6 insertions, 4 deletions

diff --git a/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb b/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
index ecb287c..7b9a5d8 100644
--- a/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
+++ b/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
@@ -7,22 +7,24 @@ PACKAGE_ARCH = "${MACHINE_ARCH}"
 
 inherit deploy
 require include/multimedia-control.inc
+require include/arm-trusted-firmware-control.inc
 
 S = "${WORKDIR}/git"
 
 BRANCH = "rcar_gen3"
 SRC_URI = "git://github.com/renesas-rcar/arm-trusted-firmware.git;branch=${BRANCH}"
-SRCREV = "3f4912a3199c19ac3253dc95a1e3ecd5af8f0efd"
+SRCREV = "1eee0adaee2769fa22b72d4cde5a1897047ece68"
 
 PV = "v1.4+renesas+git${SRCPV}"
 
 COMPATIBLE_MACHINE = "(salvator-x|ulcb|ebisu)"
 PLATFORM = "rcar"
+H3_IPL_OPTION = "${@get_ipl_config_opt(d)}"
 ATFW_OPT_LOSSY = "${@base_conditional("USE_MULTIMEDIA", "1", "RCAR_LOSSY_ENABLE=1", "", d)}"
-ATFW_OPT_r8a7795 = "LSI=H3 RCAR_DRAM_SPLIT=1 ${ATFW_OPT_LOSSY}"
+ATFW_OPT_r8a7795 = "LSI=H3 ${H3_IPL_OPTION} ${ATFW_OPT_LOSSY}"
 ATFW_OPT_r8a7796 = "LSI=M3 RCAR_DRAM_SPLIT=2 ${ATFW_OPT_LOSSY}"
 ATFW_OPT_r8a77965 = "LSI=M3N ${ATFW_OPT_LOSSY}"
-ATFW_OPT_r8a77990 = "LSI=E3 RCAR_SA0_SIZE=0 RCAR_AVS_SETTING_ENABLE=0 ${ATFW_OPT_LOSSY}"
+ATFW_OPT_r8a77990 = "LSI=E3 RCAR_SA0_SIZE=0 RCAR_AVS_SETTING_ENABLE=0"
 ATFW_OPT_append_ulcb = " RCAR_GEN3_ULCB=1 PMIC_LEVEL_MODE=0"
 
 # requires CROSS_COMPILE set by hand as there is no configure script
diff --git a/meta-rcar-gen3/recipes-bsp/optee/optee-os_git.bb b/meta-rcar-gen3/recipes-bsp/optee/optee-os_git.bb
index ee73de3..604ad9a 100644
--- a/meta-rcar-gen3/recipes-bsp/optee/optee-os_git.bb
+++ b/meta-rcar-gen3/recipes-bsp/optee/optee-os_git.bb
@@ -13,7 +13,7 @@ inherit deploy pythonnative
 PV = "2.6.0+renesas+git${SRCPV}"
 
 BRANCH = "rcar_gen3"
-SRCREV_renesas = "58147841a05b8a09aa92a8fae60b3207e4fe72bc"
+SRCREV_renesas = "894c561158d7f63e4211cdad46ff69cf220bc972"
 SRCREV_officialgit = "6d57389f9eec0c213da917e35861a8eca4b205b3"
 SRCREV_FORMAT = "renesas_officialgit"