From 06e06e1312b81efe05481e1218c8d032f53c27f5 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Fri, 3 Nov 2017 18:50:27 +0300 Subject: R8A7797: kernel updates - add CANFD - add V3M videobox board - add CANFD to V3M KF - add eMMC to V3MSK based boards --- ...as-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch | 121 ++- .../0040-arm64-dts-renesas-add-ADAS-boards.patch | 848 +++++++++++++++++---- 2 files changed, 755 insertions(+), 214 deletions(-) (limited to 'meta-rcar-gen3-adas') diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch index f1a2cd6..93cf1ec 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch @@ -8,7 +8,7 @@ This adds Renesas R8A7797 SoC support Signed-off-by: Vladimir Barinov --- arch/arm64/Kconfig.platforms | 6 + - arch/arm64/boot/dts/renesas/r8a7797.dtsi | 992 ++++++++++ + arch/arm64/boot/dts/renesas/r8a7797.dtsi | 973 ++++++++++ drivers/clk/renesas/Kconfig | 1 + drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/r8a7797-cpg-mssr.c | 218 +++ @@ -48,7 +48,7 @@ Signed-off-by: Vladimir Barinov drivers/thermal/rcar_gen3_thermal.c | 29 + include/dt-bindings/clock/r8a7797-cpg-mssr.h | 48 + include/dt-bindings/power/r8a7797-sysc.h | 32 + - 41 files changed, 4275 insertions(+), 30 deletions(-) + 41 files changed, 4256 insertions(+), 30 deletions(-) create mode 100644 arch/arm64/boot/dts/renesas/r8a7797.dtsi create mode 100644 drivers/clk/renesas/r8a7797-cpg-mssr.c create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a7797.c @@ -75,10 +75,10 @@ index 7c104ca..9380fc6 100644 help diff --git a/arch/arm64/boot/dts/renesas/r8a7797.dtsi b/arch/arm64/boot/dts/renesas/r8a7797.dtsi new file mode 100644 -index 0000000..5bd447a +index 0000000..30638e3 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797.dtsi -@@ -0,0 +1,992 @@ +@@ -0,0 +1,973 @@ +/* + * Device Tree Source for the r8a7797 SoC + * @@ -554,20 +554,19 @@ index 0000000..5bd447a + #size-cells = <0>; + }; + -+ /* Future + canfd: canfd@e66c0000 { + compatible = "renesas,r8a7797-canfd", + "renesas,rcar-gen3-canfd"; + reg = <0 0xe66c0000 0 0x8000>; + interrupts = , -+ ; ** SPI29:CAN-FD channel, SPI30:CAN-FD global ** ++ ; + clocks = <&cpg CPG_MOD 914>, + <&cpg CPG_CORE R8A7797_CLK_CANFD>, -+ <&can_clk>; ** RMSTPCR9/bit14:CAN-FD ** ++ <&can_clk>; + clock-names = "fck", "canfd", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A7797_CLK_CANFD>; + assigned-clock-rates = <40000000>; -+ power-domains = <&cpg>; ++ power-domains = <&sysc R8A7797_PD_ALWAYS_ON>; + status = "disabled"; + + channel0 { @@ -577,7 +576,7 @@ index 0000000..5bd447a + channel1 { + status = "disabled"; + }; -+ }; */ ++ }; + + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a7797", "renesas,pwm-rcar"; @@ -911,31 +910,13 @@ index 0000000..5bd447a + status = "disabled"; + }; + -+ + sdhi2: sd@ee140000 { + compatible = "renesas,sdhi-r8a7797"; + reg = <0 0xee140000 0 0x2000>; -+ interrupts = ; /* SPI165:SDHI.ch0 */ -+ clocks = <&cpg CPG_MOD 314>; /* RMSTPCR3/bit14:SDIF */ -+ power-domains = <&sysc R8A7797_PD_ALWAYS_ON>; -+ renesas,clk-rate = <200000000>; -+ cap-sd-highspeed; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ renesas,mmc-scc-tapnum = <8>; -+ status = "disabled"; -+ }; -+ -+ mmc0: mmc@ee140000 { -+ compatible = "renesas,mmc-r8a7797"; -+ reg = <0 0xee140000 0 0x2000>; -+ interrupts = ; /* SPI165:SDHI.ch0 */ -+ clocks = <&cpg CPG_MOD 314>; /* RMSTPCR3/bit14:SDIF */ ++ interrupts = ; ++ clocks = <&cpg CPG_MOD 314>; + power-domains = <&sysc R8A7797_PD_ALWAYS_ON>; + renesas,clk-rate = <200000000>; -+ cap-mmc-highspeed; -+ mmc-hs200-1_8v; -+ renesas,mmc-scc-tapnum = <8>; + status = "disabled"; + }; + @@ -1097,7 +1078,7 @@ index 1072f76..c6f0abb 100644 obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o clk-div6.o diff --git a/drivers/clk/renesas/r8a7797-cpg-mssr.c b/drivers/clk/renesas/r8a7797-cpg-mssr.c new file mode 100644 -index 0000000..c69bf31 +index 0000000..c8e9a3f --- /dev/null +++ b/drivers/clk/renesas/r8a7797-cpg-mssr.c @@ -0,0 +1,218 @@ @@ -1320,7 +1301,7 @@ index 0000000..c69bf31 + .cpg_clk_register = rcar_gen3_cpg_clk_register, +}; diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c -index f9d1763..96de154 100644 +index 1cd2c05..b145f14 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -26,6 +26,13 @@ @@ -1337,7 +1318,7 @@ index f9d1763..96de154 100644 #define CPG_PLL0CR 0x00d8 #define CPG_PLL2CR 0x002c #define CPG_PLL4CR 0x01f4 -@@ -227,7 +234,10 @@ static unsigned long cpg_z2_clk_recalc_rate(struct clk_hw *hw, +@@ -228,7 +235,10 @@ static unsigned long cpg_z2_clk_recalc_rate(struct clk_hw *hw, unsigned int val; unsigned long rate; @@ -1349,7 +1330,7 @@ index f9d1763..96de154 100644 mult = 32 - val; rate = div_u64((u64)parent_rate * mult + 16, 32); -@@ -339,6 +349,11 @@ static int cpg_z2_clk_set_rate(struct clk_hw *hw, unsigned long rate, +@@ -372,6 +382,11 @@ static int cpg_z2_clk_set_rate(struct clk_hw *hw, unsigned long rate, u32 val, kick; unsigned int i; @@ -1361,7 +1342,7 @@ index f9d1763..96de154 100644 mult = div_u64((u64)rate * 32 + parent_rate/2, parent_rate); mult = clamp(mult, 1U, 32U); -@@ -451,6 +466,19 @@ static struct clk * __init cpg_z2_clk_register(const char *name, +@@ -566,6 +581,19 @@ static struct clk * __init cpg_zg_clk_register(const char *name, /* * SDn Clock */ @@ -1381,7 +1362,7 @@ index f9d1763..96de154 100644 #define CPG_SD_STP_HCK BIT(9) #define CPG_SD_STP_CK BIT(8) -@@ -749,6 +777,14 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev, +@@ -864,6 +892,14 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev, case CLK_TYPE_GEN3_SD: return cpg_sd_clk_register(core, base, __clk_get_name(parent)); @@ -1396,7 +1377,7 @@ index f9d1763..96de154 100644 case CLK_TYPE_GEN3_RINT: div = cpg_pll_config->rint; break; -@@ -799,5 +835,8 @@ int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config, +@@ -917,5 +953,8 @@ int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config, if (attr) cpg_quirks = (uintptr_t)attr->data; pr_debug("%s: mode = 0x%x quirks = 0x%x\n", __func__, mode, cpg_quirks); @@ -1406,7 +1387,7 @@ index f9d1763..96de154 100644 return 0; } diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h -index 4155023..f0c0a92 100644 +index 51ae7b8..694bedc 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -19,6 +19,8 @@ enum rcar_gen3_clk_types { @@ -1418,7 +1399,7 @@ index 4155023..f0c0a92 100644 CLK_TYPE_GEN3_R, CLK_TYPE_GEN3_Z, CLK_TYPE_GEN3_Z2, -@@ -26,6 +28,10 @@ enum rcar_gen3_clk_types { +@@ -29,6 +31,10 @@ enum rcar_gen3_clk_types { #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) @@ -1471,7 +1452,7 @@ index 29f76a4..809a6e1 100644 { .compatible = "rockchip,rk2928", }, diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c -index f721a89..118e579 100644 +index 7685d31..02e42ba 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -1,7 +1,7 @@ @@ -1483,7 +1464,7 @@ index f721a89..118e579 100644 * Copyright (C) 2013 Magnus Damm * * This program is free software; you can redistribute it and/or modify -@@ -579,6 +579,10 @@ struct gpio_rcar_info { +@@ -363,6 +363,10 @@ struct gpio_rcar_info { /* Gen3 GPIO is identical to Gen2. */ .data = &gpio_rcar_info_gen2, }, { @@ -1495,7 +1476,7 @@ index f721a89..118e579 100644 .data = &gpio_rcar_info_gen1, }, { diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c -index 6295c73..ac9cf2a 100644 +index eb088cb..62612cd 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c @@ -289,6 +289,30 @@ @@ -1538,7 +1519,7 @@ index 6295c73..ac9cf2a 100644 }; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c -index c15611c..95023bd 100644 +index ccf5159..4c9e008 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c @@ -29,11 +29,17 @@ @@ -1573,7 +1554,7 @@ index c15611c..95023bd 100644 } diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c -index ecae864..42eb45c 100644 +index ecae864..d5fa06c 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c @@ -17,12 +17,18 @@ @@ -1676,7 +1657,7 @@ index 73ff520..306ba97 100644 }; MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids); diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c -index 2b380ff..b9ef21a 100644 +index 4cf30c8..3fdd96e 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c @@ -1,7 +1,7 @@ @@ -1698,7 +1679,7 @@ index 2b380ff..b9ef21a 100644 /* Terminator */ }, }; -@@ -1640,6 +1643,8 @@ static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np) +@@ -1643,6 +1646,8 @@ static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np) ipmmu_vmsa_iommu_of_setup); IOMMU_OF_DECLARE(ipmmu_r8a7796_iommu_of, "renesas,ipmmu-r8a7796", ipmmu_vmsa_iommu_of_setup); @@ -1721,7 +1702,7 @@ index 17178ad..5539c5d 100644 This is a v4l2 driver for the R-Car CSI-2 Interface diff --git a/drivers/media/platform/soc_camera/rcar_csi2.c b/drivers/media/platform/soc_camera/rcar_csi2.c -index 05f623468..5faac64 100644 +index 05f623468..4d95da6 100644 --- a/drivers/media/platform/soc_camera/rcar_csi2.c +++ b/drivers/media/platform/soc_camera/rcar_csi2.c @@ -25,6 +25,7 @@ @@ -2008,10 +1989,10 @@ index 400958b..74fb005 100644 for (i = 0; i < num; i++) { diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c -index 45bd0f3..90f7109 100644 +index 57b1b81..2f711bb 100644 --- a/drivers/media/platform/vsp1/vsp1_drv.c +++ b/drivers/media/platform/vsp1/vsp1_drv.c -@@ -888,6 +888,15 @@ void vsp1_device_put(struct vsp1_device *vsp1) +@@ -893,6 +893,15 @@ void vsp1_device_put(struct vsp1_device *vsp1) .wpf_count = 2, .num_bru_inputs = 5, .header_mode = true, @@ -2072,10 +2053,10 @@ index b442d14..e79f9e6 100644 static const struct vsp1_entity_operations lif_entity_ops = { diff --git a/drivers/media/platform/vsp1/vsp1_regs.h b/drivers/media/platform/vsp1/vsp1_regs.h -index 885f60b..2d863a7 100644 +index fb6d56c..bcba968 100644 --- a/drivers/media/platform/vsp1/vsp1_regs.h +++ b/drivers/media/platform/vsp1/vsp1_regs.h -@@ -788,6 +788,12 @@ +@@ -789,6 +789,12 @@ #define VI6_LIF_CSBTH_LBTH_MASK (0x7ff << 0) #define VI6_LIF_CSBTH_LBTH_SHIFT 0 @@ -2088,7 +2069,7 @@ index 885f60b..2d863a7 100644 /* ----------------------------------------------------------------------------- * Security Control Registers */ -@@ -811,6 +817,7 @@ +@@ -812,6 +818,7 @@ #define VI6_IP_VERSION_MODEL_VSPBD_GEN3 (0x15 << 8) #define VI6_IP_VERSION_MODEL_VSPBC_GEN3 (0x16 << 8) #define VI6_IP_VERSION_MODEL_VSPD_GEN3 (0x17 << 8) @@ -2097,10 +2078,10 @@ index 885f60b..2d863a7 100644 #define VI6_IP_VERSION_SOC_MASK (0xff << 0) #define VI6_IP_VERSION_SOC_H (0x01 << 0) diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c -index 136ebac..fe4e022 100644 +index 359a981..49276282 100644 --- a/drivers/mmc/host/sh_mobile_sdhi.c +++ b/drivers/mmc/host/sh_mobile_sdhi.c -@@ -150,6 +150,8 @@ struct sh_mobile_sdhi_of_data { +@@ -138,6 +138,8 @@ struct sh_mobile_sdhi_of_data { { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, }, { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, }, { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, }, @@ -2110,10 +2091,10 @@ index 136ebac..fe4e022 100644 }; MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c -index 6c65426..97c52dd 100644 +index 68019d9..cd4f25a 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c -@@ -1922,6 +1922,7 @@ static int ravb_mdio_release(struct ravb_private *priv) +@@ -1906,6 +1906,7 @@ static int ravb_mdio_release(struct ravb_private *priv) { .compatible = "renesas,etheravb-rcar-gen2", .data = (void *)RCAR_GEN2 }, { .compatible = "renesas,etheravb-r8a7795", .data = (void *)RCAR_GEN3 }, { .compatible = "renesas,etheravb-r8a7796", .data = (void *)RCAR_GEN3 }, @@ -2150,7 +2131,7 @@ index 8e08684..10adc18 100644 obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c -index 6399eb1..9bb3665 100644 +index 7ea6c8e..b536aeb 100644 --- a/drivers/pinctrl/sh-pfc/core.c +++ b/drivers/pinctrl/sh-pfc/core.c @@ -5,6 +5,7 @@ @@ -2161,7 +2142,7 @@ index 6399eb1..9bb3665 100644 * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive -@@ -622,6 +623,12 @@ static int sh_pfc_init_ranges(struct sh_pfc *pfc) +@@ -539,6 +540,12 @@ static int sh_pfc_init_ranges(struct sh_pfc *pfc) .data = &r8a7796_pinmux_info, }, #endif @@ -2176,7 +2157,7 @@ index 6399eb1..9bb3665 100644 .compatible = "renesas,pfc-sh73a0", diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7797.c b/drivers/pinctrl/sh-pfc/pfc-r8a7797.c new file mode 100644 -index 0000000..d58ccb3 +index 0000000..9b6127f --- /dev/null +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7797.c @@ -0,0 +1,2586 @@ @@ -3794,7 +3775,7 @@ index 0000000..d58ccb3 +}; +static const unsigned int mmc_ctrl_pins[] = { + /* CLK, CMD */ -+ RCAR_GP_PIN(3,10), RCAR_GP_PIN(3, 5), ++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 5), +}; +static const unsigned int mmc_ctrl_mux[] = { + MMC_CLK_MARK, MMC_CMD_MARK, @@ -4767,10 +4748,10 @@ index 0000000..d58ccb3 + .pinmux_data_size = ARRAY_SIZE(pinmux_data), +}; diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h -index c6a1855..a673a00 100644 +index 93cce90..0da3ee4 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h -@@ -269,6 +269,7 @@ struct sh_pfc_soc_info { +@@ -287,6 +287,7 @@ struct sh_pfc_soc_info { extern const struct sh_pfc_soc_info r8a7795_pinmux_info; extern const struct sh_pfc_soc_info r8a7795_es1_pinmux_info; extern const struct sh_pfc_soc_info r8a7796_pinmux_info; @@ -4778,7 +4759,7 @@ index c6a1855..a673a00 100644 extern const struct sh_pfc_soc_info sh7203_pinmux_info; extern const struct sh_pfc_soc_info sh7264_pinmux_info; extern const struct sh_pfc_soc_info sh7269_pinmux_info; -@@ -374,6 +375,11 @@ struct sh_pfc_soc_info { +@@ -392,6 +393,11 @@ struct sh_pfc_soc_info { PORT_GP_CFG_1(bank, 3, fn, sfx, cfg) #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) @@ -4790,7 +4771,7 @@ index c6a1855..a673a00 100644 #define PORT_GP_CFG_8(bank, fn, sfx, cfg) \ PORT_GP_CFG_4(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 4, fn, sfx, cfg), \ -@@ -420,6 +426,12 @@ struct sh_pfc_soc_info { +@@ -438,6 +444,12 @@ struct sh_pfc_soc_info { PORT_GP_CFG_1(bank, 17, fn, sfx, cfg) #define PORT_GP_18(bank, fn, sfx) PORT_GP_CFG_18(bank, fn, sfx, 0) @@ -4888,10 +4869,10 @@ index a6d1c26..2e87293 100644 }; diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c -index 042500a..e6165b6 100644 +index 072f94c..7e59c72 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c -@@ -320,6 +320,9 @@ static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd) +@@ -321,6 +321,9 @@ static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd) #ifdef CONFIG_ARCH_R8A7796 { .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info }, #endif @@ -4902,10 +4883,10 @@ index 042500a..e6165b6 100644 }; diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h -index f6e842e..e7980d5 100644 +index cd8bc52..e367715 100644 --- a/drivers/soc/renesas/rcar-sysc.h +++ b/drivers/soc/renesas/rcar-sysc.h -@@ -59,4 +59,5 @@ struct rcar_sysc_info { +@@ -60,4 +60,5 @@ struct rcar_sysc_info { extern const struct rcar_sysc_info r8a7794_sysc_info; extern const struct rcar_sysc_info r8a7795_sysc_info; extern const struct rcar_sysc_info r8a7796_sysc_info; @@ -4993,10 +4974,10 @@ index 996869e..3281dc7 100644 }; MODULE_DEVICE_TABLE(of, sh_msiof_match); diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c -index 39763c7..07b1a2e 100644 +index 6700dda..a9f4d96 100644 --- a/drivers/thermal/rcar_gen3_thermal.c +++ b/drivers/thermal/rcar_gen3_thermal.c -@@ -385,6 +385,30 @@ static int rcar_gen3_r8a7795_thermal_init(struct rcar_thermal_priv *priv) +@@ -391,6 +391,30 @@ static int rcar_gen3_r8a7795_thermal_init(struct rcar_thermal_priv *priv) return 0; } @@ -5027,7 +5008,7 @@ index 39763c7..07b1a2e 100644 /* * Interrupt */ -@@ -466,9 +490,14 @@ static int rcar_gen3_thermal_remove(struct platform_device *pdev) +@@ -472,9 +496,14 @@ static int rcar_gen3_thermal_remove(struct platform_device *pdev) .thermal_init = rcar_gen3_r8a7796_thermal_init, }; diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch index b15a4fb..7b34dce 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch @@ -19,12 +19,13 @@ Videobox board on R8A7795 SoC Eagle board on R8A7797 SoC V3MSK board on R8A7797 SoC Kingfisher board on R8A7797 SoC +Videobox board on R8A7797 SoC Signed-off-by: Vladimir Barinov --- - arch/arm64/boot/dts/renesas/Makefile | 16 + + arch/arm64/boot/dts/renesas/Makefile | 17 + arch/arm64/boot/dts/renesas/legacy/Makefile | 8 + - .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1717 +++++++++++++++++++ + .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1710 +++++++++++++++++++ .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts | 441 +++++ .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts | 1724 +++++++++++++++++++ .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts | 465 +++++ @@ -51,14 +52,15 @@ Signed-off-by: Vladimir Barinov .../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts | 287 ++++ .../boot/dts/renesas/r8a7796-salvator-x-view.dts | 318 ++++ arch/arm64/boot/dts/renesas/r8a7797-eagle.dts | 561 ++++++ - arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts | 541 ++++++ - arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts | 294 ++++ + arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts | 567 +++++++ + arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts | 498 ++++++ + arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts | 320 ++++ arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi | 518 ++++++ arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi | 30 + arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi | 46 + - arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 1531 +++++++++++++++++ + arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 1529 +++++++++++++++++ arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi | 515 ++++++ - 36 files changed, 17285 insertions(+) + 37 files changed, 17827 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/legacy/Makefile create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts @@ -88,6 +90,7 @@ Signed-off-by: Vladimir Barinov create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-eagle.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts + create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi @@ -96,10 +99,10 @@ Signed-off-by: Vladimir Barinov create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile -index 32fb4d9..fd17456 100644 +index 32fb4d9..52d783b 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile -@@ -4,5 +4,21 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb +@@ -4,5 +4,22 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb @@ -115,6 +118,7 @@ index 32fb4d9..fd17456 100644 +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-eagle.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-kf.dtb ++dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vb.dtb + +# ADAS legacy boards +subdir-y := legacy @@ -137,7 +141,7 @@ index 0000000..7f25079 +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts new file mode 100644 -index 0000000..ec6d86d +index 0000000..2fee788 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts @@ -0,0 +1,1710 @@ @@ -14078,10 +14082,10 @@ index 0000000..f71addf + diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts new file mode 100644 -index 0000000..9837e17 +index 0000000..4467ab3 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts -@@ -0,0 +1,541 @@ +@@ -0,0 +1,567 @@ +/* + * Device Tree Source for the V3MSK Kingfisher board on r8a7797 + * @@ -14099,6 +14103,54 @@ index 0000000..9837e17 + model = "Renesas V3MSK Kingfisher board based on r8a7797"; +}; + ++&canfd { ++ pinctrl-0 = <&canfd0_pins &canfd1_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ channel0 { ++ status = "okay"; ++ }; ++ ++ channel1 { ++ status = "okay"; ++ }; ++}; ++ ++&csi2_40 { ++ status = "okay"; ++ ++ virtual,channel { ++ csi2_vc0 { ++ data,type = "ycbcr422"; ++ receive,vc = <0>; ++ }; ++ csi2_vc1 { ++ data,type = "ycbcr422"; ++ receive,vc = <1>; ++ }; ++ csi2_vc2 { ++ data,type = "ycbcr422"; ++ receive,vc = <2>; ++ }; ++ csi2_vc3 { ++ data,type = "ycbcr422"; ++ receive,vc = <3>; ++ }; ++ }; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ csi2_40_ep: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ csi-rate = <300>; ++ }; ++ }; ++}; ++ +&i2c0 { + /* i2c0 might conflict with pc9548 reset pin on Kingfisher (uncomment if h/w not patched) */ +// status = "disabled"; @@ -14460,6 +14512,18 @@ index 0000000..9837e17 + }; +}; + ++&pfc { ++ canfd0_pins: canfd0 { ++ groups = "canfd0_data_a"; ++ function = "canfd0"; ++ }; ++ ++ canfd1_pins: canfd1 { ++ groups = "canfd1_data"; ++ function = "canfd1"; ++ }; ++}; ++ +&vin0 { + status = "okay"; + @@ -14589,6 +14653,45 @@ index 0000000..9837e17 + }; + }; +}; +diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts +new file mode 100644 +index 0000000..edc41ad +--- /dev/null ++++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts +@@ -0,0 +1,498 @@ ++/* ++ * Device Tree Source for the V3MSK Videobox board on r8a7797 ++ * ++ * Copyright (C) 2017 Cogent Embedded, Inc. ++ * ++ * This file is licensed under the terms of the GNU General Public License ++ * version 2. This program is licensed "as is" without any warranty of any ++ * kind, whether express or implied. ++ */ ++ ++#include "r8a7797-v3msk.dts" ++ ++/ { ++ model = "Renesas V3MSK Videobox board based on r8a7797"; ++ ++ aliases { ++ serial1 = &scif3; ++ }; ++}; ++ ++&canfd { ++ pinctrl-0 = <&canfd0_pins &canfd1_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ channel0 { ++ status = "okay"; ++ }; ++ ++ channel1 { ++ status = "okay"; ++ }; ++}; + +&csi2_40 { + status = "okay"; @@ -14623,140 +14726,572 @@ index 0000000..9837e17 + }; + }; +}; -diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts -new file mode 100644 -index 0000000..61f7e8b ---- /dev/null -+++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts -@@ -0,0 +1,294 @@ -+/* -+ * Device Tree Source for the V3M Starter Kit board on r8a7797 -+ * -+ * Copyright (C) 2017 Renesas Electronics Corp. -+ * Copyright (C) 2017 Cogent Embedded, Inc. -+ * -+ * This file is licensed under the terms of the GNU General Public License -+ * version 2. This program is licensed "as is" without any warranty of any -+ * kind, whether express or implied. -+ */ -+ -+/dts-v1/; -+#include "r8a7797.dtsi" -+#include -+ -+/ { -+ model = "Renesas V3M Starter Kit board based on r8a7797"; -+ compatible = "renesas,v3msk", "renesas,r8a7797"; -+ -+ aliases { -+ serial0 = &scif0; -+ ethernet0 = &avb; -+ }; -+ -+ chosen { -+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@48000000 { -+ device_type = "memory"; -+ /* first 128MB is reserved for secure area. */ -+ reg = <0x0 0x48000000 0x0 0x38000000>; -+ }; -+ -+ reserved-memory { -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ /* device specific region for Lossy Decompression */ -+ lossy_decompress: linux,lossy_decompress { -+ no-map; -+ reg = <0x00000000 0x64000000 0x0 0x03000000>; -+ }; -+ -+ /* global autoconfigured region for contiguous allocations */ -+ linux,cma { -+ compatible = "shared-dma-pool"; -+ reusable; -+ reg = <0x00000000 0x67000000 0x0 0x09000000>; -+ linux,cma-default; -+ }; -+ -+ /* device specific region for contiguous allocations */ -+ linux,multimedia { -+ compatible = "shared-dma-pool"; -+ reusable; -+ reg = <0x00000000 0x70000000 0x0 0x10000000>; -+ }; -+ }; -+ -+ mmngr { -+ compatible = "renesas,mmngr"; -+ memory-region = <&lossy_decompress>; -+ }; + -+ mmngrbuf { -+ compatible = "renesas,mmngrbuf"; -+ }; ++&i2c1 { ++ pinctrl-0 = <&i2c1_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; + -+ vspm_if { -+ compatible = "renesas,vspm_if"; -+ }; ++ clock-frequency = <400000>; + -+ lvds-encoder { -+ compatible = "thine,thc63lvdm83d"; ++ i2cswitch1: i2c-switch@74 { ++ compatible = "nxp,pca9548"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x74>; ++ reset-gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; + -+ ports { ++ i2c@0 { + #address-cells = <1>; + #size-cells = <0>; ++ reg = <0>; + -+ port@0 { -+ reg = <0>; -+ lvds_enc_in: endpoint { -+ remote-endpoint = <&du_out_lvds0>; ++ ov106xx@0 { ++ compatible = "ovti,ov106xx"; ++ reg = <0x60>; ++ ++ port@0 { ++ ov106xx_in0: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&vin0ep0>; ++ }; + }; -+ }; -+ port@1 { -+ reg = <1>; -+ lvds_enc_out: endpoint { -+ remote-endpoint = <&lvds_in>; ++ port@1 { ++ ov106xx_max9286_des0ep0: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep0>; ++ }; ++ ov106xx_ti964_des0ep0: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep0>; ++ }; + }; + }; -+ }; -+ }; + -+ lvds { -+ compatible = "lvds-connector"; -+ -+ width-mm = <210>; -+ height-mm = <158>; -+ -+ panel-timing { -+ clock-frequency = <133000000>; -+ hactive = <1024>; -+ vactive = <768>; -+ hsync-len = <136>; -+ hfront-porch = <20>; -+ hback-porch = <160>; -+ vfront-porch = <3>; -+ vback-porch = <29>; -+ vsync-len = <6>; -+ }; ++ ov106xx@1 { ++ compatible = "ovti,ov106xx"; ++ reg = <0x61>; + -+ port { -+ lvds_in: endpoint { -+ remote-endpoint = <&lvds_enc_out>; ++ port@0 { ++ ov106xx_in1: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&vin1ep0>; ++ }; ++ }; ++ port@1 { ++ ov106xx_max9286_des0ep1: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep1>; ++ }; ++ ov106xx_ti964_des0ep1: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep1>; ++ }; ++ }; + }; -+ }; -+ }; + -+ hdmi-out { -+ compatible = "hdmi-connector"; -+ type = "a"; ++ ov106xx@2 { ++ compatible = "ovti,ov106xx"; ++ reg = <0x62>; + -+ port { -+ hdmi_con: endpoint { ++ port@0 { ++ ov106xx_in2: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&vin2ep0>; ++ }; ++ }; ++ port@1 { ++ ov106xx_max9286_des0ep2: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep2>; ++ }; ++ ov106xx_ti964_des0ep2: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep2>; ++ }; ++ }; ++ }; ++ ++ ov106xx@3 { ++ compatible = "ovti,ov106xx"; ++ reg = <0x63>; ++ ++ port@0 { ++ ov106xx_in3: endpoint { ++ clock-lanes = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&vin3ep0>; ++ }; ++ }; ++ port@1 { ++ ov106xx_max9286_des0ep3: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep3>; ++ }; ++ ov106xx_ti964_des0ep3: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep3>; ++ }; ++ }; ++ }; ++ ++ max9286-max9271@0 { ++ compatible = "maxim,max9286-max9271"; ++ reg = <0x2c>; ++ maxim,sensor_delay = <350>; ++ maxim,links = <4>; ++ maxim,lanes = <4>; ++ maxim,resetb-gpio = <1>; ++ maxim,fsync-mode = "automatic"; ++ maxim,timeout = <100>; ++ ++ port@0 { ++ max9286_des0ep0: endpoint@0 { ++ max9271-addr = <0x50>; ++ dvp-order = <1>; ++ remote-endpoint = <&ov106xx_in0>; ++ }; ++ max9286_des0ep1: endpoint@1 { ++ max9271-addr = <0x51>; ++ dvp-order = <1>; ++ remote-endpoint = <&ov106xx_in1>; ++ }; ++ max9286_des0ep2: endpoint@2 { ++ max9271-addr = <0x52>; ++ dvp-order = <1>; ++ remote-endpoint = <&ov106xx_in2>; ++ }; ++ max9286_des0ep3: endpoint@3 { ++ max9271-addr = <0x53>; ++ dvp-order = <1>; ++ remote-endpoint = <&ov106xx_in3>; ++ }; ++ }; ++ port@1 { ++ max9286_csi0ep0: endpoint { ++ csi-rate = <700>; ++ remote-endpoint = <&csi2_40_ep>; ++ }; ++ }; ++ }; ++ ++ ti964-ti9x3@0 { ++ compatible = "ti,ti964-ti9x3"; ++ reg = <0x3a>; ++ ti,sensor_delay = <350>; ++ ti,links = <4>; ++ ti,lanes = <4>; ++ ti,forwarding-mode = "round-robin"; ++ ti,cable-mode = "coax"; ++ ++ port@0 { ++ ti964_des0ep0: endpoint@0 { ++ ti9x3-addr = <0x0c>; ++ dvp-order = <0>; ++ remote-endpoint = <&ov106xx_in0>; ++ }; ++ ti964_des0ep1: endpoint@1 { ++ ti9x3-addr = <0x0d>; ++ dvp-order = <0>; ++ remote-endpoint = <&ov106xx_in1>; ++ }; ++ ti964_des0ep2: endpoint@2 { ++ ti9x3-addr = <0x0e>; ++ dvp-order = <0>; ++ remote-endpoint = <&ov106xx_in2>; ++ }; ++ ti964_des0ep3: endpoint@3 { ++ ti9x3-addr = <0x0f>; ++ dvp-order = <0>; ++ remote-endpoint = <&ov106xx_in3>; ++ }; ++ }; ++ port@1 { ++ ti964_csi0ep0: endpoint { ++ csi-rate = <1450>; ++ remote-endpoint = <&csi2_40_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ i2c@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <1>; ++ ++ gpio_exp_6c: gpio@6c { ++ compatible = "maxim,max7325"; ++ reg = <0x6c>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ virq { ++ gpio-hog; ++ gpios = <5 GPIO_ACTIVE_HIGH>; ++ input; ++ line-name = "Video VIRQ"; ++ }; ++ des_cfg { ++ gpio-hog; ++ gpios = <6 GPIO_ACTIVE_HIGH>; ++ input; ++ line-name = "Video CNFG0"; ++ }; ++ pwr_shdn { ++ gpio-hog; ++ gpios = <14 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "Video PWR_SHDN"; ++ }; ++ cam_pwr0 { ++ gpio-hog; ++ gpios = <8 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "Video PWR0"; ++ }; ++ cam_pwr1 { ++ gpio-hog; ++ gpios = <9 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "Video PWR1"; ++ }; ++ cam_pwr2 { ++ gpio-hog; ++ gpios = <10 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "Video PWR2"; ++ }; ++ cam_pwr3 { ++ gpio-hog; ++ gpios = <11 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "Video PWR3"; ++ }; ++ des_shdn { ++ gpio-hog; ++ gpios = <13 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "Video DES_SHDN"; ++ }; ++ fpdl_shdn { ++ gpio-hog; ++ gpios = <15 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "Video FPDL_SHDN"; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&gpio0 { ++ can0stby { ++ gpio-hog; ++ gpios = <12 GPIO_ACTIVE_HIGH>; ++ output-low; ++ line-name = "CAN0STBY"; ++ }; ++ ++ can1_load { ++ gpio-hog; ++ gpios = <13 GPIO_ACTIVE_HIGH>; ++ output-low; ++ line-name = "can1_120R_load"; ++ }; ++}; ++ ++&gpio2 { ++ can0_load { ++ gpio-hog; ++ gpios = <16 GPIO_ACTIVE_HIGH>; ++ output-low; ++ line-name = "can0_120R_load"; ++ }; ++}; ++ ++&pfc { ++ canfd0_pins: canfd0 { ++ groups = "canfd0_data_a"; ++ function = "canfd0"; ++ }; ++ ++ canfd1_pins: canfd1 { ++ groups = "canfd1_data"; ++ function = "canfd1"; ++ }; ++ ++ i2c1_pins: i2c1 { ++ groups = "i2c1"; ++ function = "i2c1"; ++ }; ++ ++ scif3_pins: scif3 { ++ groups = "scif3_data"; ++ function = "scif3"; ++ }; ++}; ++ ++&scif3 { ++ pinctrl-0 = <&scif3_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++}; ++ ++&vin0 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ vin0ep0: endpoint { ++ csi,select = "csi40"; ++ virtual,channel = <0>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&ov106xx_in0>; ++ }; ++ }; ++ port@1 { ++ csi0ep0: endpoint { ++ remote-endpoint = <&csi2_40_ep>; ++ }; ++ }; ++ port@2 { ++ vin0_max9286_des0ep0: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep0>; ++ }; ++ vin0_ti964_des0ep0: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep0>; ++ }; ++ }; ++ }; ++}; ++ ++&vin1 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ vin1ep0: endpoint { ++ csi,select = "csi40"; ++ virtual,channel = <1>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&ov106xx_in1>; ++ }; ++ }; ++ port@1 { ++ csi0ep1: endpoint { ++ remote-endpoint = <&csi2_40_ep>; ++ }; ++ }; ++ port@2 { ++ vin1_max9286_des0ep1: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep1>; ++ }; ++ vin1_ti964_des0ep1: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep1>; ++ }; ++ }; ++ }; ++}; ++ ++&vin2 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ vin2ep0: endpoint { ++ csi,select = "csi40"; ++ virtual,channel = <2>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&ov106xx_in2>; ++ }; ++ }; ++ port@1 { ++ csi0ep2: endpoint { ++ remote-endpoint = <&csi2_40_ep>; ++ }; ++ }; ++ port@2 { ++ vin2_max9286_des0ep2: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep2>; ++ }; ++ vin2_ti964_des0ep2: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep2>; ++ }; ++ }; ++ }; ++}; ++ ++&vin3 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ vin3ep0: endpoint { ++ csi,select = "csi40"; ++ virtual,channel = <3>; ++ data-lanes = <1 2 3 4>; ++ remote-endpoint = <&ov106xx_in3>; ++ }; ++ }; ++ port@1 { ++ csi0ep3: endpoint { ++ remote-endpoint = <&csi2_40_ep>; ++ }; ++ }; ++ port@2 { ++ vin3_max9286_des0ep3: endpoint@0 { ++ remote-endpoint = <&max9286_des0ep3>; ++ }; ++ vin3_ti964_des0ep3: endpoint@1 { ++ remote-endpoint = <&ti964_des0ep3>; ++ }; ++ }; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts +new file mode 100644 +index 0000000..fb2976e +--- /dev/null ++++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts +@@ -0,0 +1,320 @@ ++/* ++ * Device Tree Source for the V3M Starter Kit board on r8a7797 ++ * ++ * Copyright (C) 2017 Renesas Electronics Corp. ++ * Copyright (C) 2017 Cogent Embedded, Inc. ++ * ++ * This file is licensed under the terms of the GNU General Public License ++ * version 2. This program is licensed "as is" without any warranty of any ++ * kind, whether express or implied. ++ */ ++ ++/dts-v1/; ++#include "r8a7797.dtsi" ++#include ++ ++/ { ++ model = "Renesas V3M Starter Kit board based on r8a7797"; ++ compatible = "renesas,v3msk", "renesas,r8a7797"; ++ ++ aliases { ++ serial0 = &scif0; ++ ethernet0 = &avb; ++ }; ++ ++ chosen { ++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@48000000 { ++ device_type = "memory"; ++ /* first 128MB is reserved for secure area. */ ++ reg = <0x0 0x48000000 0x0 0x38000000>; ++ }; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ /* device specific region for Lossy Decompression */ ++ lossy_decompress: linux,lossy_decompress { ++ no-map; ++ reg = <0x00000000 0x64000000 0x0 0x03000000>; ++ }; ++ ++ /* global autoconfigured region for contiguous allocations */ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x00000000 0x67000000 0x0 0x09000000>; ++ linux,cma-default; ++ }; ++ ++ /* device specific region for contiguous allocations */ ++ linux,multimedia { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x00000000 0x70000000 0x0 0x10000000>; ++ }; ++ }; ++ ++ mmngr { ++ compatible = "renesas,mmngr"; ++ memory-region = <&lossy_decompress>; ++ }; ++ ++ mmngrbuf { ++ compatible = "renesas,mmngrbuf"; ++ }; ++ ++ vspm_if { ++ compatible = "renesas,vspm_if"; ++ }; ++ ++ lvds-encoder { ++ compatible = "thine,thc63lvdm83d"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ lvds_enc_in: endpoint { ++ remote-endpoint = <&du_out_lvds0>; ++ }; ++ }; ++ port@1 { ++ reg = <1>; ++ lvds_enc_out: endpoint { ++ remote-endpoint = <&lvds_in>; ++ }; ++ }; ++ }; ++ }; ++ ++ lvds { ++ compatible = "lvds-connector"; ++ ++ width-mm = <210>; ++ height-mm = <158>; ++ ++ panel-timing { ++ /* 1280x800 @60Hz */ ++ clock-frequency = <65000000>; ++ hactive = <1280>; ++ vactive = <800>; ++ hsync-len = <40>; ++ hfront-porch = <80>; ++ hback-porch = <40>; ++ vfront-porch = <14>; ++ vback-porch = <14>; ++ vsync-len = <4>; ++ }; ++ ++ port { ++ lvds_in: endpoint { ++ remote-endpoint = <&lvds_enc_out>; ++ }; ++ }; ++ }; ++ ++ hdmi-out { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; @@ -14773,6 +15308,24 @@ index 0000000..61f7e8b + #clock-cells = <0>; + clock-frequency = <66666666>; + }; ++ ++ vcc_3v3: regulator0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-VCC3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ vcc_vddq_vin0: regulator1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC-VDDQ-VIN0"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; +}; + +&du { @@ -14816,11 +15369,6 @@ index 0000000..61f7e8b + function = "i2c0"; + }; + -+ i2c3_pins: i2c3 { -+ groups = "i2c3"; -+ function = "i2c3"; -+ }; -+ + avb_pins: avb { + groups = "avb0_mdc"; + function = "avb0"; @@ -14830,6 +15378,12 @@ index 0000000..61f7e8b + groups = "du_rgb666", "du_sync", "du_clk_out_0", "du_disp"; + function = "du"; + }; ++ ++ sdhi2_pins_3v3: sdhi2_3v3 { ++ groups = "mmc_data8", "mmc_ctrl"; ++ function = "mmc"; ++ power-source = <3300>; ++ }; +}; + +&scif0 { @@ -14884,14 +15438,6 @@ index 0000000..61f7e8b + }; +}; + -+&i2c3 { -+ pinctrl-0 = <&i2c3_pins>; -+ pinctrl-names = "default"; -+ -+ status = "okay"; -+ clock-frequency = <400000>; -+}; -+ +&wdt0 { + status = "okay"; +}; @@ -14923,6 +15469,20 @@ index 0000000..61f7e8b + max-speed = <1000>; + }; +}; ++ ++&sdhi2 { ++ /* used for on-board eMMC */ ++ pinctrl-0 = <&sdhi2_pins_3v3>; ++ pinctrl-names = "default"; ++ ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_vddq_vin0>; ++ no-1-8-v; ++ cap-mmc-highspeed; ++ bus-width = <8>; ++ non-removable; ++ status = "okay"; ++}; diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi new file mode 100644 index 0000000..4ca502f @@ -15537,7 +16097,7 @@ index 0000000..b854216 +}; diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi new file mode 100644 -index 0000000..3990648 +index 0000000..8ffafb2 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi @@ -0,0 +1,1529 @@ -- cgit 1.2.3-korg