From 9872a94a414d6d94423f52d59cb09cdb64cf2930 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Fri, 14 Jul 2017 15:05:42 +0300 Subject: [PATCH] arm64: dts: renesas: add ADAS boards Salvator-X.View board on R8A7795 ES1.x SoC Salvator-X.View board on R8A7795 SoC Salvator-X.View board on R8A7796 SoC H3ULCB.View board on R8A7795 ES1.x SoC H3ULCB.View board on R8A7795 SoC M3ULCB.View board on R8A7796 SoC H3ULCB.HAD board on R8A7795 ES1.x SoC H3ULCB.HAD board on R8A7795 SoC Kingfisher board on R8A7795 ES1.x SoC Kingfisher board on R8A7795 SoC Kingfisher board on R8A7796 SoC Kingfisher board on R8A7797 ES1.0/2.0 SoC Videobox board on R8A7795 ES1.x SoC Videobox board on R8A7795 SoC Eagle board on R8A7797 ES1.0/2.0 SoC Eagle Function board on R8A7797 ES1.0/2.0 SoC V3MSK board on R8A7797 ES1.0/2.0 SoC V3MSK.View board on R8A7797 ES1.0/2.0 SoC V3MZF board on R8A7797 SoC Videobox Mini board on R8A7795 ES1.x SoC Videobox Mini board on R8A7795 SoC Videobox Mini board on R8A7797 ES1.0/2.0 SoC Videobox Mini V2 board on R8A7797 ES1.0/2.0 SoC Videobox2 board on R8A7795 ES1.x SoC Videobox2 board on R8A7795 SoC Condor board on R8A7798 SoC Signed-off-by: Vladimir Barinov --- arch/arm64/boot/dts/renesas/Makefile | 24 + arch/arm64/boot/dts/renesas/legacy/Makefile | 8 + .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1624 +++++++++++++++++++ .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts | 441 ++++++ .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts | 1638 +++++++++++++++++++ .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts | 465 ++++++ .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts | 1171 ++++++++++++++ .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts | 465 ++++++ .../dts/renesas/legacy/r8a7797-v3msk-kf-v0.dts | 82 + .../boot/dts/renesas/legacy/ulcb-kf-cmos.dtsi | 75 + .../arm64/boot/dts/renesas/legacy/ulcb-kf-rpi.dtsi | 77 + .../dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts | 22 + .../dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts | 23 + .../boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi | 221 +++ .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 39 + .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts | 69 + .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb2.dts | 77 + .../boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts | 26 + .../boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts | 544 +++++++ .../dts/renesas/r8a7795-es1-salvator-x-view.dts | 550 +++++++ .../boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts | 22 + .../boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts | 23 + .../arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi | 215 +++ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts | 39 + arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts | 68 + arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb2.dts | 68 + arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts | 26 + .../arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts | 544 +++++++ .../boot/dts/renesas/r8a7795-salvator-x-view.dts | 550 +++++++ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts | 40 + .../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts | 286 ++++ .../boot/dts/renesas/r8a7796-salvator-x-view.dts | 317 ++++ .../boot/dts/renesas/r8a7797-eagle-function.dts | 62 + arch/arm64/boot/dts/renesas/r8a7797-eagle.dts | 605 +++++++ .../dts/renesas/r8a7797-es1-eagle-function.dts | 17 + arch/arm64/boot/dts/renesas/r8a7797-es1-eagle.dts | 17 + .../boot/dts/renesas/r8a7797-es1-v3msk-kf.dts | 17 + .../boot/dts/renesas/r8a7797-es1-v3msk-vbm-v2.dts | 17 + .../boot/dts/renesas/r8a7797-es1-v3msk-vbm.dts | 17 + .../boot/dts/renesas/r8a7797-es1-v3msk-view.dts | 17 + arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk.dts | 17 + arch/arm64/boot/dts/renesas/r8a7797-es1.dtsi | 116 ++ arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts | 520 ++++++ .../boot/dts/renesas/r8a7797-v3msk-vbm-v2.dts | 82 + arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts | 507 ++++++ arch/arm64/boot/dts/renesas/r8a7797-v3msk-view.dts | 297 ++++ arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts | 345 ++++ arch/arm64/boot/dts/renesas/r8a7797-v3mzf.dts | 424 +++++ arch/arm64/boot/dts/renesas/r8a7798-condor.dts | 963 ++++++++++++ arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi | 462 ++++++ arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi | 30 + arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi | 46 + arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 1458 +++++++++++++++++ arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi | 459 ++++++ arch/arm64/boot/dts/renesas/ulcb-vb.dtsi | 1610 +++++++++++++++++++ arch/arm64/boot/dts/renesas/ulcb-vb2.dtsi | 1660 ++++++++++++++++++++ arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi | 543 +++++++ 57 files changed, 20147 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/legacy/Makefile create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7797-v3msk-kf-v0.dts create mode 100644 arch/arm64/boot/dts/renesas/legacy/ulcb-kf-cmos.dtsi create mode 100644 arch/arm64/boot/dts/renesas/legacy/ulcb-kf-rpi.dtsi create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb2.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb2.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-eagle-function.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-eagle.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1-eagle-function.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1-eagle.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-kf.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm-v2.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-es1.dtsi create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm-v2.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-view.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3mzf.dts create mode 100644 arch/arm64/boot/dts/renesas/r8a7798-condor.dts create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb2.dtsi create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index f9c71df..6cdbdaf 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -6,5 +6,29 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-xs.dtb +# ADAS boards +dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x-view.dtb +dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb +dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb r8a7795-es1-salvator-x-view.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb r8a7795-es1-h3ulcb-view.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vb.dtb r8a7795-es1-h3ulcb-vb.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vb2.dtb r8a7795-es1-h3ulcb-vb2.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vbm.dtb r8a7795-es1-h3ulcb-vbm.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-eagle.dtb r8a7797-eagle-function.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-es1-eagle.dtb r8a7797-es1-eagle-function.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk.dtb r8a7797-es1-v3msk.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-view.dtb r8a7797-es1-v3msk-view.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-kf.dtb r8a7797-es1-v3msk-kf.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vbm.dtb r8a7797-es1-v3msk-vbm.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vbm-v2.dtb r8a7797-es1-v3msk-vbm-v2.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3mzf.dtb +dtb-$(CONFIG_ARCH_R8A7798) += r8a7798-condor.dtb + +# ADAS legacy boards +subdir-y := legacy + always := $(dtb-y) clean-files := *.dtb diff --git a/arch/arm64/boot/dts/renesas/legacy/Makefile b/arch/arm64/boot/dts/renesas/legacy/Makefile new file mode 100644 index 0000000..7f25079 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/Makefile @@ -0,0 +1,8 @@ +# Legacy KF board: V0, V1 (V2 is the same as V1), V3 is latest and deployed in default directory +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf-v0.dtb r8a7795-es1-h3ulcb-kf-v1.dtb +dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf-v0.dtb r8a7796-m3ulcb-kf-v1.dtb +dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf-v0.dtb r8a7795-h3ulcb-kf-v1.dtb +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-kf-v0.dtb + +always := $(dtb-y) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts new file mode 100644 index 0000000..01aef82 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts @@ -0,0 +1,1624 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher V0 board on r8a7795 ES1.x + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "../r8a7795-es1-h3ulcb.dts" + +/ { + model = "Renesas H3ULCB Kingfisher V0 board based on r8a7795"; + + aliases { + serial1 = &hscif4; + }; + + snd_clk: snd_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "scki"; + }; + + wlan_en: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi3: regulator@41 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi3: regulator@5 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + codec_en_reg: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "codec-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 15 0>; + + /* delay - CHECK */ + startup-delay-us = <70000>; + enable-active-high; + }; + + amp_en_reg: regulator@7 { + compatible = "regulator-fixed"; + regulator-name = "amp-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 0 0>; + + startup-delay-us = <0>; + enable-active-high; + }; + + lvds_switch: regulator@8 { + compatible = "regulator-fixed"; + regulator-name = "lvds_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + /* gpio = <&gpio1 24 0>; */ + enable-active-high; + regulator-always-on; + }; + + sdio_switch: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "wifi_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_20 5 0>; + enable-active-low; + regulator-always-on; + }; + + sound_switch: regulator@10 { + compatible = "regulator-fixed"; + regulator-name = "pcm3168a_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_21 5 0>; + enable-active-low; + regulator-always-on; + }; + + radio_switch: regulator@11 { + compatible = "regulator-fixed"; + regulator-name = "radio_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + kim { + compatible = "kim"; + shutdown-gpios = <&gpio_ext_20 3 GPIO_ACTIVE_HIGH>; + /* serial1 */ + dev_name = "/dev/ttySC1"; + flow_cntrl = <1>; + /* int div 8 hscif@26.6666656MHz */ + baud_rate = <3333332>; + }; + + btwilink { + compatible = "btwilink"; + }; + + sound_ext: sound@0 { + pinctrl-0 = <&sound_0_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "pcm3168a"; + + simple-audio-card,bitclock-master = <&sound_ext_master>; + simple-audio-card,frame-master = <&sound_ext_master>; + sound_ext_master: simple-audio-card,cpu@0 { + sound-dai = <&rcar_sound 0>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + }; + + simple-audio-card,codec@0 { + sound-dai = <&pcm3168a>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + system-clock-frequency = <24576000>; + }; + }; + + /delete-node/sound; + + rsnd_ak4613: sound@1 { + pinctrl-0 = <&sound_1_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "ak4613"; + + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu@1 { + sound-dai = <&rcar_sound 1>; + }; + + sndcodec: simple-audio-card,codec@1 { + sound-dai = <&ak4613>; + }; + }; + + sound_radio: sound@2 { + pinctrl-0 = <&sound_2_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "i2s"; + simple-audio-card,name = "radio"; + + simple-audio-card,bitclock-master = <&sound_radio_master>; + simple-audio-card,frame-master = <&sound_radio_master>; + simple-audio-card,cpu@2 { + sound-dai = <&rcar_sound 2>; + }; + + sound_radio_master: simple-audio-card,codec@2 { + sound-dai = <&radio>; + system-clock-frequency = <12288000>; + }; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + radio: si468x@0 { + compatible = "si,si468x-pcm"; + status = "okay"; + + #sound-dai-cells = <0>; + }; +}; + +&pfc { + hscif4_pins: hscif4 { + groups = "hscif4_data_a", "hscif4_ctrl"; + function = "hscif4"; + }; + + sdhi3_pins_3v3: sd3_3v3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + sound_0_pins: sound0 { + groups = "ssi78_ctrl", "ssi7_data", "ssi8_data"; + function = "ssi"; + }; + + sound_1_pins: sound1 { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + sound_2_pins: sound2 { + groups = "ssi6_ctrl", "ssi6_data"; + function = "ssi"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; +}; + +&du { + ports { + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&gpio0 { + video_a_irq { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A irq"; + }; + + video_b_irq { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B irq"; + }; + + gpioext_2_20_irq { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x20@i2c2 irq"; + }; +}; + +&gpio1 { + gpioext_2_21_irq { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x21@i2c2 irq"; + }; + + wifi_irq { + gpio-hog; + gpios = <25 GPIO_ACTIVE_HIGH>; + input; + line-name = "wifi irq"; + }; +}; + +&gpio5 { + touch_irq { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "touch irq"; + }; + + /* From TI forum */ + /* BT_AUD_OUT should be pulled low when WL_EN is activated. */ + /* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */ + bt_strap { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "BT strap pin"; + }; +}; + +&gpio7 { + gpioext_2_21_irq { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x21@i2c4 irq"; + }; +}; + +&hscif4 { + pinctrl-0 = <&hscif4_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + + gpio_ext_20: pca9535@20 { + compatible = "nxp,pca9535"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio0>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + }; + + gpio_ext_21: pca9535@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio1>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + }; + + i2cswitch2: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* BCM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* USB3.0 HUB node(s) */ + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Power amp node(s) */ + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* Radio node(s) */ + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* A2B node(s) */ + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* PCIe node(s) */ + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* LVDS display node(s) */ + + polytouch: edt-ft5x06@38 { + compatible = "edt,edt-ft5x06"; + reg = <0x38>; + interrupt-parent = <&gpio5>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Audio, GPS and Gyro node(s) */ + + pcm3168a: audio-codec@44 { + #sound-dai-cells = <0>; + compatible = "ti,pcm3168a"; + reg = <0x44>; + clocks = <&snd_clk>; + clock-names = "scki"; + tdm; + VDD1-supply = <&codec_en_reg>; + VDD2-supply = <&codec_en_reg>; + VCCAD1-supply = <&codec_en_reg>; + VCCAD2-supply = <&codec_en_reg>; + VCCDA1-supply = <&_en_reg>; + VCCDA2-supply = <&_en_reg>; + }; + + lsm9ds0_acc_mag@1d { + compatible = "st,lsm9ds0_accel_magn"; + reg = <0x1d>; + }; + + lsm9ds0_gyr@6b { + compatible = "st,lsm9ds0_gyro"; + reg = <0x6b>; + }; + + /* GPS@ 0x42 */ + }; + }; +}; + +&i2c4 { + gpio_ext_22: pca9535@21 { + compatible = "nxp,pca9535"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio7>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + + cmos_pwdn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS PWDN"; + }; + cmos_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS RST"; + }; + /* pin 12 - CAM_CLK */ + rpi_cam_io_1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO1"; + }; + /* pin 11 - CAM_GPIO - assume pwdn */ + rpi_cam_io_0 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO0"; + }; + }; + + i2cswitch4: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* SAM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* Slot A (CN10) */ + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,sensor_delay = <350>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Slot B (CN11) */ + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + ov106xx_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + ov106xx_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + ov106xx_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + ov106xx_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@1 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + port@0 { + ti9x4_des1ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in4>; + }; + ti9x4_des1ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in5>; + }; + ti9x4_des1ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in6>; + }; + ti9x4_des1ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + ti9x4_csi2ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,sensor_delay = <350>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* Slot B (CN11) */ + + video_b_ext0: pca9535@27 { + compatible = "nxp,pca9535"; + reg = <0x27>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR0"; + }; + video_b_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR1"; + }; + video_b_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR2"; + }; + video_b_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR3"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B led"; + }; + }; + + video_b_ext1: max7325@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg2"; + }; + video_b_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_cam_pwr0 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR0"; + }; + video_b_cam_pwr1 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR1"; + }; + video_b_cam_pwr2 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR2"; + }; + video_b_cam_pwr3 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR3"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B LED"; + }; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Slot A (CN10) */ + + video_a_ext0: pca9535@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A led"; + }; + }; + + video_a_ext1: max7325@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg2"; + }; + video_a_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A LED"; + }; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + vin4_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + vin5_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + vin6_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + vin7_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_clk_pins>; + + /* Multi DAI */ + #sound-dai-cells = <1>; + + rcar_sound,dai { + dai0 { + playback = <&ssi7>; + capture = <&ssi8>; + }; + + dai1 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + + dai2 { + capture = <&ssi6>; + }; + }; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins_3v3>; + pinctrl-names = "default"; + + vmmc-supply = <&wlan_en>; + vqmmc-supply = <&vccq_sdhi3>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + no-1-8-v; + non-removable; + cap-power-off-card; + max-frequency = <26000000>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hsusb { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; + +&msiof1 { + status = "disabled"; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "disabled"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&ssi8 { + shared-pin; +}; diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts new file mode 100644 index 0000000..ac6a12b --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts @@ -0,0 +1,441 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher V1 board on r8a7795 ES1.x + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb-kf-v0.dts" + +/ { + model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795"; + + aliases { + serial1 = &hscif0; + serial2 = &hscif1; + serial3 = &scif1; + }; + + wlan_en: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + codec_en_reg: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "codec-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 15 0>; + + /* delay - CHECK */ + startup-delay-us = <70000>; + enable-active-high; + }; + + amp_en_reg: regulator@7 { + compatible = "regulator-fixed"; + regulator-name = "amp-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 0 0>; + + startup-delay-us = <0>; + enable-active-high; + }; + + /delete-node/regulator@8; + + sdio_switch: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "wifi_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 5 0>; + enable-active-low; + regulator-always-on; + }; + + /delete-node/regulator@10; + + radio_switch: regulator@11 { + compatible = "regulator-fixed"; + regulator-name = "radio_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + kim { + shutdown-gpios = <&gpio_ext_74 3 GPIO_ACTIVE_HIGH>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7513_out>; + }; + }; + }; +}; + +&pfc { + /delete-node/hscif4; + + scif1_pins: scif1 { + groups = "scif1_data_b"; + function = "scif1"; + }; + + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + hscif1_pins: hscif1 { + groups = "hscif1_data_a", "hscif1_ctrl_a"; + function = "hscif1"; + }; + + du_pins: du { + groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp"; + function = "du"; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7513_in>; + }; + }; + }; +}; + +&gpio0 { + /delete-node/video_a_irq; + /delete-node/video_b_irq; + /delete-node/gpioext_2_20_irq; +}; + +&gpio1 { + /delete-node/gpioext_2_21_irq; + /delete-node/wifi_irq; +}; + +&gpio2 { + bl_pwm { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BL PWM 100%"; + }; +}; + +&gpio5 { + /delete-node/touch_irq; + /delete-node/bt_strap; +}; + +&gpio7 { + /delete-node/gpioext_2_21_irq; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&hscif1 { + pinctrl-0 = <&hscif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hscif4 { + /delete-property/pinctrl-0; + /delete-property/pinctrl-names; + + status = "disabled"; +}; + +&i2c2 { + /delete-node/pca9535@20; + /delete-node/pca9535@21; + + gpio_ext_74: pca9539@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; + + hub_pwen { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB pwen"; + }; + hub_rst { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB rst"; + }; + otg_offvbus { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "OTG off VBUSn"; + }; + otg_extlpn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "OTG EXTLPn"; + }; + otg_stat1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + input; + line-name = "OTG Stat1"; + }; + otg_stat2 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + input; + line-name = "OTG Stat2"; + }; + }; + + gpio_ext_75: pca9539@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + + gps_rst { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "GPS rst"; + }; + fpdl_shdn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FPDLink shdn"; + }; + }; +}; + +&i2cswitch2 { + reg = <0x71>; + reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + hdmi@3d { + compatible = "adi,adv7511w"; + reg = <0x3d>; +// interrupt-parent = <&gpio2>; +// interrupts = <0 IRQ_TYPE_EDGE_BOTH>; + pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + adi,clock-delay = <1200>; + adi,clock-max-rate = <100000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7513_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7513_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + }; +}; + +&i2c4 { + /delete-node/pca9535@21; + + gpio_ext_76: pca9539@76 { + compatible = "nxp,pca9539"; + reg = <0x76>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio7>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + + port_b_a0 { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B A0"; + }; + port_b_a1 { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B A1"; + }; + port_a_a0 { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A A0"; + }; + port_a_a1 { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A A1"; + }; + cmos_pwdn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS PWDN"; + }; + cmos_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS RST"; + }; + /* pin 12 - CAM_CLK */ + rpi_cam_io_1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO1"; + }; + /* pin 11 - CAM_GPIO - assume pwdn */ + rpi_cam_io_0 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO0"; + }; + sam_rst { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "SAM RST"; + }; + sam_pwr { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "SAM PWR"; + }; + /* 0 - FPDLink output, 1 - LVDS output */ + lvds_vs_fpdl { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "LVDS switch"; + }; + }; + + gpio_ext_77: pca9539@77 { + compatible = "nxp,pca9539"; + reg = <0x77>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio5>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + + mpcie_wake { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "mPCIe WAKE#"; + }; + mpcie_wdisable { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "mPCIe W_DISABLE"; + }; + mpcie_clreq { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe CLKREQ#"; + }; + mpcie_ovc { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe OVC"; + }; + }; +}; + +&i2cswitch4 { + reg = <0x71>; + reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>; +}; + +&wlcore { + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; +}; diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts new file mode 100644 index 0000000..dd1aadc --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts @@ -0,0 +1,1638 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher V0 board on r8a7795 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "../r8a7795-h3ulcb.dts" + +/ { + model = "Renesas H3ULCB Kingfisher V0 board based on r8a7795"; + + aliases { + serial1 = &hscif4; + }; + + snd_clk: snd_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "scki"; + }; + + wlan_en: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi3: regulator@41 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi3: regulator@5 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + codec_en_reg: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "codec-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 15 0>; + + /* delay - CHECK */ + startup-delay-us = <70000>; + enable-active-high; + }; + + amp_en_reg: regulator@7 { + compatible = "regulator-fixed"; + regulator-name = "amp-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 0 0>; + + startup-delay-us = <0>; + enable-active-high; + }; + + lvds_switch: regulator@8 { + compatible = "regulator-fixed"; + regulator-name = "lvds_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + /* gpio = <&gpio1 24 0>; */ + enable-active-high; + regulator-always-on; + }; + + sdio_switch: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "wifi_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_20 5 0>; + enable-active-low; + regulator-always-on; + }; + + sound_switch: regulator@10 { + compatible = "regulator-fixed"; + regulator-name = "pcm3168a_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_21 5 0>; + enable-active-low; + regulator-always-on; + }; + + radio_switch: regulator@11 { + compatible = "regulator-fixed"; + regulator-name = "radio_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + kim { + compatible = "kim"; + shutdown-gpios = <&gpio_ext_20 3 GPIO_ACTIVE_HIGH>; + /* serial1 */ + dev_name = "/dev/ttySC1"; + flow_cntrl = <1>; + /* int div 8 hscif@26.6666656MHz */ + baud_rate = <3333332>; + }; + + btwilink { + compatible = "btwilink"; + }; + + sound_ext: sound@0 { + pinctrl-0 = <&sound_0_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "pcm3168a"; + + simple-audio-card,bitclock-master = <&sound_ext_master>; + simple-audio-card,frame-master = <&sound_ext_master>; + sound_ext_master: simple-audio-card,cpu@0 { + sound-dai = <&rcar_sound 0>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + }; + + simple-audio-card,codec@0 { + sound-dai = <&pcm3168a>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + system-clock-frequency = <24576000>; + }; + }; + + /delete-node/sound; + + rsnd_ak4613: sound@1 { + pinctrl-0 = <&sound_1_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "ak4613"; + + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu@1 { + sound-dai = <&rcar_sound 1>; + }; + + sndcodec: simple-audio-card,codec@1 { + sound-dai = <&ak4613>; + }; + }; + + sound_radio: sound@2 { + pinctrl-0 = <&sound_2_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "i2s"; + simple-audio-card,name = "radio"; + + simple-audio-card,bitclock-master = <&sound_radio_master>; + simple-audio-card,frame-master = <&sound_radio_master>; + simple-audio-card,cpu@2 { + sound-dai = <&rcar_sound 2>; + }; + + sound_radio_master: simple-audio-card,codec@2 { + sound-dai = <&radio>; + system-clock-frequency = <12288000>; + }; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + radio: si468x@0 { + compatible = "si,si468x-pcm"; + status = "okay"; + + #sound-dai-cells = <0>; + }; +}; + +&pfc { + hscif4_pins: hscif4 { + groups = "hscif4_data_a", "hscif4_ctrl"; + function = "hscif4"; + }; + + sdhi3_pins_3v3: sd3_3v3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + sound_0_pins: sound0 { + groups = "ssi78_ctrl", "ssi7_data", "ssi8_data"; + function = "ssi"; + }; + + sound_1_pins: sound1 { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + sound_2_pins: sound2 { + groups = "ssi6_ctrl", "ssi6_data"; + function = "ssi"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; +}; + +&du { + ports { + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&gpio0 { + video_a_irq { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A irq"; + }; + + video_b_irq { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B irq"; + }; + + gpioext_2_20_irq { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x20@i2c2 irq"; + }; +}; + +&gpio1 { + gpioext_2_21_irq { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x21@i2c2 irq"; + }; + + wifi_irq { + gpio-hog; + gpios = <25 GPIO_ACTIVE_HIGH>; + input; + line-name = "wifi irq"; + }; +}; + +&gpio5 { + touch_irq { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "touch irq"; + }; + + /* From TI forum */ + /* BT_AUD_OUT should be pulled low when WL_EN is activated. */ + /* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */ + bt_strap { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "BT strap pin"; + }; +}; + +&gpio7 { + gpioext_2_21_irq { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x21@i2c4 irq"; + }; +}; + +&hscif4 { + pinctrl-0 = <&hscif4_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + + gpio_ext_20: pca9535@20 { + compatible = "nxp,pca9535"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio0>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + }; + + gpio_ext_21: pca9535@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio1>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + }; + + i2cswitch2: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* BCM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* USB3.0 HUB node(s) */ + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Power amp node(s) */ + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* Radio node(s) */ + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* A2B node(s) */ + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* PCIe node(s) */ + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* LVDS display node(s) */ + + polytouch: edt-ft5x06@38 { + compatible = "edt,edt-ft5x06"; + reg = <0x38>; + interrupt-parent = <&gpio5>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Audio, GPS and Gyro node(s) */ + + pcm3168a: audio-codec@44 { + #sound-dai-cells = <0>; + compatible = "ti,pcm3168a"; + reg = <0x44>; + clocks = <&snd_clk>; + clock-names = "scki"; + tdm; + VDD1-supply = <&codec_en_reg>; + VDD2-supply = <&codec_en_reg>; + VCCAD1-supply = <&codec_en_reg>; + VCCAD2-supply = <&codec_en_reg>; + VCCDA1-supply = <&_en_reg>; + VCCDA2-supply = <&_en_reg>; + }; + + lsm9ds0_acc_mag@1d { + compatible = "st,lsm9ds0_accel_magn"; + reg = <0x1d>; + }; + + lsm9ds0_gyr@6b { + compatible = "st,lsm9ds0_gyro"; + reg = <0x6b>; + }; + + /* GPS@ 0x42 */ + }; + }; +}; + +&i2c4 { + gpio_ext_22: pca9535@21 { + compatible = "nxp,pca9535"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio7>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + + cmos_pwdn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS PWDN"; + }; + cmos_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS RST"; + }; + /* pin 12 - CAM_CLK */ + rpi_cam_io_1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO1"; + }; + /* pin 11 - CAM_GPIO - assume pwdn */ + rpi_cam_io_0 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO0"; + }; + }; + + i2cswitch4: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* SAM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* Slot A (CN10) */ + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,sensor_delay = <350>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Slot B (CN11) */ + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + ov106xx_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + ov106xx_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + ov106xx_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + ov106xx_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@1 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + port@0 { + ti9x4_des1ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in4>; + }; + ti9x4_des1ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in5>; + }; + ti9x4_des1ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in6>; + }; + ti9x4_des1ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + ti9x4_csi2ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,sensor_delay = <350>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* MOST node(s) */ + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* Slot B (CN11) */ + + video_b_ext0: pca9535@27 { + compatible = "nxp,pca9535"; + reg = <0x27>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR0"; + }; + video_b_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR1"; + }; + video_b_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR2"; + }; + video_b_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR3"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B led"; + }; + }; + + video_b_ext1: max7325@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg2"; + }; + video_b_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_cam_pwr0 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR0"; + }; + video_b_cam_pwr1 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR1"; + }; + video_b_cam_pwr2 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR2"; + }; + video_b_cam_pwr3 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR3"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B LED"; + }; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Slot A (CN10) */ + + video_a_ext0: pca9535@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A led"; + }; + }; + + video_a_ext1: max7325@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg2"; + }; + video_a_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A LED"; + }; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + vin4_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + vin5_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + vin6_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + vin7_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_clk_pins>; + + /* Multi DAI */ + #sound-dai-cells = <1>; + + rcar_sound,dai { + dai0 { + playback = <&ssi7>; + capture = <&ssi8>; + }; + + dai1 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + + dai2 { + capture = <&ssi6>; + }; + }; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins_3v3>; + pinctrl-names = "default"; + + vmmc-supply = <&wlan_en>; + vqmmc-supply = <&vccq_sdhi3>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + no-1-8-v; + non-removable; + cap-power-off-card; + max-frequency = <26000000>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hsusb0 { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; + +&msiof1 { + status = "disabled"; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "disabled"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&ssi8 { + shared-pin; +}; + +/* uncomment to enable CN47: SD on SDHI3 */ +//#include "../ulcb-kf-sd3.dtsi" +/* CN48 (Raspberry Pi) on VIN4 */ +//#include "ulcb-kf-rpi.dtsi" +/* CN29: (CMOS camera) on VIN5 */ +//#include "ulcb-kf-cmos.dtsi" diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts new file mode 100644 index 0000000..14b6f52 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts @@ -0,0 +1,465 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher V1 board + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb-kf-v0.dts" + +/ { + model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795"; + + aliases { + serial1 = &hscif0; + serial2 = &hscif1; + serial3 = &scif1; + }; + + wlan_en: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + codec_en_reg: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "codec-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 15 0>; + + /* delay - CHECK */ + startup-delay-us = <70000>; + enable-active-high; + }; + + amp_en_reg: regulator@7 { + compatible = "regulator-fixed"; + regulator-name = "amp-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 0 0>; + + startup-delay-us = <0>; + enable-active-high; + }; + + /delete-node/regulator@8; + + sdio_switch: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "wifi_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 5 0>; + enable-active-low; + regulator-always-on; + }; + + /delete-node/regulator@10; + + radio_switch: regulator@11 { + compatible = "regulator-fixed"; + regulator-name = "radio_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + mpcie_3v3: regulator@12 { + compatible = "regulator-fixed"; + regulator-name = "mPCIe 3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + mpcie_1v8: regulator@13 { + compatible = "regulator-fixed"; + regulator-name = "mPCIe 1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>; + startup-delay-us = <200000>; + enable-active-high; + }; + + kim { + shutdown-gpios = <&gpio_ext_74 3 GPIO_ACTIVE_HIGH>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7513_out>; + }; + }; + }; +}; + +&pfc { + /delete-node/hscif4; + + scif1_pins: scif1 { + groups = "scif1_data_b"; + function = "scif1"; + }; + + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + hscif1_pins: hscif1 { + groups = "hscif1_data_a", "hscif1_ctrl_a"; + function = "hscif1"; + }; + + du_pins: du { + groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp"; + function = "du"; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7513_in>; + }; + }; + }; +}; + +&gpio0 { + /delete-node/video_a_irq; + /delete-node/video_b_irq; + /delete-node/gpioext_2_20_irq; +}; + +&gpio1 { + /delete-node/gpioext_2_21_irq; + /delete-node/wifi_irq; +}; + +&gpio2 { + bl_pwm { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BL PWM 100%"; + }; +}; + +&gpio5 { + /delete-node/touch_irq; + /delete-node/bt_strap; +}; + +&gpio7 { + /delete-node/gpioext_2_21_irq; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&hscif1 { + pinctrl-0 = <&hscif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hscif4 { + /delete-property/pinctrl-0; + /delete-property/pinctrl-names; + + status = "disabled"; +}; + +&i2c2 { + /delete-node/pca9535@20; + /delete-node/pca9535@21; + + gpio_ext_74: pca9539@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; + + hub_pwen { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB pwen"; + }; + hub_rst { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB rst"; + }; + otg_offvbus { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "OTG off VBUSn"; + }; + otg_extlpn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "OTG EXTLPn"; + }; + otg_stat1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + input; + line-name = "OTG Stat1"; + }; + otg_stat2 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + input; + line-name = "OTG Stat2"; + }; + }; + + gpio_ext_75: pca9539@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + + gps_rst { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "GPS rst"; + }; + fpdl_shdn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FPDLink shdn"; + }; + }; +}; + +&i2cswitch2 { + reg = <0x71>; + reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + hdmi@3d { + compatible = "adi,adv7511w"; + reg = <0x3d>; +// interrupt-parent = <&gpio2>; +// interrupts = <0 IRQ_TYPE_EDGE_BOTH>; + pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + adi,clock-delay = <1200>; + adi,clock-max-rate = <100000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7513_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7513_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + }; +}; + +&i2c4 { + /delete-node/pca9535@21; + + gpio_ext_76: pca9539@76 { + compatible = "nxp,pca9539"; + reg = <0x76>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio7>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + + port_b_a0 { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B A0"; + }; + port_b_a1 { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B A1"; + }; + port_a_a0 { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A A0"; + }; + port_a_a1 { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A A1"; + }; + cmos_pwdn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS PWDN"; + }; + cmos_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS RST"; + }; + /* pin 12 - CAM_CLK */ + rpi_cam_io_1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO1"; + }; + /* pin 11 - CAM_GPIO - assume pwdn */ + rpi_cam_io_0 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO0"; + }; + sam_rst { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "SAM RST"; + }; + sam_pwr { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "SAM PWR"; + }; + /* 0 - FPDLink output, 1 - LVDS output */ + lvds_vs_fpdl { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "LVDS switch"; + }; + }; + + gpio_ext_77: pca9539@77 { + compatible = "nxp,pca9539"; + reg = <0x77>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio5>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + + mpcie_wake { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "mPCIe WAKE#"; + }; + mpcie_wdisable { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "mPCIe W_DISABLE"; + }; + mpcie_clreq { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe CLKREQ#"; + }; + mpcie_ovc { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe OVC"; + }; + }; +}; + +&i2cswitch4 { + reg = <0x71>; + reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>; +}; + +&wlcore { + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; +}; + +&pciec1 { + pcie3v3-supply = <&mpcie_3v3>; + pcie1v8-supply = <&mpcie_1v8>; +}; diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts new file mode 100644 index 0000000..b17a42e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts @@ -0,0 +1,1171 @@ +/* + * Device Tree Source for the M3ULCB Kingfisher V0 board on r8a7796 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "../r8a7796-m3ulcb.dts" + +/ { + model = "Renesas M3ULCB Kingfisher V0 board based on r8a7796"; + + aliases { + serial1 = &hscif4; + }; + + snd_clk: snd_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "scki"; + }; + + wlan_en: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi3: regulator@41 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi3: regulator@5 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + codec_en_reg: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "codec-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 15 0>; + + /* delay - CHECK */ + startup-delay-us = <70000>; + enable-active-high; + }; + + amp_en_reg: regulator@7 { + compatible = "regulator-fixed"; + regulator-name = "amp-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_20 0 0>; + + startup-delay-us = <0>; + enable-active-high; + }; + + lvds_switch: regulator@8 { + compatible = "regulator-fixed"; + regulator-name = "lvds_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + /* gpio = <&gpio1 24 0>; */ + enable-active-high; + regulator-always-on; + }; + + sdio_switch: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "wifi_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_20 5 0>; + enable-active-low; + regulator-always-on; + }; + + sound_switch: regulator@10 { + compatible = "regulator-fixed"; + regulator-name = "pcm3168a_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_21 5 0>; + enable-active-low; + regulator-always-on; + }; + + radio_switch: regulator@11 { + compatible = "regulator-fixed"; + regulator-name = "radio_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + kim { + compatible = "kim"; + shutdown-gpios = <&gpio_ext_20 3 GPIO_ACTIVE_HIGH>; + /* serial1 */ + dev_name = "/dev/ttySC1"; + flow_cntrl = <1>; + /* int div 8 hscif@26.6666656MHz */ + baud_rate = <3333332>; + }; + + btwilink { + compatible = "btwilink"; + }; + + sound_ext: sound@0 { + pinctrl-0 = <&sound_0_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "pcm3168a"; + + simple-audio-card,bitclock-master = <&sound_ext_master>; + simple-audio-card,frame-master = <&sound_ext_master>; + sound_ext_master: simple-audio-card,cpu@0 { + sound-dai = <&rcar_sound 0>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + }; + + simple-audio-card,codec@0 { + sound-dai = <&pcm3168a>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + system-clock-frequency = <24576000>; + }; + }; + + /delete-node/sound; + + rsnd_ak4613: sound@1 { + pinctrl-0 = <&sound_1_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "ak4613"; + + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu@1 { + sound-dai = <&rcar_sound 1>; + }; + + sndcodec: simple-audio-card,codec@1 { + sound-dai = <&ak4613>; + }; + }; + + sound_radio: sound@2 { + pinctrl-0 = <&sound_2_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "i2s"; + simple-audio-card,name = "radio"; + + simple-audio-card,bitclock-master = <&sound_radio_master>; + simple-audio-card,frame-master = <&sound_radio_master>; + simple-audio-card,cpu@2 { + sound-dai = <&rcar_sound 2>; + }; + + sound_radio_master: simple-audio-card,codec@2 { + sound-dai = <&radio>; + system-clock-frequency = <12288000>; + }; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + radio: si468x@0 { + compatible = "si,si468x-pcm"; + status = "okay"; + + #sound-dai-cells = <0>; + }; +}; + +&pfc { + hscif4_pins: hscif4 { + groups = "hscif4_data_a", "hscif4_ctrl"; + function = "hscif4"; + }; + + sdhi3_pins_3v3: sd3_3v3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + sound_0_pins: sound0 { + groups = "ssi78_ctrl", "ssi7_data", "ssi8_data"; + function = "ssi"; + }; + + sound_1_pins: sound1 { + groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + sound_2_pins: sound2 { + groups = "ssi6_ctrl", "ssi6_data"; + function = "ssi"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; +}; + +&du { + ports { + port@2 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&gpio0 { + video_a_irq { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A irq"; + }; + + video_b_irq { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B irq"; + }; + + gpioext_2_20_irq { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x20@i2c2 irq"; + }; +}; + +&gpio1 { + gpioext_2_21_irq { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x21@i2c2 irq"; + }; + + wifi_irq { + gpio-hog; + gpios = <25 GPIO_ACTIVE_HIGH>; + input; + line-name = "wifi irq"; + }; +}; + +&gpio5 { + touch_irq { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "touch irq"; + }; + + /* From TI forum */ + /* BT_AUD_OUT should be pulled low when WL_EN is activated. */ + /* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */ + bt_strap { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "BT strap pin"; + }; +}; + +&gpio7 { + gpioext_2_21_irq { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x21@i2c4 irq"; + }; +}; + +&hscif4 { + pinctrl-0 = <&hscif4_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + + gpio_ext_20: pca9535@20 { + compatible = "nxp,pca9535"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio0>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + }; + + gpio_ext_21: pca9535@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio1>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + }; + + i2cswitch2: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* BCM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* USB3.0 HUB node(s) */ + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Power amp node(s) */ + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* Radio node(s) */ + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* A2B node(s) */ + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* PCIe node(s) */ + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* LVDS display node(s) */ + + polytouch: edt-ft5x06@38 { + compatible = "edt,edt-ft5x06"; + reg = <0x38>; + interrupt-parent = <&gpio5>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Audio, GPS and Gyro node(s) */ + + pcm3168a: audio-codec@44 { + #sound-dai-cells = <0>; + compatible = "ti,pcm3168a"; + reg = <0x44>; + clocks = <&snd_clk>; + clock-names = "scki"; + tdm; + VDD1-supply = <&codec_en_reg>; + VDD2-supply = <&codec_en_reg>; + VCCAD1-supply = <&codec_en_reg>; + VCCAD2-supply = <&codec_en_reg>; + VCCDA1-supply = <&_en_reg>; + VCCDA2-supply = <&_en_reg>; + }; + + lsm9ds0_acc_mag@1d { + compatible = "st,lsm9ds0_accel_magn"; + reg = <0x1d>; + }; + + lsm9ds0_gyr@6b { + compatible = "st,lsm9ds0_gyro"; + reg = <0x6b>; + }; + + /* GPS@ 0x42 */ + }; + }; +}; + +&i2c4 { + gpio_ext_22: pca9535@21 { + compatible = "nxp,pca9535"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio7>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + + cmos_pwdn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS PWDN"; + }; + cmos_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS RST"; + }; + /* pin 12 - CAM_CLK */ + rpi_cam_io_1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO1"; + }; + /* pin 11 - CAM_GPIO - assume pwdn */ + rpi_cam_io_0 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO0"; + }; + }; + + i2cswitch4: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* SAM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* Slot A (CN10) */ + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,sensor_delay = <350>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* MOST node(s) */ + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Slot A (CN10) */ + + video_a_ext0: pca9535@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A led"; + }; + }; + + video_a_ext1: max7325@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg2"; + }; + video_a_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A LED"; + }; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_clk_pins>; + + /* Multi DAI */ + #sound-dai-cells = <1>; + + rcar_sound,dai { + dai0 { + playback = <&ssi7>; + capture = <&ssi8>; + }; + + dai1 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + + dai2 { + capture = <&ssi6>; + }; + }; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins_3v3>; + pinctrl-names = "default"; + + vmmc-supply = <&wlan_en>; + vqmmc-supply = <&vccq_sdhi3>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + no-1-8-v; + non-removable; + cap-power-off-card; + max-frequency = <26000000>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hsusb { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; + +&msiof1 { + status = "disabled"; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "disabled"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&ssi8 { + shared-pin; +}; + +/* uncomment to enable CN47: SD on SDHI3 */ +//#include "../ulcb-kf-sd3.dtsi" +/* CN48 (Raspberry Pi) on VIN4 */ +#include "ulcb-kf-rpi.dtsi" +/* CN29: (CMOS camera) on VIN5 */ +#include "ulcb-kf-cmos.dtsi" diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts new file mode 100644 index 0000000..637c840 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts @@ -0,0 +1,465 @@ +/* + * Device Tree Source for the M3ULCB Kingfisher V1 board + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7796-m3ulcb-kf-v0.dts" + +/ { + model = "Renesas M3ULCB Kingfisher V1 board based on r8a7796"; + + aliases { + serial1 = &hscif0; + serial2 = &hscif1; + serial3 = &scif1; + }; + + wlan_en: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + codec_en_reg: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "codec-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 15 0>; + + /* delay - CHECK */ + startup-delay-us = <70000>; + enable-active-high; + }; + + amp_en_reg: regulator@7 { + compatible = "regulator-fixed"; + regulator-name = "amp-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 0 0>; + + startup-delay-us = <0>; + enable-active-high; + }; + + /delete-node/regulator@8; + + sdio_switch: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "wifi_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 5 0>; + enable-active-low; + regulator-always-on; + }; + + /delete-node/regulator@10; + + radio_switch: regulator@11 { + compatible = "regulator-fixed"; + regulator-name = "radio_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + mpcie_3v3: regulator@12 { + compatible = "regulator-fixed"; + regulator-name = "mPCIe 3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + mpcie_1v8: regulator@13 { + compatible = "regulator-fixed"; + regulator-name = "mPCIe 1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>; + startup-delay-us = <200000>; + enable-active-high; + }; + + kim { + shutdown-gpios = <&gpio_ext_74 3 GPIO_ACTIVE_HIGH>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7513_out>; + }; + }; + }; +}; + +&pfc { + /delete-node/hscif4; + + scif1_pins: scif1 { + groups = "scif1_data_b"; + function = "scif1"; + }; + + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + hscif1_pins: hscif1 { + groups = "hscif1_data_a", "hscif1_ctrl_a"; + function = "hscif1"; + }; + + du_pins: du { + groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp"; + function = "du"; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7513_in>; + }; + }; + }; +}; + +&gpio0 { + /delete-node/video_a_irq; + /delete-node/video_b_irq; + /delete-node/gpioext_2_20_irq; +}; + +&gpio1 { + /delete-node/gpioext_2_21_irq; + /delete-node/wifi_irq; +}; + +&gpio2 { + bl_pwm { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BL PWM 100%"; + }; +}; + +&gpio5 { + /delete-node/touch_irq; + /delete-node/bt_strap; +}; + +&gpio7 { + /delete-node/gpioext_2_21_irq; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&hscif1 { + pinctrl-0 = <&hscif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hscif4 { + /delete-property/pinctrl-0; + /delete-property/pinctrl-names; + + status = "disabled"; +}; + +&i2c2 { + /delete-node/pca9535@20; + /delete-node/pca9535@21; + + gpio_ext_74: pca9539@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; + + hub_pwen { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB pwen"; + }; + hub_rst { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB rst"; + }; + otg_offvbus { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "OTG off VBUSn"; + }; + otg_extlpn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "OTG EXTLPn"; + }; + otg_stat1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + input; + line-name = "OTG Stat1"; + }; + otg_stat2 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + input; + line-name = "OTG Stat2"; + }; + }; + + gpio_ext_75: pca9539@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + + gps_rst { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "GPS rst"; + }; + fpdl_shdn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FPDLink shdn"; + }; + }; +}; + +&i2cswitch2 { + reg = <0x71>; + reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + hdmi@3d { + compatible = "adi,adv7511w"; + reg = <0x3d>; +// interrupt-parent = <&gpio2>; +// interrupts = <0 IRQ_TYPE_EDGE_BOTH>; + pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + adi,clock-delay = <1200>; + adi,clock-max-rate = <100000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7513_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7513_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + }; +}; + +&i2c4 { + /delete-node/pca9535@21; + + gpio_ext_76: pca9539@76 { + compatible = "nxp,pca9539"; + reg = <0x76>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio7>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + + port_b_a0 { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B A0"; + }; + port_b_a1 { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B A1"; + }; + port_a_a0 { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A A0"; + }; + port_a_a1 { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A A1"; + }; + cmos_pwdn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS PWDN"; + }; + cmos_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS RST"; + }; + /* pin 12 - CAM_CLK */ + rpi_cam_io_1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO1"; + }; + /* pin 11 - CAM_GPIO - assume pwdn */ + rpi_cam_io_0 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO0"; + }; + sam_rst { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "SAM RST"; + }; + sam_pwr { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "SAM PWR"; + }; + /* 0 - FPDLink output, 1 - LVDS output */ + lvds_vs_fpdl { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "LVDS switch"; + }; + }; + + gpio_ext_77: pca9539@77 { + compatible = "nxp,pca9539"; + reg = <0x77>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio5>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + + mpcie_wake { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "mPCIe WAKE#"; + }; + mpcie_wdisable { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "mPCIe W_DISABLE"; + }; + mpcie_clreq { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe CLKREQ#"; + }; + mpcie_ovc { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe OVC"; + }; + }; +}; + +&i2cswitch4 { + reg = <0x71>; + reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>; +}; + +&wlcore { + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; +}; + +&pciec1 { + pcie3v3-supply = <&mpcie_3v3>; + pcie1v8-supply = <&mpcie_1v8>; +}; diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7797-v3msk-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7797-v3msk-kf-v0.dts new file mode 100644 index 0000000..674d3bf --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/r8a7797-v3msk-kf-v0.dts @@ -0,0 +1,82 @@ +/* + * Device Tree Source for the V3MSK Kingfisher V0 board on r8a7797 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "../r8a7797-v3msk-kf.dts" + +/ { + model = "Renesas V3MSK Kingfisher V0 board based on r8a7797"; +}; + +&i2cswitch4 { + reg = <0x74>; +}; + +&msiof1 { + pinctrl-0 = <&msiof1_pins>; + pinctrl-names = "default"; + status = "okay"; + + spidev@0 { + compatible = "renesas,sh-msiof"; + reg = <0>; + spi-max-frequency = <66666666>; + spi-cpha; + spi-cpol; + }; +}; + +&msiof2 { + pinctrl-0 = <&msiof2_pins>; + pinctrl-names = "default"; + status = "okay"; + + spidev@0 { + compatible = "renesas,sh-msiof"; + reg = <0>; + spi-max-frequency = <66666666>; + spi-cpha; + spi-cpol; + }; +}; + +&msiof3 { + pinctrl-0 = <&msiof3_pins>; + pinctrl-names = "default"; + status = "okay"; + + spidev@0 { + compatible = "renesas,sh-msiof"; + reg = <0>; + spi-max-frequency = <66666666>; + spi-cpha; + spi-cpol; + }; +}; + +&pfc { + msiof1_pins: spi2 { + groups = "msiof1_clk", "msiof1_sync", "msiof1_rxd", + "msiof1_txd"; + function = "msiof1"; + }; + + msiof2_pins: spi3 { + groups = "msiof2_clk", "msiof2_sync", "msiof2_rxd", + "msiof2_txd"; + function = "msiof2"; + }; + + msiof3_pins: spi4 { + groups = "msiof3_clk", "msiof3_sync", "msiof3_rxd", + "msiof3_txd"; + function = "msiof3"; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/legacy/ulcb-kf-cmos.dtsi b/arch/arm64/boot/dts/renesas/legacy/ulcb-kf-cmos.dtsi new file mode 100644 index 0000000..2145f5e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/ulcb-kf-cmos.dtsi @@ -0,0 +1,75 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher board: + * this adding conflicting resource on VIN5 for CMOS camera + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/ { + camera_clk: camera_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "mclk"; + }; +}; + +&pfc { + vin5_pins: vin5 { + groups = "vin5_data8", "vin5_sync", "vin5_clk"; + function = "vin5"; + }; +}; + +&i2cswitch4 { + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + + cmos_camera: ov5642@3c { + compatible = "ovti,ov5642"; + reg = <0x3c>; + clocks = <&camera_clk>; + clock-names = "mclk"; + + port@0 { + cmos_camera_in: endpoint { + remote-endpoint = <&vin5ep0>; + }; + }; + }; + }; +}; + +&vin5 { + pinctrl-0 = <&vin5_pins>; + pinctrl-names = "default"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + /delete-property/csi,select; + /delete-property/virtual,channel; + /delete-property/data-lanes; + bus-width = <8>; + /* #HSYNC, #VSYNC */ + vsync-active = <1>; + hsync-active = <0>; + remote-endpoint = <&cmos_camera_in>; + }; + }; + port@1 { + /delete-node/endpoint; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/legacy/ulcb-kf-rpi.dtsi b/arch/arm64/boot/dts/renesas/legacy/ulcb-kf-rpi.dtsi new file mode 100644 index 0000000..bcd9865 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/legacy/ulcb-kf-rpi.dtsi @@ -0,0 +1,77 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher board: + * this adding conflicting resource on VIN4 for Raspberry Pi camera + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +&i2cswitch4 { + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + rpi_camera: ov5647@36 { + compatible = "ovti,ov5647"; + reg = <0x36>; + + port@0 { + rpi_camera_in: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&vin4ep0>; + }; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi20"; + virtual,channel = <0>; + remote-endpoint = <&rpi_camera_in>; + data-lanes = <1 2>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_20_ep>; + }; + }; + }; +}; + +&csi2_20 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "raw8"; + receive,vc = <0>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_20_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + csi-rate = <280>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts new file mode 100644 index 0000000..6b13f07 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts @@ -0,0 +1,22 @@ +/* + * Device Tree Source for the H3ULCB.HAD board Alfa side on r8a7795 ES1.x + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb-had.dtsi" + +/ { + model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795"; +}; + +&pciec0 { + status = "okay"; + + /* Root complex */ +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts new file mode 100644 index 0000000..2f8b274 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts @@ -0,0 +1,23 @@ +/* + * Device Tree Source for the H3ULCB.HAD board Beta side on r8a7795 ES1.x + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb-had.dtsi" + +/ { + model = "Renesas H3ULCB.HAD board Beta side based on r8a7795"; +}; + +&pciec0 { + status = "okay"; + + /* Endpoint */ + endpoint; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi new file mode 100644 index 0000000..dd399f4 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi @@ -0,0 +1,221 @@ +/* + * Device Tree Source for the H3ULCB.HAD board on r8a7795 ES1.x + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2016-2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/* + * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides) + * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0) + */ + +#include "r8a7795-es1-h3ulcb-view.dts" + +/ { + model = "Renesas H3ULCB.HAD board based on r8a7795"; + + aliases { + serial0 = &scif1; + spi1 = &spi0_gpio; + spi2 = &spi1_gpio; + }; + + spi0_gpio: spi_gpio@0 { + compatible = "spi-gpio"; + num-chipselects = <1>; + gpio-sck = <&gpio5 17 0>; + gpio-mosi = <&gpio5 20 0>; + gpio-miso = <&gpio5 22 0>; + cs-gpios = <&gpio5 19 0>; + #address-cells = <1>; + #size-cells = <0>; + + spidev@0 { + compatible = "spi-gpio"; + reg = <0>; + spi-max-frequency = <2000000>; + spi-cpha; + spi-cpol; + }; + }; + + spi1_gpio: spi_gpio@1 { + compatible = "spi-gpio"; + num-chipselects = <1>; + gpio-sck = <&gpio6 8 0>; + gpio-mosi = <&gpio6 7 0>; + gpio-miso = <&gpio6 10 0>; + cs-gpios = <&gpio6 5 0>; + #address-cells = <1>; + #size-cells = <0>; + + spidev@0 { + compatible = "spi-gpio"; + reg = <0>; + spi-max-frequency = <2000000>; + spi-cpha; + spi-cpol; + }; + }; + + hdmi1-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi1_out>; + }; + }; + }; +}; + +&du { + ports { + port@1 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi0_in>; + }; + }; + port@2 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi1_in>; + }; + }; + }; +}; + +&hdmi1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + rcar_dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&pfc { + scif1_pins: scif1 { + groups = "scif1_data_a"; + function = "scif1"; + }; + + msiof0_pins: spi1 { + groups = "msiof0_clk", "msiof0_rxd", "msiof0_txd", + "msiof0_ss1"; + function = "msiof0"; + }; + + msiof1_pins: spi2 { + groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a", + "msiof1_ss1_a"; + function = "msiof1"; + }; + + sound_clk_pins: sound-clk { + groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", + "audio_clkout_a" /*, "audio_clkout3_a"*/; + function = "audio_clk"; + }; + + usb31_pins: usb31 { + groups = "usb31"; + function = "usb31"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&avb { + /delete-property/phy-handle; + /delete-property/phy-gpios; + /delete-node/ethernet-phy@0; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&msiof0 { + pinctrl-0 = <&msiof0_pins>; + pinctrl-names = "default"; + status = "disabled"; + cs-gpios = <&gpio5 19 0>; + + spidev@0 { + compatible = "renesas,sh-msiof"; + reg = <0>; + spi-max-frequency = <66666666>; + spi-cpha; + spi-cpol; + }; +}; + +&msiof1 { + status = "disabled"; + cs-gpios = <&gpio6 5 0>; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "disabled"; + + renesas,can-clock-select = <0x0>; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */ + &gpio2 7 GPIO_ACTIVE_LOW /* standby */ + >; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */ + &gpio2 7 GPIO_ACTIVE_LOW /* standby */ + >; + + channel0 { + status = "okay"; + }; +}; + +&xhci1 { + status = "okay"; + pinctrl-0 = <&usb31_pins>; + pinctrl-names = "default"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts new file mode 100644 index 0000000..849afae --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts @@ -0,0 +1,39 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher board on r8a7795 ES1.x + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb.dts" +#include "ulcb-kf.dtsi" + +/ { + model = "Renesas H3ULCB Kingfisher board based on r8a7795"; +}; + +&du { + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7513_in>; + }; + }; + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&hsusb { + status = "okay"; +}; + +/* use CN11 instead default CN29/CN48 (H3 only) */ +//#include "ulcb-kf-cn11.dtsi" diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts new file mode 100644 index 0000000..549a717 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts @@ -0,0 +1,69 @@ +/* + * Device Tree Source for the H3ULCB Videobox board on r8a7795 ES1.x + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb.dts" +#include "ulcb-vb.dtsi" + +/ { + model = "Renesas H3ULCB Videobox board based on r8a7795"; + + hdmi1-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi1_out>; + }; + }; + }; +}; + +&du { + ports { + port@2 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi1_in>; + }; + }; + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&hdmi1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + rcar_dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&hsusb { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb2.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb2.dts new file mode 100644 index 0000000..1a8db57 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb2.dts @@ -0,0 +1,77 @@ +/* + * Device Tree Source for the H3ULCB Videobox board V2 on r8a7795 + * + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb.dts" +#include "ulcb-vb2.dtsi" + +/ { + model = "Renesas H3ULCB Videobox board based on r8a7795"; + + hdmi1-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi1_out>; + }; + }; + }; +}; + +&pfc { + usb31_pins: usb31 { + groups = "usb31"; + function = "usb31"; + }; +}; + +&du { + ports { + port@2 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi1_in>; + }; + }; + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&hdmi1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + rcar_dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&xhci1 { + status = "okay"; + pinctrl-0 = <&usb31_pins>; + pinctrl-names = "default"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts new file mode 100644 index 0000000..323722c --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts @@ -0,0 +1,26 @@ +/* + * Device Tree Source for the H3ULCB Videobox Mini board on r8a7795 ES1.x + * + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb.dts" +#include "ulcb-vbm.dtsi" + +/ { + model = "Renesas H3ULCB Videobox Mini board based on r8a7795"; +}; + +&du { + ports { + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts new file mode 100644 index 0000000..d91120e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts @@ -0,0 +1,544 @@ +/* + * Device Tree Source for the H3ULCB.View board on r8a7795 ES1.x + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2016-2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-h3ulcb.dts" + +/ { + model = "Renesas H3ULCB.View board based on r8a7795"; +}; + +&i2c4 { + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_des1ep3: endpoint { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x4c>; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + maxim,i2c-quirk = <0x6c>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x6c>; + gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x54>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x55>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x56>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x57>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts new file mode 100644 index 0000000..a00147c --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts @@ -0,0 +1,550 @@ +/* + * Device Tree Source for the Salvator-X.View board on r8a7795 ES1.x + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2015-2017 Cogent Embedded, Inc + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-es1-salvator-x.dts" + +/ { + model = "Renesas Salvator-X.View board based on r8a7795"; +}; + +&pfc { + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; +}; + +&i2c4 { + /delete-node/hdmi-in@34; + /delete-node/composite-in@70; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_des1ep3: endpoint { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x4c>; + gpios = <&gpio6 30 GPIO_ACTIVE_LOW>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + maxim,i2c-quirk = <0x6c>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x6c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x54>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x55>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x56>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x57>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; +}; + +&vin0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&vin4 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; +}; + +&vin5 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; +}; + +&vin6 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; +}; + +&vin7 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; +}; + +&csi2_20 { + status = "disabled"; + /delete-node/ports; +}; + +&csi2_40 { + /delete-node/ports; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts new file mode 100644 index 0000000..ae115bd --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts @@ -0,0 +1,22 @@ +/* + * Device Tree Source for the H3ULCB.HAD board Alfa side + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb-had.dtsi" + +/ { + model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795"; +}; + +&pciec0 { + status = "okay"; + + /* Root complex */ +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts new file mode 100644 index 0000000..805067e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts @@ -0,0 +1,23 @@ +/* + * Device Tree Source for the H3ULCB.HAD board Beta side + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb-had.dtsi" + +/ { + model = "Renesas H3ULCB.HAD board Beta side based on r8a7795"; +}; + +&pciec0 { + status = "okay"; + + /* Endpoint */ + endpoint; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi new file mode 100644 index 0000000..d1bbea4 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi @@ -0,0 +1,215 @@ +/* + * Device Tree Source for the H3ULCB.HAD board on r8a7795 + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2016-2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/* + * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides) + * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0) + */ + +#include "r8a7795-h3ulcb-view.dts" + +/ { + model = "Renesas H3ULCB.HAD board based on r8a7795"; + + aliases { + serial0 = &scif1; + spi1 = &spi0_gpio; + spi2 = &spi1_gpio; + }; + + spi0_gpio: spi_gpio@0 { + compatible = "spi-gpio"; + num-chipselects = <1>; + gpio-sck = <&gpio5 17 0>; + gpio-mosi = <&gpio5 20 0>; + gpio-miso = <&gpio5 22 0>; + cs-gpios = <&gpio5 19 0>; + #address-cells = <1>; + #size-cells = <0>; + + spidev@0 { + compatible = "spi-gpio"; + reg = <0>; + spi-max-frequency = <2000000>; + spi-cpha; + spi-cpol; + }; + }; + + spi1_gpio: spi_gpio@1 { + compatible = "spi-gpio"; + num-chipselects = <1>; + gpio-sck = <&gpio6 8 0>; + gpio-mosi = <&gpio6 7 0>; + gpio-miso = <&gpio6 10 0>; + cs-gpios = <&gpio6 5 0>; + #address-cells = <1>; + #size-cells = <0>; + + spidev@0 { + compatible = "spi-gpio"; + reg = <0>; + spi-max-frequency = <2000000>; + spi-cpha; + spi-cpol; + }; + }; + + hdmi1-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi1_out>; + }; + }; + }; +}; + +&du { + ports { + port@1 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi0_in>; + }; + }; + port@2 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi1_in>; + }; + }; + }; +}; + +&hdmi1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + rcar_dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&pfc { + scif1_pins: scif1 { + groups = "scif1_data_a"; + function = "scif1"; + }; + + msiof0_pins: spi1 { + groups = "msiof0_clk", "msiof0_rxd", "msiof0_txd", + "msiof0_ss1"; + function = "msiof0"; + }; + + msiof1_pins: spi2 { + groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a", + "msiof1_ss1_a"; + function = "msiof1"; + }; + + sound_clk_pins: sound-clk { + groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", + "audio_clkout_a" /*, "audio_clkout3_a"*/; + function = "audio_clk"; + }; + + usb31_pins: usb31 { + groups = "usb31"; + function = "usb31"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&avb { + /delete-property/phy-handle; + /delete-property/phy-gpios; + /delete-node/ethernet-phy@0; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&msiof0 { + pinctrl-0 = <&msiof0_pins>; + pinctrl-names = "default"; + status = "disabled"; + cs-gpios = <&gpio5 19 0>; + + spidev@0 { + compatible = "renesas,sh-msiof"; + reg = <0>; + spi-max-frequency = <66666666>; + spi-cpha; + spi-cpol; + }; +}; + +&msiof1 { + status = "disabled"; + cs-gpios = <&gpio6 5 0>; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "disabled"; + + renesas,can-clock-select = <0x0>; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */ + &gpio2 7 GPIO_ACTIVE_LOW /* standby */ + >; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */ + &gpio2 7 GPIO_ACTIVE_LOW /* standby */ + >; + + channel0 { + status = "okay"; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts new file mode 100644 index 0000000..4fe67f8 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts @@ -0,0 +1,39 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher board on r8a7795 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb.dts" +#include "ulcb-kf.dtsi" + +/ { + model = "Renesas H3ULCB Kingfisher board based on r8a7795"; +}; + +&du { + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7513_in>; + }; + }; + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&hsusb0 { + status = "okay"; +}; + +/* use CN11 instead default CN29/CN48 (H3 only) */ +//#include "ulcb-kf-cn11.dtsi" diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts new file mode 100644 index 0000000..330bba2 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts @@ -0,0 +1,68 @@ +/* + * Device Tree Source for the H3ULCB Videobox board on r8a7795 + * + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb.dts" +#include "ulcb-vb.dtsi" + +/ { + model = "Renesas H3ULCB Videobox board based on r8a7795"; + + hdmi1-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi1_out>; + }; + }; + }; +}; + +&du { + ports { + port@2 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi1_in>; + }; + }; + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&hdmi1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + rcar_dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&hsusb0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb2.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb2.dts new file mode 100644 index 0000000..e862d3e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb2.dts @@ -0,0 +1,68 @@ +/* + * Device Tree Source for the H3ULCB Videobox board V2 on r8a7795 + * + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb.dts" +#include "ulcb-vb2.dtsi" + +/ { + model = "Renesas H3ULCB Videobox board based on r8a7795"; + + hdmi1-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi1_out>; + }; + }; + }; +}; + +&du { + ports { + port@2 { + endpoint { + remote-endpoint = <&rcar_dw_hdmi1_in>; + }; + }; + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&hdmi1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + rcar_dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&hsusb0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts new file mode 100644 index 0000000..87f1889 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts @@ -0,0 +1,26 @@ +/* + * Device Tree Source for the H3ULCB Videobox Mini board on r8a7795 ES1.x + * + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb.dts" +#include "ulcb-vbm.dtsi" + +/ { + model = "Renesas H3ULCB Videobox Mini board based on r8a7795"; +}; + +&du { + ports { + port@3 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts new file mode 100644 index 0000000..d6adc07 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts @@ -0,0 +1,544 @@ +/* + * Device Tree Source for the H3ULCB.View board + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2016-2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-h3ulcb.dts" + +/ { + model = "Renesas H3ULCB.View board based on r8a7795"; +}; + +&i2c4 { + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_des1ep3: endpoint { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x4c>; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + maxim,i2c-quirk = <0x6c>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x6c>; + gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x54>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x55>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x56>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x57>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts new file mode 100644 index 0000000..54c585d --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts @@ -0,0 +1,550 @@ +/* + * Device Tree Source for the Salvator-X.View board + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2015-2017 Cogent Embedded, Inc + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795-salvator-x.dts" + +/ { + model = "Renesas Salvator-X.View board based on r8a7795"; +}; + +&pfc { + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; +}; + +&i2c4 { + /delete-node/hdmi-in@34; + /delete-node/composite-in@70; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_des1ep3: endpoint { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x4c>; + gpios = <&gpio6 30 GPIO_ACTIVE_LOW>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + maxim,i2c-quirk = <0x6c>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x6c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x54>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x55>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x56>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x57>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; +}; + +&vin0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&vin4 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; +}; + +&vin5 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; +}; + +&vin6 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; +}; + +&vin7 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; +}; + +&csi2_20 { + status = "disabled"; + /delete-node/ports; +}; + +&csi2_40 { + /delete-node/ports; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts new file mode 100644 index 0000000..a409402 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts @@ -0,0 +1,40 @@ +/* + * Device Tree Source for the M3ULCB Kingfisher board on r8a7796 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7796-m3ulcb.dts" +#include "ulcb-kf.dtsi" + +/ { + model = "Renesas M3ULCB Kingfisher board based on r8a7796"; +}; + +&du { + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7513_in>; + }; + }; + port@2 { + endpoint { + remote-endpoint = <&lvds_enc_in>; + }; + }; + }; +}; + +&hsusb { + status = "okay"; +}; + +&xhci0 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts new file mode 100644 index 0000000..bfbd897 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts @@ -0,0 +1,286 @@ +/* + * Device Tree Source for the M3ULCB.View board on r8a7796 + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2016-2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7796-m3ulcb.dts" + +/ { + model = "Renesas M3ULCB.View board based on r8a7796"; +}; + +&i2c4 { + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x4c>; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + maxim,i2c-quirk = <0x6c>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts new file mode 100644 index 0000000..c515046 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts @@ -0,0 +1,317 @@ +/* + * Device Tree Source for the Salvator-X.View board + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2016-2017 Cogent Embedded, Inc + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7796-salvator-x.dts" + +/ { + model = "Renesas Salvator-X.View board based on r8a7796"; +}; + +&pfc { + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; +}; + +&i2c4 { + /delete-node/hdmi-in@34; + /delete-node/composite-in@70; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x4c>; + gpios = <&gpio6 30 GPIO_ACTIVE_LOW>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + maxim,i2c-quirk = <0x6c>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; +}; + +&vin0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "disabled"; +}; + +&vin5 { + status = "disabled"; +}; + +&vin6 { + status = "disabled"; +}; + +&vin7 { + status = "disabled"; +}; + +&csi2_20 { + status = "disabled"; + /delete-node/ports; +}; + +&csi2_40 { + /delete-node/ports; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-eagle-function.dts b/arch/arm64/boot/dts/renesas/r8a7797-eagle-function.dts new file mode 100644 index 0000000..82d6513 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-eagle-function.dts @@ -0,0 +1,62 @@ +/* + * Device Tree Source for the Eagle Function board on r8a7797 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-eagle.dts" + +/ { + model = "Renesas Eagle Function board based on r8a7797"; + + vcc_3v3: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-VCC3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_vddq_vin0: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "VCC-VDDQ-VIN0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&pfc { + sdhi2_pins_1v8: sdhi2_1v8 { + groups = "mmc_data8", "mmc_ctrl"; + function = "mmc"; + power-source = <1800>; + }; + + sdhi2_pins_3v3: sdhi2_3v3 { + groups = "mmc_data8", "mmc_ctrl"; + function = "mmc"; + power-source = <3300>; + }; +}; + +&sdhi2 { + /* used for on-board eMMC */ + pinctrl-0 = <&sdhi2_pins_3v3>; + pinctrl-1 = <&sdhi2_pins_1v8>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_vddq_vin0>; + mmc-hs200-1_8v; + bus-width = <8>; + non-removable; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-eagle.dts b/arch/arm64/boot/dts/renesas/r8a7797-eagle.dts new file mode 100644 index 0000000..db17b03 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-eagle.dts @@ -0,0 +1,605 @@ +/* + * Device Tree Source for the Eagle board + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7797.dtsi" +#include + +/ { + model = "Renesas Eagle board based on r8a7797"; + compatible = "renesas,eagle", "renesas,r8a7797"; + + aliases { + serial0 = &scif0; + ethernet0 = &avb; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* device specific region for Lossy Decompression */ + lossy_decompress: linux,lossy_decompress { + no-map; + reg = <0x00000000 0x6c000000 0x0 0x03000000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + reg = <0x00000000 0x6f000000 0x0 0x10000000>; + linux,cma-default; + }; + + /* device specific region for contiguous allocations */ + linux,multimedia { + compatible = "shared-dma-pool"; + reusable; + reg = <0x00000000 0x7f000000 0x0 0x01000000>; + }; + }; + + mmngr { + compatible = "renesas,mmngr"; + memory-region = <&lossy_decompress>; + }; + + mmngrbuf { + compatible = "renesas,mmngrbuf"; + }; + + vspm_if { + compatible = "renesas,vspm_if"; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + clock-frequency = <133000000>; + hactive = <1024>; + vactive = <768>; + hsync-len = <136>; + hfront-porch = <20>; + hback-porch = <160>; + vfront-porch = <3>; + vback-porch = <29>; + vsync-len = <6>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; + + dclkin_p0: clock-out0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + msiof_ref_clk: msiof-ref-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <66666666>; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_b"; + function = "scif_clk"; + }; + + i2c0_pins: i2c0 { + groups = "i2c0"; + function = "i2c0"; + }; + + i2c3_pins: i2c3 { + groups = "i2c3"; + function = "i2c3"; + }; + + avb_pins: avb { + groups = "avb0_mdc"; + function = "avb0"; + }; + + du_pins: du { + groups = "du_rgb666", "du_sync", "du_clk_out_0", "du_disp"; + function = "du"; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + hdmi@39{ + compatible = "adi,adv7511w"; + #sound-dai-cells = <0>; + reg = <0x39>; + interrupt-parent = <&gpio1>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + + gpio_ext: pca9654@20 { + compatible = "onsemi,pca9654"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + pmic@5A { + compatible = "dlg,da9063"; + reg = <0x5A>; + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + + rtc { + compatible = "dlg,da9063-rtc"; + }; + + wdt { + compatible = "dlg,da9063-watchdog"; + }; + + regulators { + DA9063_LDO11: bmem { + regulator-name = "bmem"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + + onkey { + compatible = "dlg,da9063-onkey"; + }; + }; +}; + +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x48>; + gpios = <&gpio_ext 0 GPIO_ACTIVE_LOW>; /* CSI0 DE_PDn */ + maxim,gpio0 = <0>; + maxim,sensor_delay = <100>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; +}; + +&wdt0 { + status = "okay"; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + phy-int-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + rxdv-skew-ps = <420>; /* default */ + rxd0-skew-ps = <420>; /* default */ + rxd1-skew-ps = <420>; /* default */ + rxd2-skew-ps = <420>; /* default */ + rxd3-skew-ps = <420>; /* default */ + txc-skew-ps = <900>; /* default */ + txen-skew-ps = <420>; /* default */ + txd0-skew-ps = <420>; /* default */ + txd1-skew-ps = <420>; /* default */ + txd2-skew-ps = <420>; /* default */ + txd3-skew-ps = <420>; /* default */ + reg = <0>; + interrupt-parent = <&gpio1>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + max-speed = <1000>; + }; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins>; + pinctrl-names = "default"; + status = "okay"; + + channel0 { + status = "okay"; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1-eagle-function.dts b/arch/arm64/boot/dts/renesas/r8a7797-es1-eagle-function.dts new file mode 100644 index 0000000..74351b8 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1-eagle-function.dts @@ -0,0 +1,17 @@ +/* + * Device Tree Source for the Eagle Function board on r8a7797 ES1.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-eagle-function.dts" +#include "r8a7797-es1.dtsi" + +/ { + model = "Renesas Eagle Function board based on r8a7797 ES1.0"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1-eagle.dts b/arch/arm64/boot/dts/renesas/r8a7797-es1-eagle.dts new file mode 100644 index 0000000..f65f69d --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1-eagle.dts @@ -0,0 +1,17 @@ +/* + * Device Tree Source for the Eagle board on r8a7797 ES1.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-eagle.dts" +#include "r8a7797-es1.dtsi" + +/ { + model = "Renesas Eagle board based on r8a7797 ES1.0"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-kf.dts b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-kf.dts new file mode 100644 index 0000000..c811e6f --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-kf.dts @@ -0,0 +1,17 @@ +/* + * Device Tree Source for the V3MSK Kingfisher board on r8a7797 ES1.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk-kf.dts" +#include "r8a7797-es1.dtsi" + +/ { + model = "Renesas V3MSK Kingfisher board based on r8a7797 ES1.0"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm-v2.dts b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm-v2.dts new file mode 100644 index 0000000..c6fcffd --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm-v2.dts @@ -0,0 +1,17 @@ +/* + * Device Tree Source for the V3MSK Videobox Mini V2 board on r8a7797 ES1.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk-vbm-v2.dts" +#include "r8a7797-es1.dtsi" + +/ { + model = "Renesas V3MSK Videobox Mini V2 board based on r8a7797 ES1.0"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm.dts b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm.dts new file mode 100644 index 0000000..90b7439 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-vbm.dts @@ -0,0 +1,17 @@ +/* + * Device Tree Source for the V3MSK Videobox Mini board on r8a7797 ES1.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk-vbm.dts" +#include "r8a7797-es1.dtsi" + +/ { + model = "Renesas V3MSK Videobox Mini board based on r8a7797 ES1.0"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-view.dts b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-view.dts new file mode 100644 index 0000000..576d21c --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk-view.dts @@ -0,0 +1,17 @@ +/* + * Device Tree Source for the V3MSK View board on r8a7797 ES1.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk-view.dts" +#include "r8a7797-es1.dtsi" + +/ { + model = "Renesas V3MSK View board based on r8a7797 ES1.0"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk.dts new file mode 100644 index 0000000..3257d7e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1-v3msk.dts @@ -0,0 +1,17 @@ +/* + * Device Tree Source for the V3M Starter Kit board on r8a7797 ES1.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk.dts" +#include "r8a7797-es1.dtsi" + +/ { + model = "Renesas V3M Starter Kit board based on r8a7797 ES1.0"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7797-es1.dtsi new file mode 100644 index 0000000..dab9adc --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-es1.dtsi @@ -0,0 +1,116 @@ +/* + * Device Tree Source for the r8a7797 SoC ES1.0 SoC + * (append to r8a7797 SoC ES2.0 SoC) + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/ { + soc { + imp_distributer: impdes0 { + compatible = "renesas,impx4-distributer"; + reg = <0 0xffa00000 0 0x10000>; + interrupts = ; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A7797_PD_A3IR>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + imp0 { + compatible = "renesas,impx4-legacy"; + reg = <0 0xff900000 0 0x20000>; + interrupt-parent = <&imp_distributer>; + interrupts = <0>; + clocks = <&cpg CPG_MOD 827>; + power-domains = <&sysc R8A7797_PD_A2IR0>; + }; + + imp1 { + compatible = "renesas,impx4-legacy"; + reg = <0 0xff920000 0 0x20000>; + interrupt-parent = <&imp_distributer>; + interrupts = <1>; + clocks = <&cpg CPG_MOD 826>; + power-domains = <&sysc R8A7797_PD_A2IR1>; + }; + + imp2 { + compatible = "renesas,impx4-legacy"; + reg = <0 0xff940000 0 0x20000>; + interrupt-parent = <&imp_distributer>; + interrupts = <2>; + clocks = <&cpg CPG_MOD 825>; + power-domains = <&sysc R8A7797_PD_A2IR2>; + }; + + imp3 { + compatible = "renesas,impx4-legacy"; + reg = <0 0xff960000 0 0x20000>; + interrupt-parent = <&imp_distributer>; + interrupts = <3>; + clocks = <&cpg CPG_MOD 824>; + power-domains = <&sysc R8A7797_PD_A2IR3>; + }; + + impsc0 { + compatible = "renesas,impx4-shader"; + reg = <0 0xff980000 0 0x10000>; + interrupt-parent = <&imp_distributer>; + interrupts = <4>; + clocks = <&cpg CPG_MOD 829>; + power-domains = <&sysc R8A7797_PD_A2SC0>; + }; + + impsc1 { + compatible = "renesas,impx4-shader"; + reg = <0 0xff990000 0 0x10000>; + interrupt-parent = <&imp_distributer>; + interrupts = <5>; + clocks = <&cpg CPG_MOD 828>; + power-domains = <&sysc R8A7797_PD_A2SC1>; + }; + + impdm0 { + compatible = "renesas,impx5-dmac"; + reg = <0 0xffa10000 0 0x1000>; + interrupt-parent = <&imp_distributer>; + interrupts = <16>; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A7797_PD_A3IR>; + }; + + impdm1 { + compatible = "renesas,impx5-dmac"; + reg = <0 0xffa10000 0 0x1000>, + <0 0xffa10800 0 0x0800>; + interrupt-parent = <&imp_distributer>; + interrupts = <17>; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A7797_PD_A3IR>; + }; + + imppsc0 { + compatible = "renesas,impx5+-psc"; + reg = <0 0xffa20000 0 0x4000>; + interrupt-parent = <&imp_distributer>; + interrupts = <12>; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A7797_PD_A3IR>; + }; + + /delete-node/impcnn0; + + impc0 { + compatible = "renesas,impx4-memory"; + reg = <0 0xed000000 0 0xe0000>; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A7797_PD_A3IR>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts new file mode 100644 index 0000000..862236f --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts @@ -0,0 +1,520 @@ +/* + * Device Tree Source for the V3MSK Kingfisher board on r8a7797 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk.dts" + +/ { + model = "Renesas V3MSK Kingfisher board based on r8a7797"; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "okay"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&i2c0 { + /* i2c0 might conflict with pc9548 reset pin on Kingfisher (uncomment if h/w not patched) */ +// status = "disabled"; +}; + +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + status = "okay"; + + clock-frequency = <400000>; + + i2cswitch4: pca9548@71 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x71>; +// reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Slot B (CN11) */ + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + POC0-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <800>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* Slot B (CN11) */ + + /* PCA9535 is a redundant/deprecated card */ + gpio_exp_a_26: gpio@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A led"; + }; + }; + + gpio_exp_a_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg2"; + }; + video_a_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A LED"; + }; + }; + }; + }; +}; + +&pfc { + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; + + i2c3_pins: i2c3 { + groups = "i2c3"; + function = "i2c3"; + }; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm-v2.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm-v2.dts new file mode 100644 index 0000000..dbbd3d2 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm-v2.dts @@ -0,0 +1,82 @@ +/* + * Device Tree Source for the V3MSK Videobox Mini board V2 on r8a7797 + * + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk-vbm.dts" + +/ { + model = "Renesas V3MSK Videobox Mini board V2 based on r8a7797"; + + leds { + compatible = "gpio-leds"; + + led5 { + label = "board:status"; + gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&gpio0 { + /delete-node/can0stby; + + can0_stby { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "CAN0STBY"; + }; + + can1_stby { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "CAN1STBY"; + }; +}; + +&pfc { + msiof1_pins: msiof1 { + groups = "msiof1_clk", "msiof1_txd", "msiof1_rxd"; + function = "msiof1"; + }; + + msiof2_pins: msiof2 { + groups = "msiof2_clk", "msiof2_sync", "msiof2_txd", "msiof2_rxd"; + function = "msiof2"; + }; +}; + +&scif3 { + /* pin conflict with msiof2 */ + /* set R240 and remove R241 before enabling */ + status = "disabled"; +}; + +&msiof1 { + pinctrl-0 = <&msiof1_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio3 3 0>; + + status = "okay"; + spidev@0 { + compatible = "renesas,sh-msiof"; + reg = <0>; + spi-max-frequency = <66666666>; + }; +}; + +&msiof2 { + pinctrl-0 = <&msiof2_pins>; + pinctrl-names = "default"; + + status = "okay"; + slave; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts new file mode 100644 index 0000000..70c0f66 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts @@ -0,0 +1,507 @@ +/* + * Device Tree Source for the V3MSK Videobox Mini board on r8a7797 + * + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk.dts" + +/ { + model = "Renesas V3MSK Videobox Mini board based on r8a7797"; + + aliases { + serial1 = &scif3; + }; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "okay"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + status = "okay"; + + clock-frequency = <400000>; + + i2cswitch1: i2c-switch@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_6c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_6c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_6c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_6c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + POC0-gpios = <&gpio_exp_6c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_6c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_6c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_6c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + gpio_exp_6c: gpio@6c { + compatible = "maxim,max7325"; + reg = <0x6c>; + gpio-controller; + #gpio-cells = <2>; + + virq { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "VIRQ"; + }; + des_cfg { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "CNFG0"; + }; + pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PWR_SHDN"; + }; + des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Des_SHDN"; + }; + fpdl_shdn { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FPDL_SHDN"; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + /* fan node - lm96063 */ + fan_ctrl: lm96063@4c { + compatible = "lm96163"; + reg = <0x4c>; + }; + }; + }; +}; + +&gpio0 { + can0stby { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "CAN0STBY"; + }; + + can1_load { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can1_120R_load"; + }; +}; + +&gpio2 { + can0_load { + gpio-hog; + gpios = <16 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can0_120R_load"; + }; + + wake_pin_7 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + input; + line-name = "WAKE INPUT PIN 7"; + }; + + wake_pin_8 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + input; + line-name = "WAKE INPUT PIN 8"; + }; +}; + +&pfc { + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; + + i2c1_pins: i2c1 { + groups = "i2c1"; + function = "i2c1"; + }; + + scif3_pins: scif3 { + groups = "scif3_data"; + function = "scif3"; + }; +}; + +&scif3 { + pinctrl-0 = <&scif3_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-view.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-view.dts new file mode 100644 index 0000000..58f82bf --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-view.dts @@ -0,0 +1,297 @@ +/* + * Device Tree Source for the V3MSK View board on r8a7797 + * + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7797-v3msk.dts" + +/ { + model = "Renesas V3MSK View board based on r8a7797"; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + status = "okay"; + + clock-frequency = <400000>; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x6c>; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; +}; + +&gpio2 { + gpio_pwdn1 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "GPIO_PWDN1#"; + }; +}; + +&pfc { + i2c3_pins: i2c3 { + groups = "i2c3"; + function = "i2c3"; + }; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts new file mode 100644 index 0000000..c1e805d --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts @@ -0,0 +1,345 @@ +/* + * Device Tree Source for the V3M Starter Kit board on r8a7797 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7797.dtsi" +#include + +/ { + model = "Renesas V3M Starter Kit board based on r8a7797"; + compatible = "renesas,v3msk", "renesas,r8a7797"; + + aliases { + serial0 = &scif0; + ethernet0 = &avb; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* device specific region for Lossy Decompression */ + lossy_decompress: linux,lossy_decompress { + no-map; + reg = <0x00000000 0x6c000000 0x0 0x03000000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + reg = <0x00000000 0x6f000000 0x0 0x10000000>; + linux,cma-default; + }; + + /* device specific region for contiguous allocations */ + linux,multimedia { + compatible = "shared-dma-pool"; + reusable; + reg = <0x00000000 0x7f000000 0x0 0x01000000>; + }; + }; + + mmngr { + compatible = "renesas,mmngr"; + memory-region = <&lossy_decompress>; + }; + + mmngrbuf { + compatible = "renesas,mmngrbuf"; + }; + + vspm_if { + compatible = "renesas,vspm_if"; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; + + dclkin_p0: clock-out0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + msiof_ref_clk: msiof-ref-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <66666666>; + }; + + vcc_3v3: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-VCC3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_vddq_vin0: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "VCC-VDDQ-VIN0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&du { + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; +// remote-endpoint = <&lvds_in>; + }; + }; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_b"; + function = "scif_clk"; + }; + + i2c0_pins: i2c0 { + groups = "i2c0"; + function = "i2c0"; + }; + + avb_pins: avb { + groups = "avb0_mdc"; + function = "avb0"; + }; + + sdhi2_pins_3v3: sdhi2_3v3 { + groups = "mmc_data8", "mmc_ctrl"; + function = "mmc"; + power-source = <3300>; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + hdmi@39{ + compatible = "adi,adv7511w"; + #sound-dai-cells = <0>; + reg = <0x39>; + interrupt-parent = <&gpio1>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + + pmic@5A { + compatible = "dlg,da9063"; + reg = <0x5A>; + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + + rtc { + compatible = "dlg,da9063-rtc"; + }; + + wdt { + compatible = "dlg,da9063-watchdog"; + }; + + regulators { + DA9063_LDO11: bmem { + regulator-name = "bmem"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + + onkey { + compatible = "dlg,da9063-onkey"; + }; + }; + +}; + +&wdt0 { + status = "okay"; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + phy-int-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + rxdv-skew-ps = <420>; /* default */ + rxd0-skew-ps = <420>; /* default */ + rxd1-skew-ps = <420>; /* default */ + rxd2-skew-ps = <420>; /* default */ + rxd3-skew-ps = <420>; /* default */ + txc-skew-ps = <900>; /* default */ + txen-skew-ps = <420>; /* default */ + txd0-skew-ps = <420>; /* default */ + txd1-skew-ps = <420>; /* default */ + txd2-skew-ps = <420>; /* default */ + txd3-skew-ps = <420>; /* default */ + reg = <0>; + interrupt-parent = <&gpio1>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + max-speed = <1000>; + }; +}; + +&sdhi2 { + /* used for on-board eMMC */ + pinctrl-0 = <&sdhi2_pins_3v3>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_vddq_vin0>; + no-1-8-v; + cap-mmc-highspeed; + bus-width = <8>; + non-removable; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3mzf.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3mzf.dts new file mode 100644 index 0000000..7926d2e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7797-v3mzf.dts @@ -0,0 +1,424 @@ +/* + * Device Tree Source for the V3MZF board + * + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7797.dtsi" +#include + +/ { + model = "Renesas V3MZF board based on r8a7797"; + compatible = "renesas,v3mzf", "renesas,r8a7797"; + + aliases { + serial0 = &scif0; + ethernet0 = &avb; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* device specific region for Lossy Decompression */ + lossy_decompress: linux,lossy_decompress { + no-map; + reg = <0x00000000 0x6c000000 0x0 0x03000000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + reg = <0x00000000 0x6f000000 0x0 0x11000000>; + linux,cma-default; + }; + }; + + mmngr { + compatible = "renesas,mmngr"; + memory-region = <&lossy_decompress>; + }; + + mmngrbuf { + compatible = "renesas,mmngrbuf"; + }; + + vspm_if { + compatible = "renesas,vspm_if"; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + dclkin_p0: clock-out0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + msiof_ref_clk: msiof-ref-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <66666666>; + }; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + phy-int-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + rxdv-skew-ps = <420>; /* default */ + rxd0-skew-ps = <420>; /* default */ + rxd1-skew-ps = <420>; /* default */ + rxd2-skew-ps = <420>; /* default */ + rxd3-skew-ps = <420>; /* default */ + txc-skew-ps = <900>; /* default */ + txen-skew-ps = <420>; /* default */ + txd0-skew-ps = <420>; /* default */ + txd1-skew-ps = <420>; /* default */ + txd2-skew-ps = <420>; /* default */ + txd3-skew-ps = <420>; /* default */ + reg = <0>; + interrupt-parent = <&gpio1>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + max-speed = <1000>; + }; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "okay"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "raw8"; + receive,vc = <0>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&du { + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&gpio1 { + pdb_ser_enable { + gpio-hog; + gpios = <26 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PDB_SER_Enable"; + }; + + lvds_sw_sel { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "LVDS_SW_SEL"; + }; +}; + +&gpio2 { + can0_inh_v3m { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "CAN0_INH_V3M"; + }; + + can1_inh_v3m { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "CAN1_INH_V3M"; + }; +}; + +&gpio3 { + pdb_des_enable { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PDB_DES_Enable"; + }; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; +}; + +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_ti9x4_des0ep0: endpoint@0 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ti9x4@30 { + compatible = "ti,ti9x4"; + reg = <0x30>; + ti,links = <1>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,dvp_bus = <0>; + ti,ser_id = <0x30>; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <800>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; +}; + +&msiof2 { + pinctrl-0 = <&msiof2_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio2 4 0>; + + status = "okay"; + spidev@0 { + compatible = "renesas,sh-msiof"; + reg = <0>; + spi-max-frequency = <66666666>; + }; +}; + +&msiof3 { + pinctrl-0 = <&msiof3_pins>; + pinctrl-names = "default"; + + status = "okay"; + slave; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + avb_pins: avb { + groups = "avb0_mdc"; + function = "avb0"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; + + i2c0_pins: i2c0 { + groups = "i2c0"; + function = "i2c0"; + }; + + i2c3_pins: i2c3 { + groups = "i2c3"; + function = "i2c3"; + }; + + msiof2_pins: msiof2 { + groups = "msiof2_clk", "msiof2_txd", "msiof2_rxd"; + function = "msiof2"; + }; + + msiof3_pins: msiof3 { + groups = "msiof3_clk", "msiof3_txd", "msiof3_rxd", "msiof3_sync"; + function = "msiof3"; + }; + + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_b"; + function = "scif_clk"; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_ti9x4_des0ep0: endpoint@0 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&wdt0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a7798-condor.dts b/arch/arm64/boot/dts/renesas/r8a7798-condor.dts new file mode 100644 index 0000000..4dd7a28 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7798-condor.dts @@ -0,0 +1,963 @@ +/* + * Device Tree Source for the Condor board + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7798.dtsi" +#include + +/ { + model = "Renesas Condor board based on r8a7798"; + compatible = "renesas,condor", "renesas,r8a7798"; + + aliases { + serial0 = &scif0; + ethernet0 = &avb; + ethernet1 = &gether; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + stdout-path = "serial0:115200n8"; + }; + + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* device specific region for Lossy Decompression */ + lossy_decompress: linux,lossy_decompress { + no-map; + reg = <0x00000000 0x6c000000 0x0 0x03000000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + reg = <0x00000000 0x6f000000 0x0 0x10000000>; + linux,cma-default; + }; + + /* device specific region for contiguous allocations */ + linux,multimedia { + compatible = "shared-dma-pool"; + reusable; + reg = <0x00000000 0x7f000000 0x0 0x01000000>; + }; + }; + + mmngr { + compatible = "renesas,mmngr"; + memory-region = <&lossy_decompress>; + }; + + mmngrbuf { + compatible = "renesas,mmngrbuf"; + }; + + vspm_if { + compatible = "renesas,vspm_if"; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + clock-frequency = <138000000>; + hactive = <1920>; + vactive = <1080>; + hsync-len = <32>; + hfront-porch = <20>; + hback-porch = <160>; + vfront-porch = <3>; + vback-porch = <31>; + vsync-len = <5>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; + + dclkin_p0: clock-out0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + msiof_ref_clk: msiof-ref-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <66666666>; + }; + + vcc_3v3: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-VCC3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_vddq_vin0: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "VCC-VDDQ-VIN0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&du { + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_b"; + function = "scif_clk"; + }; + + i2c0_pins: i2c0 { + groups = "i2c0"; + function = "i2c0"; + }; + + i2c1_pins: i2c1 { + groups = "i2c1"; + function = "i2c1"; + }; + + avb_pins: avb { + groups = "avb_mdc"; + function = "avb"; + }; + + gether_pins: gether { + groups = "gether_mdc_a"; + function = "gether"; + }; + + sdhi2_pins_1v8: sdhi2_1v8 { + groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; + function = "mmc"; + power-source = <1800>; + }; + + sdhi2_pins_3v3: sdhi2_3v3 { + groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; + function = "mmc"; + power-source = <3300>; + }; + + tpu_pins: tpu { + /* GP1_19 pin; CP4 test point */ + groups = "tpu_to0"; + function = "tpu"; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + +&sdhi2 { + /* used for on-board eMMC */ + pinctrl-0 = <&sdhi2_pins_3v3>; + pinctrl-1 = <&sdhi2_pins_1v8>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_vddq_vin0>; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + hdmi@39{ + compatible = "adi,adv7511w"; + #sound-dai-cells = <0>; + reg = <0x39>; + interrupt-parent = <&gpio1>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + + gpio_exp_20: gpio@20 { + compatible = "onsemi,pca9654"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio_exp_21: gpio@21 { + compatible = "onsemi,pca9654"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_des0ep3: endpoint { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_des1ep3: endpoint { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x48>; + gpios = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>; /* MAX9286 PWDN */ + maxim,gpio0 = <0>; + maxim,sensor_delay = <100>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x4a>; + gpios = <&gpio_exp_21 0 GPIO_ACTIVE_LOW>; /* MAX9286 PWDN */ + maxim,gpio0 = <0>; + maxim,sensor_delay = <100>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x54>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x55>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x56>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x57>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi1ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec { + status = "okay"; +}; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; + +&cmt0 { + status = "okay"; +}; + +&cmt1 { + status = "okay"; +}; + +&cmt2 { + status = "okay"; +}; + +&cmt3 { + status = "okay"; +}; + +&tpu { + pinctrl-0 = <&tpu_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tmu0 { + status = "okay"; +}; + +&tmu1 { + status = "okay"; +}; + +&tmu2 { + status = "okay"; +}; + +&tmu3 { + status = "okay"; +}; + +&tmu4 { + status = "okay"; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; +// status = "okay"; + phy-int-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + rxdv-skew-ps = <420>; /* default */ + rxd0-skew-ps = <420>; /* default */ + rxd1-skew-ps = <420>; /* default */ + rxd2-skew-ps = <420>; /* default */ + rxd3-skew-ps = <420>; /* default */ + txc-skew-ps = <900>; /* default */ + txen-skew-ps = <420>; /* default */ + txd0-skew-ps = <420>; /* default */ + txd1-skew-ps = <420>; /* default */ + txd2-skew-ps = <420>; /* default */ + txd3-skew-ps = <420>; /* default */ + reg = <0>; + interrupt-parent = <&gpio1>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + max-speed = <1000>; + }; +}; + +&gether { + pinctrl-0 = <&gether_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&gether_phy>; + status = "okay"; + phy-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>; + phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; + + gether_phy: ethernet-phy@0 { + reg = <0>; + interrupt-parent = <&gpio4>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>; + max-speed = <1000>; + }; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in4>; + }; + }; + port@1 { + csi1ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in5>; + }; + }; + port@1 { + csi1ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in6>; + }; + }; + port@1 { + csi1ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + csi1ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + }; + }; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins>; + pinctrl-names = "default"; + status = "okay"; + + channel0 { + status = "okay"; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi new file mode 100644 index 0000000..a87c38b --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi @@ -0,0 +1,462 @@ +/* + * Device Tree Source for the H3ULCB Kingfisher board: + * this adding conflicting resource on VIN4/VIN5/VIN6/VIN7 for CN11 + * use CN11 instead default CN29/CN48 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +&i2cswitch4 { + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Slot B (CN11) */ + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + ov106xx_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + ov106xx_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + ov106xx_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + ov106xx_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@1 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + POC0-gpios = <&gpio_exp_b_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_b_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_b_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_b_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des1ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in4>; + }; + ti9x4_des1ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in5>; + }; + ti9x4_des1ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in6>; + }; + ti9x4_des1ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + ti9x4_csi2ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,sensor_delay = <350>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_b_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_b_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_b_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_b_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* Slot B (CN11) */ + + /* PCA9535 is a redundand/deprecated card */ + gpio_exp_b_27: gpio@27 { + compatible = "nxp,pca9535"; + reg = <0x27>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR0"; + }; + video_b_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR1"; + }; + video_b_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR2"; + }; + video_b_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR3"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B led"; + }; + }; + + gpio_exp_b_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg2"; + }; + video_b_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B LED"; + }; + }; + }; +}; + +&vin4 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + vin4_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; +}; + +&vin5 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + vin5_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + vin6_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + vin7_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi new file mode 100644 index 0000000..4af5ca0 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi @@ -0,0 +1,30 @@ +/* + * Device Tree Source for the H3/M3ULCB Kingfisher board: + * this overrides GPS in favour MOST on GP5_24/GP5_25 R-CAR pins + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +&pfc { + mlp_pins: mlp { + groups = "mlb_3pin"; + function = "mlb_3pin"; + }; +}; + +&scif1 { + status = "disabled"; +}; + +&mlp { + pinctrl-0 = <&mlp_pins>; + pinctrl-names = "default"; + status = "okay"; + + clock-speed = "1024fs"; +}; diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi new file mode 100644 index 0000000..b854216 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi @@ -0,0 +1,46 @@ +/* + * Device Tree Source for the H3/M3ULCB Kingfisher board: + * this overrides WIFI in favour SD on SDHI3 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +&sdio_switch { + regulator-name = "sd_on"; + enable-active-high; +}; + +&vccq_sdhi3 { + compatible = "regulator-gpio"; + + regulator-min-microvolt = <1800000>; + + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; +}; + +&sdhi3 { + /delete-property/non-removable; + /delete-property/cap-power-off-card; + /delete-property/keep-power-in-suspend; + /delete-property/enable-sdio-wakeup; + /delete-property/max-frequency; + /delete-property/no-1-8-v; + + vmmc-supply = <&vcc_sdhi3>; + cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; +// sd-uhs-sdr50; +// sd-uhs-sdr104; +}; + +&wlcore { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi new file mode 100644 index 0000000..447cfc3 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi @@ -0,0 +1,1458 @@ +/* + * Device Tree Source for the ULCB Kingfisher board + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/ { + aliases { + serial1 = &hscif0; + serial2 = &hscif1; + serial3 = &scif1; + }; + + snd_clk: snd_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "scki"; + }; + + wlan_en: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi3: regulator@41 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio4 17 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi3: regulator@5 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + codec_en_reg: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "codec-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 15 0>; + + /* delay - CHECK */ + startup-delay-us = <70000>; + enable-active-high; + }; + + amp_en_reg: regulator@7 { + compatible = "regulator-fixed"; + regulator-name = "amp-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ext_74 0 0>; + + startup-delay-us = <0>; + enable-active-high; + }; + + sdio_switch: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "wifi_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 5 0>; + enable-active-low; + regulator-always-on; + }; + + radio_switch: regulator@11 { + compatible = "regulator-fixed"; + regulator-name = "radio_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + mpcie_3v3: regulator@12 { + compatible = "regulator-fixed"; + regulator-name = "mPCIe 3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + mpcie_1v8: regulator@13 { + compatible = "regulator-fixed"; + regulator-name = "mPCIe 1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>; + startup-delay-us = <200000>; + enable-active-high; + }; + + kim { + compatible = "kim"; + shutdown-gpios = <&gpio_ext_74 3 GPIO_ACTIVE_HIGH>; + /* serial1 */ + dev_name = "/dev/ttySC1"; + flow_cntrl = <1>; + /* int div 8 hscif@26.6666656MHz */ + baud_rate = <3333332>; + }; + + btwilink { + compatible = "btwilink"; + }; + + sound_ext: sound@0 { + pinctrl-0 = <&sound_0_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "pcm3168a"; + + simple-audio-card,bitclock-master = <&sound_ext_master>; + simple-audio-card,frame-master = <&sound_ext_master>; + sound_ext_master: simple-audio-card,cpu@0 { + sound-dai = <&rcar_sound 0>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + }; + + simple-audio-card,codec@0 { + sound-dai = <&pcm3168a>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + system-clock-frequency = <24576000>; + }; + }; + + /delete-node/sound; + + rsnd_ak4613: sound@1 { + pinctrl-0 = <&sound_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "ak4613"; + + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu@1 { + sound-dai = <&rcar_sound 1>; + }; + + sndcodec: simple-audio-card,codec@1 { + sound-dai = <&ak4613>; + }; + }; + + sound_radio: sound@2 { + pinctrl-0 = <&sound_2_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "i2s"; + simple-audio-card,name = "radio"; + + simple-audio-card,bitclock-master = <&sound_radio_master>; + simple-audio-card,frame-master = <&sound_radio_master>; + simple-audio-card,cpu@2 { + sound-dai = <&rcar_sound 2>; + }; + + sound_radio_master: simple-audio-card,codec@2 { + sound-dai = <&radio>; + system-clock-frequency = <12288000>; + }; + }; + + sound_wl18xx: sound@3 { + pinctrl-0 = <&sound_3_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "i2s"; + simple-audio-card,name = "wl18xx"; + + simple-audio-card,bitclock-master = <&sound_wl18xx_master>; + simple-audio-card,frame-master = <&sound_wl18xx_master>; + sound_wl18xx_master: simple-audio-card,cpu@3 { + sound-dai = <&rcar_sound 3>; + }; + + simple-audio-card,codec@3 { + sound-dai = <&wl18xx_pcm>; + }; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7513_out>; + }; + }; + }; + + radio: si468x@0 { + compatible = "si,si468x-pcm"; + status = "okay"; + + #sound-dai-cells = <0>; + }; + + wl18xx_pcm: wl18xx_pcm@0 { + compatible = "ti,wl18xx-pcm"; + status = "okay"; + + #sound-dai-cells = <0>; + }; + + camera_clk: camera_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "mclk"; + }; +}; + +&pfc { + scif1_pins: scif1 { + groups = "scif1_data_b"; + function = "scif1"; + }; + + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + hscif1_pins: hscif1 { + groups = "hscif1_data_a", "hscif1_ctrl_a"; + function = "hscif1"; + }; + + du_pins: du { + groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp"; + function = "du"; + }; + + sdhi3_pins_3v3: sd3_3v3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + sdhi3_pins_1v8: sd3_1v8 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; + }; + + sound_0_pins: sound0 { + groups = "ssi349_ctrl", "ssi3_data", "ssi4_data"; + function = "ssi"; + }; + + /* sound_pins defined in H3 or M3 ulsb file */ + + sound_2_pins: sound2 { + groups = "ssi6_ctrl", "ssi6_data"; + function = "ssi"; + }; + + sound_3_pins: sound3 { + groups = "ssi78_ctrl", "ssi7_data", "ssi8_data"; + function = "ssi"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; + + vin5_pins: vin5 { + groups = "vin5_data8", "vin5_sync", "vin5_clk"; + function = "vin5"; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; +}; + +&gpio2 { + bl_pwm { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BL PWM 100%"; + }; +}; + +&gpio4 { + most_rst { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "MOST RST"; + }; +}; + +&gpio6 { + audio_sw { + gpio-hog; + gpios = <21 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Onboard MCh Audio"; + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&hscif1 { + pinctrl-0 = <&hscif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + + gpio_ext_74: pca9539@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; +/* + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; +*/ + hub_pwen { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB pwen"; + }; + hub_rst { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "HUB rst"; + }; + otg_offvbus { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "OTG off VBUSn"; + }; + otg_extlpn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "OTG EXTLPn"; + }; + }; + + gpio_ext_75: pca9539@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio6>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + + gps_rst { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "GPS rst"; + }; + fpdl_shdn { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FPDLink shdn"; + }; + }; + + i2cswitch2: pca9548@71 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x71>; + reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* BCM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* USB3.0 HUB node(s) */ + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Power amp node(s) */ + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* Radio node(s) */ + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + hdmi@3d { + compatible = "adi,adv7511w"; + reg = <0x3d>; +// interrupt-parent = <&gpio2>; +// interrupts = <0 IRQ_TYPE_EDGE_BOTH>; + pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + adi,clock-delay = <1200>; + adi,clock-max-rate = <100000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7513_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7513_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* PCIe node(s) */ + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* LVDS display node(s) */ + + polytouch: edt-ft5x06@38 { + compatible = "edt,edt-ft5x06"; + reg = <0x38>; + interrupt-parent = <&gpio5>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Audio, GPS and Gyro node(s) */ + + pcm3168a: audio-codec@44 { + #sound-dai-cells = <0>; + compatible = "ti,pcm3168a"; + reg = <0x44>; + clocks = <&snd_clk>; + clock-names = "scki"; + tdm; + VDD1-supply = <&codec_en_reg>; + VDD2-supply = <&codec_en_reg>; + VCCAD1-supply = <&codec_en_reg>; + VCCAD2-supply = <&codec_en_reg>; + VCCDA1-supply = <&_en_reg>; + VCCDA2-supply = <&_en_reg>; + }; + + lsm9ds0_acc_mag@1d { + compatible = "st,lsm9ds0_accel_magn"; + reg = <0x1d>; + }; + + lsm9ds0_gyr@6b { + compatible = "st,lsm9ds0_gyro"; + reg = <0x6b>; + }; + + /* GPS@ 0x42 */ + }; + }; +}; + +&i2c4 { + gpio_ext_76: pca9539@76 { + compatible = "nxp,pca9539"; + reg = <0x76>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio7>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + + port_b_a0 { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B A0"; + }; + port_b_a1 { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B A1"; + }; + port_a_a0 { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A A0"; + }; + port_a_a1 { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A A1"; + }; + cmos_pwdn { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS PWDN"; + }; + cmos_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CMOS RST"; + }; + /* pin 12 - CAM_CLK */ + rpi_cam_io_1 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO1"; + }; + /* pin 11 - CAM_GPIO - assume pwdn */ + rpi_cam_io_0 { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RaspB_IO0"; + }; + sam_rst { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "SAM RST"; + }; + sam_pwr { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "SAM PWR"; + }; + /* 0 - FPDLink output, 1 - LVDS output */ + lvds_vs_fpdl { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "LVDS switch"; + }; + }; + + gpio_ext_77: pca9539@77 { + compatible = "nxp,pca9539"; + reg = <0x77>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio5>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + + mpcie_wake { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "mPCIe WAKE#"; + }; + mpcie_wdisable { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "mPCIe W_DISABLE"; + }; + mpcie_clreq { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe CLKREQ#"; + }; + mpcie_ovc { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe OVC"; + }; + }; + + i2cswitch4: pca9548@71 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x71>; + reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* SAM node(s) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* Slot A (CN10) */ + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + POC0-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* MOST node(s) */ + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + rpi_camera: ov5647@36 { + compatible = "ovti,ov5647"; + reg = <0x36>; + + port@0 { + rpi_camera_in: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&vin4ep0>; + }; + }; + }; + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + + cmos_camera: ov5642@3c { + compatible = "ovti,ov5642"; + reg = <0x3c>; + clocks = <&camera_clk>; + clock-names = "mclk"; + + port@0 { + cmos_camera_in: endpoint { + remote-endpoint = <&vin5ep0>; + }; + }; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Slot A (CN10) */ + + /* PCA9535 is a redundant/deprecated card */ + gpio_exp_a_26: gpio@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A led"; + }; + }; + + gpio_exp_a_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg2"; + }; + video_a_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A LED"; + }; + }; + }; + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi20"; + virtual,channel = <0>; + remote-endpoint = <&rpi_camera_in>; + data-lanes = <1 2>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_20_ep>; + }; + }; + }; +}; + +&vin5 { + pinctrl-0 = <&vin5_pins>; + pinctrl-names = "default"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + bus-width = <8>; + /* #HSYNC, #VSYNC */ + vsync-active = <1>; + hsync-active = <0>; + remote-endpoint = <&cmos_camera_in>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_20 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "raw8"; + receive,vc = <0>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_20_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + csi-rate = <280>; + }; + }; +}; + + +&rcar_sound { + pinctrl-0 = <&sound_clk_pins>; + pinctrl-names = "default"; + + /* Multi DAI */ + #sound-dai-cells = <1>; + + rcar_sound,dai { + dai0 { + playback = <&ssi3>; + capture = <&ssi4>; + }; + + dai1 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + + dai2 { + capture = <&ssi6>; + }; + + dai3 { + playback = <&ssi7>; + capture = <&ssi8>; + }; + }; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins_3v3>; + pinctrl-1 = <&sdhi3_pins_1v8>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&wlan_en>; + vqmmc-supply = <&vccq_sdhi3>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + no-1-8-v; + non-removable; + cap-power-off-card; + max-frequency = <26000000>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; + +&msiof1 { + status = "disabled"; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "disabled"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&ssi4 { + shared-pin; +}; + +&ssi8 { + shared-pin; +}; + +&pciec1 { + pcie3v3-supply = <&mpcie_3v3>; + pcie1v8-supply = <&mpcie_1v8>; +}; + diff --git a/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi new file mode 100644 index 0000000..b29fc18 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi @@ -0,0 +1,459 @@ +/* + * Device Tree Source for the H3ULCB Videobox board: + * this adding conflicting resource on VIN4/VIN5/VIN6/VIN7 for CN12 + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +&i2cswitch2 { + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* Slot C (CN12) */ + + ov106xx@8 { + compatible = "ovti,ov106xx"; + reg = <0x68>; + + port@0 { + ov106xx_in8: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des2ep0: endpoint@0 { + remote-endpoint = <&max9286_des2ep0>; + }; + ov106xx_ti9x4_des2ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep0>; + }; + }; + }; + + ov106xx@9 { + compatible = "ovti,ov106xx"; + reg = <0x69>; + + port@0 { + ov106xx_in9: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des2ep1: endpoint@0 { + remote-endpoint = <&max9286_des2ep1>; + }; + ov106xx_ti9x4_des2ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep1>; + }; + }; + }; + + ov106xx@10 { + compatible = "ovti,ov106xx"; + reg = <0x6a>; + + port@0 { + ov106xx_in10: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des2ep2: endpoint@0 { + remote-endpoint = <&max9286_des2ep2>; + }; + ov106xx_ti9x4_des2ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep2>; + }; + }; + }; + + ov106xx@11 { + compatible = "ovti,ov106xx"; + reg = <0x6b>; + + port@0 { + ov106xx_in11: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_max9286_des2ep3: endpoint@0 { + remote-endpoint = <&max9286_des2ep3>; + }; + ov106xx_ti9x4_des2ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@2 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <2>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + POC0-gpios = <&gpio_exp_c_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_c_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_c_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_c_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des2ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in8>; + }; + ti9x4_des2ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in9>; + }; + ti9x4_des2ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in10>; + }; + ti9x4_des2ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in11>; + }; + }; + port@1 { + ti9x4_csi1ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_20_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@2 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,sensor_delay = <350>; + maxim,links = <4>; + maxim,lanes = <2>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_c_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_c_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_c_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_c_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des2ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in8>; + }; + max9286_des2ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in9>; + }; + max9286_des2ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in10>; + }; + max9286_des2ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in11>; + }; + }; + port@1 { + max9286_csi1ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_20_ep>; + }; + }; + }; + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* Slot C (CN12) */ + + /* PCA9535 is a redundand/deprecated card */ + gpio_exp_c_27: gpio@27 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_c_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-C cfg1"; + }; + video_c_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-C cfg0"; + }; + video_c_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C PWR_SHDN"; + }; + video_c_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C PWR0"; + }; + video_c_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C PWR1"; + }; + video_c_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C PWR2"; + }; + video_c_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C PWR3"; + }; + video_c_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C DES_SHDN"; + }; + video_c_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-C led"; + }; + }; + + gpio_exp_c_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_c_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-C cfg2"; + }; + video_c_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-C cfg1"; + }; + video_c_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-C cfg0"; + }; + video_c_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C PWR_SHDN"; + }; + video_c_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-C DES_SHDN"; + }; + video_c_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-C LED"; + }; + }; + }; +}; + +&vin4 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi20"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in8>; + data-lanes = <1 2>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_20_ep>; + }; + }; + port@2 { + vin4_max9286_des2ep0: endpoint@0 { + remote-endpoint = <&max9286_des2ep0>; + }; + vin4_ti9x4_des2ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep0>; + }; + }; + }; +}; + +&vin5 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi20"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in9>; + data-lanes = <1 2>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_20_ep>; + }; + }; + port@2 { + vin5_max9286_des2ep1: endpoint@0 { + remote-endpoint = <&max9286_des2ep1>; + }; + vin5_ti9x4_des2ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep1>; + }; + }; + }; +}; + +&vin6 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi20"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in10>; + data-lanes = <1 2>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_20_ep>; + }; + }; + port@2 { + vin6_max9286_des2ep2: endpoint@0 { + remote-endpoint = <&max9286_des2ep2>; + }; + vin6_ti9x4_des2ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep2>; + }; + }; + }; +}; + +&vin7 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi20"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in11>; + data-lanes = <1 2>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_20_ep>; + }; + }; + port@2 { + vin7_max9286_des2ep3: endpoint@0 { + remote-endpoint = <&max9286_des2ep3>; + }; + vin7_ti9x4_des2ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des2ep3>; + }; + }; + }; +}; + +&csi2_20 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_20_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + csi-rate = <300>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/ulcb-vb.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vb.dtsi new file mode 100644 index 0000000..0185e46 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-vb.dtsi @@ -0,0 +1,1610 @@ +/* + * Device Tree Source for the ULCB Videobox board + * + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/ { + leds { + compatible = "gpio-leds"; + + led5 { + gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + led6 { + gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + }; + /* D13 - status 0 */ + led_ext00 { + gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>; + /* linux,default-trigger = "heartbeat"; */ + }; + /* D14 - status 1 */ + led_ext01 { + gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>; + /* linux,default-trigger = "mmc1"; */ + }; + /* D16 - HDMI1 */ + led_ext02 { + gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>; + }; + /* D18 - HDMI0 */ + led_ext03 { + gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>; + }; + /* D20 - USB3.0 - 0.1 */ + led_ext04 { + gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>; + }; + /* D21 - USB3.0 - 0.2 */ + led_ext05 { + gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>; + }; + /* D24 - USB3.0 - 1.1 */ + led6_ext06 { + gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>; + }; + /* D25 - USB3.0 - 1.2 */ + led_ext07 { + gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>; + }; + }; + + snd_clk: snd_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "scki"; + }; + + vccq_sdhi3: regulator@5 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 VccQ"; + /* external voltage translator to 1.8V */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + fpdlink_switch: regulator@8 { + compatible = "regulator-fixed"; + regulator-name = "fpdlink_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 20 0>; + enable-active-high; + regulator-always-on; + }; + + hub_reset: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "hub_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 5 0>; + enable-active-high; + regulator-always-on; + }; + + hub_power: regulator@10 { + compatible = "regulator-fixed"; + regulator-name = "hub_power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio6 28 0>; + enable-active-high; + regulator-always-on; + }; + + /delete-node/sound; + + rsnd_ak4613: sound@0 { + pinctrl-0 = <&sound_0_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "ak4613"; + + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu@1 { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec@1 { + sound-dai = <&ak4613>; + }; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + excan_ref_clk: excan-ref-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16000000>; + }; + + radio: si468x@0 { + compatible = "si,si468x-pcm"; + status = "okay"; + + #sound-dai-cells = <0>; + }; + + spi_gpio_sw { + compatible = "spi-gpio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + + spidev: spidev@0 { + compatible = "spidev", "spi-gpio"; + reg = <0>; + spi-max-frequency = <25000000>; + spi-cpha; + spi-cpol; + }; + }; + + spi_gpio_can { + compatible = "spi-gpio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH + &gpio1 4 GPIO_ACTIVE_HIGH>; + num-chipselects = <2>; + + spican0: spidev@0 { + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&excan_ref_clk>; + interrupt-parent = <&gpio0>; + interrupts = <15 GPIO_ACTIVE_LOW>; + spi-max-frequency = <10000000>; + }; + spican1: spidev@1 { + compatible = "microchip,mcp2515"; + reg = <1>; + clocks = <&excan_ref_clk>; + interrupt-parent = <&gpio1>; + interrupts = <5 GPIO_ACTIVE_LOW>; + spi-max-frequency = <10000000>; + }; + }; +}; + +&pfc { + hscif4_pins: hscif4 { + groups = "hscif4_data_a", "hscif4_ctrl"; + function = "hscif4"; + }; + + sdhi3_pins_3v3: sd3_3v3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + /delete-node/sound; + + sound_0_pins: sound1 { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; +}; + +&gpio0 { + video_a_irq { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A irq"; + }; + + video_b_irq { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B irq"; + }; + + video_c_irq { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-C irq"; + }; +}; + +&gpio1 { + gpioext_4_22_irq { + gpio-hog; + gpios = <25 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x22@i2c4 irq"; + }; + pcie_disable { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "mPCIe W_DISABLE"; + }; + m2_sleep { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M.2 SLEEP#"; + }; + m2_pres { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 Present"; + }; + m2_pcie_det { + gpio-hog; + gpios = <18 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 PCIe detected"; + }; + m2_usb_det { + gpio-hog; + gpios = <19 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 USB30 detected"; + }; + m2_usb_det { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 SSD detected"; + }; + eth_phy_reset { + gpio-hog; + gpios = <16 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR phy reset"; + }; + eth_sw_reset { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR switch reset"; + }; +}; + +&gpio2 { + m2_wake { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 WAKE#"; + }; + m2_pcie_en { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M.2 PCIe enable"; + }; +}; + +&gpio3 { + m2_power_off { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M.2 FULL_CARD_POWER_OFF#"; + }; +}; + +&gpio6 { + pcie_wake { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe WAKE#"; + }; + pcie_clkreq { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + input; + line-name = "mPCIe CLKREQ#"; + }; + m2_rst { + gpio-hog; + gpios = <21 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M.2 RESET#"; + }; +}; + +&hscif4 { + pinctrl-0 = <&hscif4_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + + i2cswitch2: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* USB3.0 HUB node(s) */ + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* PCIe node(s) */ + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Slot A (CN10) */ + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "stp"; + + POC0-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Slot B (CN11) */ + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + ov106xx_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + ov106xx_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + ov106xx_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + ov106xx_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@1 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "stp"; + + POC0-gpios = <&gpio_exp_b_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_b_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_b_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_b_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des1ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in4>; + }; + ti9x4_des1ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in5>; + }; + ti9x4_des1ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in6>; + }; + ti9x4_des1ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + ti9x4_csi2ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_b_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_b_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_b_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_b_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* Slot C (CN12) */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* Slot A (CN10) */ + + /* PCA9535 is a redundant/deprecated card */ + gpio_exp_a_26: gpio@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A led"; + }; + }; + + gpio_exp_a_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg2"; + }; + video_a_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg1"; + }; + video_a_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A LED"; + }; + }; + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* Slot B (CN11) */ + + /* PCA9535 is a redundant/deprecated card */ + gpio_exp_b_26: gpio@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR0"; + }; + video_b_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR1"; + }; + video_b_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR2"; + }; + video_b_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR3"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B led"; + }; + }; + + gpio_exp_b_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg2"; + }; + video_b_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B LED"; + }; + }; + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* Slot C (CN12) */ + }; + }; +}; + +&i2c4 { + i2cswitch4: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* FAN node - EMC2103 */ + fan_ctrl:ecm2103@2e { + compatible = "emc2103"; + reg = <0x2e>; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* Power nodes - 2 x TPS544x20 */ + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* CAN and power board nodes */ + + gpio_ext_pwr: pca9535@22 { + compatible = "nxp,pca9535"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + + /* enable input DCDC after wake-up signal released */ + pwr_hold { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "pwr_hold"; + }; + + /* CAN0 */ + can0_stby { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can0_stby"; + }; + can0_load { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can0_120R_load"; + }; + /* CAN1 */ + can1_stby { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can1_stby"; + }; + can1_load { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can1_120R_load"; + }; + /* CAN2 */ + can2_stby { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can2_stby"; + }; + can2_load { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can2_120R_load"; + }; + can2_rst { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can2_rst"; + }; + /* CAN3 */ + can3_stby { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can3_stby"; + }; + can3_load { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can3_120R_load"; + }; + can3_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can3_rst"; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FPDLink output node - DS90UH947 */ + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* BCM switch node */ + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* LED board node(s) */ + + gpio_ext_led: pca9535@22 { + compatible = "nxp,pca9535"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + + /* gpios 0..7 are used for indication LEDs, low-active */ + }; + }; + + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* M2 connector i2c node(s) */ + }; + + /* port 7 is not used */ + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + vin4_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + vin5_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + vin6_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + vin7_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_clk_pins>; + + /* Multi DAI */ + #sound-dai-cells = <1>; +}; + +&sata { + status = "okay"; +}; + +&ssi1 { + /delete-property/shared-pin; +}; + +&avb { + /delete-property/phy-handle; + /delete-property/phy-gpios; + phy-mode = "rgmii"; + + /delete-node/ethernet-phy@0; + + fixed-link { + speed = <100>; + full-duplex; + }; +}; + +&msiof1 { + status = "disabled"; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "disabled"; + + renesas,can-clock-select = <0x0>; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +/* uncomment to enable CN12 on VIN4-7 */ +//#include "ulcb-vb-cn12.dtsi" diff --git a/arch/arm64/boot/dts/renesas/ulcb-vb2.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vb2.dtsi new file mode 100644 index 0000000..280c3b7 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-vb2.dtsi @@ -0,0 +1,1660 @@ +/* + * Device Tree Source for the ULCB Videobox V2 board + * + * Copyright (C) 2018 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/ { + leds { + compatible = "gpio-leds"; + + led5 { + gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + led6 { + gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + }; + /* D13 - status 0 */ + led_ext00 { + gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>; + /* linux,default-trigger = "heartbeat"; */ + }; + /* D14 - status 1 */ + led_ext01 { + gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>; + /* linux,default-trigger = "mmc1"; */ + }; + /* D16 - HDMI0 */ + led_ext02 { + gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>; + }; + /* D18 - HDMI1 */ + led_ext03 { + gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>; + }; + }; + + snd_clk: snd_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "scki"; + }; + + vcc_sdhi3: regulator-vcc-sdhi3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio4 17 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi3: regulator-vccq-sdhi3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + fpdlink_switch: regulator@8 { + compatible = "regulator-fixed"; + regulator-name = "fpdlink_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 20 0>; + enable-active-high; + regulator-always-on; + }; + + hub_reset: regulator@9 { + compatible = "regulator-fixed"; + regulator-name = "hub_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 5 0>; + enable-active-high; + regulator-always-on; + }; + + hub_power: regulator@10 { + compatible = "regulator-fixed"; + regulator-name = "hub_power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio6 28 0>; + enable-active-high; + regulator-always-on; + }; + + /delete-node/sound; + + rsnd_ak4613: sound@0 { + pinctrl-0 = <&sound_0_pins>; + pinctrl-names = "default"; + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,name = "ak4613"; + + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu@1 { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec@1 { + sound-dai = <&ak4613>; + }; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; + + excan_ref_clk: excan-ref-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16000000>; + }; + + spi_gpio_sw { + compatible = "spi-gpio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + + spidev: spidev@0 { + compatible = "spidev", "spi-gpio"; + reg = <0>; + spi-max-frequency = <25000000>; + spi-cpha; + spi-cpol; + }; + }; + + spi_gpio_can { + compatible = "spi-gpio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH + &gpio1 4 GPIO_ACTIVE_HIGH>; + num-chipselects = <2>; + + spican0: spidev@0 { + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&excan_ref_clk>; + interrupt-parent = <&gpio0>; + interrupts = <15 GPIO_ACTIVE_LOW>; + spi-max-frequency = <10000000>; + }; + spican1: spidev@1 { + compatible = "microchip,mcp2515"; + reg = <1>; + clocks = <&excan_ref_clk>; + interrupt-parent = <&gpio1>; + interrupts = <5 GPIO_ACTIVE_LOW>; + spi-max-frequency = <10000000>; + }; + }; +}; + +&pfc { + hscif4_pins: hscif4 { + groups = "hscif4_data_a", "hscif4_ctrl"; + function = "hscif4"; + }; + + /delete-node/sound; + + sound_0_pins: sound1 { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb2_pins: usb2 { + groups = "usb2"; + function = "usb2"; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; + + sdhi3_pins: sd3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + sdhi3_pins_uhs: sd3_uhs { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; + }; +}; + +&gpio0 { + video_a_irq { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A irq"; + }; + + video_b_irq { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B irq"; + }; + + video_c_irq { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-C irq"; + }; + can2_irq { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "CAN2 irq"; + }; +}; + +&gpio1 { + can3_irq { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "CAN3 irq"; + }; + gpioext_4_22_irq { + gpio-hog; + gpios = <25 GPIO_ACTIVE_HIGH>; + input; + line-name = "0x22@i2c4 irq"; + }; + m2_0_sleep { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M2 0 SLEEP#"; + }; + m2_1_sleep { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M2 1 SLEEP#"; + }; + m2_0_pcie_det { + gpio-hog; + gpios = <18 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 0 PCIe/SATA"; + }; + m2_1_pcie_det { + gpio-hog; + gpios = <19 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 1 PCIe/SATA"; + }; + m2_1_rst { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M.2 1 RST#"; + }; + switch_ext_phy_reset { + gpio-hog; + gpios = <16 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR ext phy reset"; + }; + switch_sw_reset { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR switch reset"; + }; + switch_1v2_en { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR 1.2V en"; + }; +}; + +&gpio2 { + m2_0_wake { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 0 WAKE#"; + }; + m2_0_clkreq { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 0 CLKREQ#"; + }; + switch_3v3_en { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR 3.3V en"; + }; +}; + +&gpio3 { + switch_int_phy_reset { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR int phy reset"; + }; +}; + +&gpio5 { + switch_2v5_en { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR 2.5V en"; + }; + switch_25mhz_en { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "BR 25MHz clk en"; + }; +}; + +&gpio6 { + m2_1_wake { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 1 WAKE#"; + }; + m2_1_clkreq { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + input; + line-name = "M.2 1 CLKREQ#"; + }; + + m2_0_rst { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "M.2 0 RST#"; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + + i2cswitch2: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* USB3.0 HUB node(s) */ + /* addr of TUSB8041 is 100.0100 = 0x44 */ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* Slot A (CN10) */ + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin0ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin1ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin2ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin3ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "stp"; + + POC0-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_a_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_a_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_a_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_a_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_40_ep>; + }; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* Slot B (CN11) */ + + ov106xx@4 { + compatible = "ovti,ov106xx"; + reg = <0x64>; + + port@0 { + ov106xx_in4: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + ov106xx_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; + + ov106xx@5 { + compatible = "ovti,ov106xx"; + reg = <0x65>; + + port@0 { + ov106xx_in5: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + ov106xx_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; + + ov106xx@6 { + compatible = "ovti,ov106xx"; + reg = <0x66>; + + port@0 { + ov106xx_in6: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + ov106xx_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; + + ov106xx@7 { + compatible = "ovti,ov106xx"; + reg = <0x67>; + + port@0 { + ov106xx_in7: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + ov106xx_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; + + /* DS90UB9x4 @ 0x3a */ + ti9x4@1 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "stp"; + + POC0-gpios = <&gpio_exp_b_5c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_b_5c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_b_5c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_b_5c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des1ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in4>; + }; + ti9x4_des1ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in5>; + }; + ti9x4_des1ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in6>; + }; + ti9x4_des1ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + ti9x4_csi2ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + + /* MAX9286 @ 0x2c */ + max9286@1 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_b_5c 9 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_b_5c 8 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_b_5c 11 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_b_5c 10 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des1ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in4>; + }; + max9286_des1ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in5>; + }; + max9286_des1ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in6>; + }; + max9286_des1ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in7>; + }; + }; + port@1 { + max9286_csi2ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Slot C (CN12) */ + }; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Slot A (CN10) */ + + /* PCA9535 is a redundant/deprecated card */ + gpio_exp_a_26: gpio@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_a_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR0"; + }; + video_a_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR1"; + }; + video_a_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR2"; + }; + video_a_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR3"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A led"; + }; + }; + + gpio_exp_a_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_a_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-A cfg0"; + }; + video_a_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A PWR_SHDN"; + }; + video_a_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-A DES_SHDN"; + }; + video_a_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-A LED"; + }; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* Slot B (CN11) */ + + /* PCA9535 is a redundant/deprecated card */ + gpio_exp_b_26: gpio@26 { + compatible = "nxp,pca9535"; + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg1 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_cam_pwr0 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR0"; + }; + video_b_cam_pwr1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR1"; + }; + video_b_cam_pwr2 { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR2"; + }; + video_b_cam_pwr3 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR3"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_des_led { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B led"; + }; + }; + + gpio_exp_b_5c: gpio@5c { + compatible = "maxim,max7325"; + reg = <0x5c>; + gpio-controller; + #gpio-cells = <2>; + + video_b_des_cfg2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg2"; + }; + video_b_des_cfg1 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg1"; + }; + video_b_des_cfg0 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + input; + line-name = "Video-B cfg0"; + }; + video_b_pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B PWR_SHDN"; + }; + video_b_des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Video-B DES_SHDN"; + }; + video_b_led { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "Video-B LED"; + }; + }; + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* Slot C (CN12) */ + }; + }; +}; + +&i2c4 { + i2cswitch4: pca9548@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* FAN1 node - lm96063 */ + fan_ctrl_1:lm96063-1@4c { + compatible = "lm96163"; + reg = <0x4c>; + }; + }; + + i2c@6 { + /* FAN2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* FAN2 node - lm96063 */ + fan_ctrl_2:lm96063-2@4c { + compatible = "lm96163"; + reg = <0x4c>; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + /* Power nodes - 2 x TPS544x20 */ + tps_5v: tps544c20@0x2a { + compatible = "tps544c20"; + reg = <0x2c>; + status = "disabled"; + }; + tps_3v3: tps544c20@0x22 { + compatible = "tps544c20"; + reg = <0x24>; + status = "disabled"; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* CAN and power board nodes */ + + gpio_ext_pwr: pca9535@22 { + compatible = "nxp,pca9535"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + + /* enable input DCDC after wake-up signal released */ + pwr_hold { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "pwr_hold"; + }; + pwr_5v_out { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "pwr_5v_out"; + }; + pwr_5v_oc { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + input; + line-name = "pwr_5v_oc"; + }; + pwr_wake8 { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + input; + line-name = "wake8"; + }; + pwr_wake7 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + input; + line-name = "wake7"; + }; + + /* CAN0 */ + can0_stby { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can0_stby"; + }; + can0_load { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can0_120R_load"; + }; + /* CAN1 */ + can1_stby { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can1_stby"; + }; + can1_load { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can1_120R_load"; + }; + /* CAN2 */ + can2_stby { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can2_stby"; + }; + can2_load { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can2_120R_load"; + }; + can2_rst { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can2_rst"; + }; + /* CAN3 */ + can3_stby { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can3_stby"; + }; + can3_load { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can3_120R_load"; + }; + can3_rst { + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "can3_rst"; + }; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FPDLink output node - DS90UH947 */ + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* BCM switch node */ + }; + + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* LED board node(s) */ + + gpio_ext_led: pca9535@22 { + compatible = "nxp,pca9535"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + + /* gpios 0..7 are used for indication LEDs, low-active */ + }; + rtc: mcp79411@6f { + compatible = "microchip,mcp7941x"; + reg = <0x6f>; + }; + }; + + /* port 7 is not used */ + }; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&vin0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin0ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin0_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin0_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin1ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin1_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin1_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin2ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin2_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin2_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin3 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin3ep0: endpoint { + csi,select = "csi40"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_40_ep>; + }; + }; + port@2 { + vin3_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin3_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + remote-endpoint = <&ov106xx_in4>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des1ep0: endpoint@0 { + remote-endpoint = <&max9286_des1ep0>; + }; + vin4_ti9x4_des1ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <1>; + remote-endpoint = <&ov106xx_in5>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des1ep1: endpoint@0 { + remote-endpoint = <&max9286_des1ep1>; + }; + vin5_ti9x4_des1ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <2>; + remote-endpoint = <&ov106xx_in6>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des1ep2: endpoint@0 { + remote-endpoint = <&max9286_des1ep2>; + }; + vin6_ti9x4_des1ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint@0 { + csi,select = "csi41"; + virtual,channel = <3>; + remote-endpoint = <&ov106xx_in7>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + csi2ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des1ep3: endpoint@0 { + remote-endpoint = <&max9286_des1ep3>; + }; + vin7_ti9x4_des1ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des1ep3>; + }; + }; + }; +}; + +&csi2_40 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_40_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_clk_pins>; + + /* Multi DAI */ + #sound-dai-cells = <1>; +}; + +&ssi1 { + /delete-property/shared-pin; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins>; + pinctrl-1 = <&sdhi3_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi3>; + vqmmc-supply = <&vccq_sdhi3>; + cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + sd-uhs-sdr50; + status = "okay"; +}; + +&msiof1 { + status = "disabled"; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&usb2_phy2 { + pinctrl-0 = <&usb2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + renesas,can-clock-select = <0x0>; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "disabled"; + + renesas,can-clock-select = <0x0>; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +/* uncomment to enable CN12 on VIN4-7 */ +//#include "ulcb-vb2-cn12.dtsi" diff --git a/arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi new file mode 100644 index 0000000..ed04695 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi @@ -0,0 +1,543 @@ +/* + * Device Tree Source for the ULCB Videobox Mini board + * + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/ { + aliases { + serial1 = &scif1; + }; + + lvds-encoder { + compatible = "thine,thc63lvdm83d"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_enc_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds_enc_out: endpoint { + remote-endpoint = <&lvds_in>; + }; + }; + }; + }; + + lvds { + compatible = "lvds-connector"; + + width-mm = <210>; + height-mm = <158>; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <65000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <40>; + hfront-porch = <80>; + hback-porch = <40>; + vfront-porch = <14>; + vback-porch = <14>; + vsync-len = <4>; + }; + + port { + lvds_in: endpoint { + remote-endpoint = <&lvds_enc_out>; + }; + }; + }; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins &canfd1_pins>; + pinctrl-names = "default"; + status = "disabled"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&csi2_41 { + status = "okay"; + + virtual,channel { + csi2_vc0 { + data,type = "ycbcr422"; + receive,vc = <0>; + }; + csi2_vc1 { + data,type = "ycbcr422"; + receive,vc = <1>; + }; + csi2_vc2 { + data,type = "ycbcr422"; + receive,vc = <2>; + }; + csi2_vc3 { + data,type = "ycbcr422"; + receive,vc = <3>; + }; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi2_41_ep: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + csi-rate = <300>; + }; + }; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + status = "okay"; + + clock-frequency = <400000>; + + i2cswitch1: i2c-switch@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + reset-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + ov106xx@0 { + compatible = "ovti,ov106xx"; + reg = <0x60>; + + port@0 { + ov106xx_in0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin4ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + ov106xx_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; + + ov106xx@1 { + compatible = "ovti,ov106xx"; + reg = <0x61>; + + port@0 { + ov106xx_in1: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin5ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + ov106xx_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; + + ov106xx@2 { + compatible = "ovti,ov106xx"; + reg = <0x62>; + + port@0 { + ov106xx_in2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin6ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + ov106xx_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; + + ov106xx@3 { + compatible = "ovti,ov106xx"; + reg = <0x63>; + + port@0 { + ov106xx_in3: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&vin7ep0>; + }; + }; + port@1 { + ov106xx_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + ov106xx_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; + + max9286@0 { + compatible = "maxim,max9286"; + reg = <0x2c>; + maxim,links = <4>; + maxim,lanes = <4>; + maxim,resetb-gpio = <1>; + maxim,fsync-mode = "automatic"; + maxim,timeout = <100>; + + POC0-gpios = <&gpio_exp_6c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_6c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_6c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_6c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + max9286_des0ep0: endpoint@0 { + max9271-addr = <0x50>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in0>; + }; + max9286_des0ep1: endpoint@1 { + max9271-addr = <0x51>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in1>; + }; + max9286_des0ep2: endpoint@2 { + max9271-addr = <0x52>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in2>; + }; + max9286_des0ep3: endpoint@3 { + max9271-addr = <0x53>; + dvp-order = <1>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + max9286_csi0ep0: endpoint { + csi-rate = <700>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + + ti9x4@0 { + compatible = "ti,ti9x4"; + reg = <0x3a>; + ti,sensor_delay = <350>; + ti,links = <4>; + ti,lanes = <4>; + ti,forwarding-mode = "round-robin"; + ti,cable-mode = "coax"; + + POC0-gpios = <&gpio_exp_6c 8 GPIO_ACTIVE_HIGH>; + POC1-gpios = <&gpio_exp_6c 9 GPIO_ACTIVE_HIGH>; + POC2-gpios = <&gpio_exp_6c 10 GPIO_ACTIVE_HIGH>; + POC3-gpios = <&gpio_exp_6c 11 GPIO_ACTIVE_HIGH>; + + port@0 { + ti9x4_des0ep0: endpoint@0 { + ti9x3-addr = <0x0c>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in0>; + }; + ti9x4_des0ep1: endpoint@1 { + ti9x3-addr = <0x0d>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in1>; + }; + ti9x4_des0ep2: endpoint@2 { + ti9x3-addr = <0x0e>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in2>; + }; + ti9x4_des0ep3: endpoint@3 { + ti9x3-addr = <0x0f>; + dvp-order = <0>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + ti9x4_csi0ep0: endpoint { + csi-rate = <1450>; + remote-endpoint = <&csi2_41_ep>; + }; + }; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + gpio_exp_6c: gpio@6c { + compatible = "maxim,max7325"; + reg = <0x6c>; + gpio-controller; + #gpio-cells = <2>; + + virq { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + input; + line-name = "VIRQ"; + }; + des_cfg { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + input; + line-name = "CNFG0"; + }; + pwr_shdn { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PWR_SHDN"; + }; + des_shdn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "Des_SHDN"; + }; + fpdl_shdn { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FPDL_SHDN"; + }; + }; + }; + }; +}; + +&gpio1 { + can0stby { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "CAN0STBY"; + }; +}; + +&gpio2 { + can0_load { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "CAN0Loff"; + }; +}; + +&pfc { + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data_a"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; + + i2c1_pins: i2c1 { + groups = "i2c1_b"; + function = "i2c1"; + }; + + scif1_pins: scif1 { + groups = "scif1_data_a"; + function = "scif1"; + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&vin4 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin4ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in0>; + }; + }; + port@1 { + csi0ep0: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin4_max9286_des0ep0: endpoint@0 { + remote-endpoint = <&max9286_des0ep0>; + }; + vin4_ti9x4_des0ep0: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep0>; + }; + }; + }; +}; + +&vin5 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin5ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <1>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in1>; + }; + }; + port@1 { + csi0ep1: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin5_max9286_des0ep1: endpoint@0 { + remote-endpoint = <&max9286_des0ep1>; + }; + vin5_ti9x4_des0ep1: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep1>; + }; + }; + }; +}; + +&vin6 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin6ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <2>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in2>; + }; + }; + port@1 { + csi0ep2: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin6_max9286_des0ep2: endpoint@0 { + remote-endpoint = <&max9286_des0ep2>; + }; + vin6_ti9x4_des0ep2: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep2>; + }; + }; + }; +}; + +&vin7 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + vin7ep0: endpoint { + csi,select = "csi41"; + virtual,channel = <3>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&ov106xx_in3>; + }; + }; + port@1 { + csi0ep3: endpoint { + remote-endpoint = <&csi2_41_ep>; + }; + }; + port@2 { + vin7_max9286_des0ep3: endpoint@0 { + remote-endpoint = <&max9286_des0ep3>; + }; + vin7_ti9x4_des0ep3: endpoint@1 { + remote-endpoint = <&ti9x4_des0ep3>; + }; + }; + }; +}; + -- 1.9.1