From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001 From: Angelos Mouzakitis Date: Tue, 10 Oct 2023 14:33:42 +0000 Subject: Add submodule dependency files Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec --- .../synctools/tablegen/X86/back/X86RegisterBanks.td | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td (limited to 'capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td') diff --git a/capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td b/capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td new file mode 100644 index 000000000..6d17cd53a --- /dev/null +++ b/capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td @@ -0,0 +1,17 @@ +//=- X86RegisterBank.td - Describe the AArch64 Banks -----*- tablegen -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// +//===----------------------------------------------------------------------===// + +/// General Purpose Registers: RAX, RCX,... +def GPRRegBank : RegisterBank<"GPR", [GR64]>; + +/// Floating Point/Vector Registers +def VECRRegBank : RegisterBank<"VECR", [VR512]>; -- cgit 1.2.3-korg