From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001
From: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>
Date: Tue, 10 Oct 2023 14:33:42 +0000
Subject: Add submodule dependency files
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
---
.../MdeModulePkg/Include/Ppi/AtaAhciController.h | 83 ++++++
roms/edk2/MdeModulePkg/Include/Ppi/AtaController.h | 155 ++++++++++++
roms/edk2/MdeModulePkg/Include/Ppi/AtaPassThru.h | 213 ++++++++++++++++
roms/edk2/MdeModulePkg/Include/Ppi/CapsuleOnDisk.h | 55 ++++
roms/edk2/MdeModulePkg/Include/Ppi/Debug.h | 75 ++++++
roms/edk2/MdeModulePkg/Include/Ppi/IoMmu.h | 201 +++++++++++++++
roms/edk2/MdeModulePkg/Include/Ppi/IpmiPpi.h | 59 +++++
.../Include/Ppi/NvmExpressHostController.h | 86 +++++++
.../MdeModulePkg/Include/Ppi/NvmExpressPassThru.h | 156 ++++++++++++
.../Include/Ppi/PlatformSpecificResetFilter.h | 25 ++
.../Include/Ppi/PlatformSpecificResetHandler.h | 23 ++
.../Ppi/PlatformSpecificResetNotification.h | 26 ++
.../MdeModulePkg/Include/Ppi/PostBootScriptTable.h | 20 ++
.../MdeModulePkg/Include/Ppi/SdMmcHostController.h | 57 +++++
.../edk2/MdeModulePkg/Include/Ppi/SecPerformance.h | 60 +++++
roms/edk2/MdeModulePkg/Include/Ppi/SerialPortPei.h | 20 ++
roms/edk2/MdeModulePkg/Include/Ppi/SmmAccess.h | 139 +++++++++++
.../MdeModulePkg/Include/Ppi/SmmCommunication.h | 57 +++++
roms/edk2/MdeModulePkg/Include/Ppi/SmmControl.h | 89 +++++++
.../Include/Ppi/StorageSecurityCommand.h | 277 +++++++++++++++++++++
.../MdeModulePkg/Include/Ppi/UfsHostController.h | 53 ++++
.../MdeModulePkg/Include/Ppi/Usb2HostController.h | 262 +++++++++++++++++++
roms/edk2/MdeModulePkg/Include/Ppi/UsbController.h | 87 +++++++
.../MdeModulePkg/Include/Ppi/UsbHostController.h | 250 +++++++++++++++++++
roms/edk2/MdeModulePkg/Include/Ppi/UsbIo.h | 189 ++++++++++++++
25 files changed, 2717 insertions(+)
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/AtaAhciController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/AtaController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/AtaPassThru.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/CapsuleOnDisk.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/Debug.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/IoMmu.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/IpmiPpi.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressHostController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressPassThru.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetFilter.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetHandler.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetNotification.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/PostBootScriptTable.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/SdMmcHostController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/SecPerformance.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/SerialPortPei.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/SmmAccess.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/SmmCommunication.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/SmmControl.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/StorageSecurityCommand.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/UfsHostController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/Usb2HostController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/UsbController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/UsbHostController.h
create mode 100644 roms/edk2/MdeModulePkg/Include/Ppi/UsbIo.h
(limited to 'roms/edk2/MdeModulePkg/Include/Ppi')
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/AtaAhciController.h b/roms/edk2/MdeModulePkg/Include/Ppi/AtaAhciController.h
new file mode 100644
index 000000000..07a2c8c28
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/AtaAhciController.h
@@ -0,0 +1,83 @@
+/** @file
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EDKII_ATA_AHCI_HOST_CONTROLLER_PPI_H_
+#define _EDKII_ATA_AHCI_HOST_CONTROLLER_PPI_H_
+
+#include <Protocol/DevicePath.h>
+
+///
+/// Global ID for the EDKII_ATA_AHCI_HOST_CONTROLLER_PPI.
+///
+#define EDKII_ATA_AHCI_HOST_CONTROLLER_PPI_GUID \
+ { \
+ 0x61dd33ea, 0x421f, 0x4cc0, { 0x89, 0x29, 0xff, 0xee, 0xa9, 0xa1, 0xa2, 0x61 } \
+ }
+
+//
+// Forward declaration for the EDKII_ATA_AHCI_HOST_CONTROLLER_PPI.
+//
+typedef struct _EDKII_ATA_AHCI_HOST_CONTROLLER_PPI EDKII_ATA_AHCI_HOST_CONTROLLER_PPI;
+
+/**
+ Get the MMIO base address of ATA AHCI host controller.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] ControllerId The ID of the ATA AHCI host controller.
+ @param[out] MmioBar The MMIO base address of the controller.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.
+ @retval EFI_NOT_FOUND The specified ATA AHCI host controller not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_ATA_AHCI_HC_GET_MMIO_BAR) (
+ IN EDKII_ATA_AHCI_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ OUT UINTN *MmioBar
+ );
+
+/**
+ Get the device path of ATA AHCI host controller.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] ControllerId The ID of the ATA AHCI host controller.
+ @param[out] DevicePathLength The length of the device path in bytes specified
+ by DevicePath.
+ @param[out] DevicePath The device path of ATA AHCI host controller.
+ This field re-uses EFI Device Path Protocol as
+ defined by Section 10.2 EFI Device Path Protocol
+ of UEFI 2.7 Specification.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.
+ @retval EFI_NOT_FOUND The specified ATA AHCI host controller not found.
+ @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_ATA_AHCI_HC_GET_DEVICE_PATH) (
+ IN EDKII_ATA_AHCI_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ );
+
+//
+// This PPI contains a set of services to interact with the ATA AHCI host controller.
+//
+struct _EDKII_ATA_AHCI_HOST_CONTROLLER_PPI {
+ EDKII_ATA_AHCI_HC_GET_MMIO_BAR GetAhciHcMmioBar;
+ EDKII_ATA_AHCI_HC_GET_DEVICE_PATH GetAhciHcDevicePath;
+};
+
+extern EFI_GUID gEdkiiPeiAtaAhciHostControllerPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/AtaController.h b/roms/edk2/MdeModulePkg/Include/Ppi/AtaController.h
new file mode 100644
index 000000000..2c17f31c3
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/AtaController.h
@@ -0,0 +1,155 @@
+/** @file
+ Define the PPI to abstract the functions that enable IDE and SATA channels, and to retrieve
+ the base I/O port address for each of the enabled IDE and SATA channels.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_ATA_CONTROLLER_PPI_H_
+#define _PEI_ATA_CONTROLLER_PPI_H_
+
+///
+/// Global ID for the PEI_ATA_CONTROLLER_PPI.
+///
+#define PEI_ATA_CONTROLLER_PPI_GUID \
+ { \
+ 0xa45e60d1, 0xc719, 0x44aa, {0xb0, 0x7a, 0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d } \
+ }
+
+///
+/// Forward declaration for the PEI_ATA_CONTROLLER_PPI.
+///
+typedef struct _PEI_ATA_CONTROLLER_PPI PEI_ATA_CONTROLLER_PPI;
+
+///
+/// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
+/// disable the IDE channels.
+/// This is designed for old generation chipset with PATA/SATA controllers.
+/// It may be ignored in PPI implementation for new generation chipset without PATA controller.
+///
+#define PEI_ICH_IDE_NONE 0x00
+
+///
+/// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
+/// enable the Primary IDE channel.
+/// This is designed for old generation chipset with PATA/SATA controllers.
+/// It may be ignored in PPI implementation for new generation chipset without PATA controller.
+///
+#define PEI_ICH_IDE_PRIMARY 0x01
+
+///
+/// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
+/// enable the Secondary IDE channel.
+/// This is designed for old generation chipset with PATA/SATA controllers.
+/// It may be ignored in PPI implementation for new generation chipset without PATA controller.
+///
+#define PEI_ICH_IDE_SECONDARY 0x02
+
+///
+/// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
+/// disable the SATA channel.
+/// This is designed for old generation chipset with PATA/SATA controllers.
+/// It may be ignored in PPI implementation for new generation chipset without PATA controller.
+///
+#define PEI_ICH_SATA_NONE 0x04
+
+///
+/// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
+/// enable the Primary SATA channel.
+/// This is designed for old generation chipset with PATA/SATA controllers.
+/// It may be ignored in PPI implementation for new generation chipset without PATA controller.
+///
+#define PEI_ICH_SATA_PRIMARY 0x08
+
+///
+/// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
+/// enable the Secondary SATA channel.
+/// This is designed for old generation chipset with PATA/SATA controllers.
+/// It may be ignored in PPI implementation for new generation chipset without PATA controller.
+///
+#define PEI_ICH_SATA_SECONDARY 0x010
+
+///
+/// Structure that contains the base addresses for the IDE registers
+///
+typedef struct {
+ ///
+ /// Base I/O port address of the IDE controller's command block
+ ///
+ UINT16 CommandBlockBaseAddr;
+ ///
+ /// Base I/O port address of the IDE controller's control block
+ ///
+ UINT16 ControlBlockBaseAddr;
+} IDE_REGS_BASE_ADDR;
+
+/**
+ Sets IDE and SATA channels to an enabled or disabled state.
+
+ This service enables or disables the IDE and SATA channels specified by ChannelMask.
+ It may ignore ChannelMask setting to enable or disable IDE and SATA channels based on the platform policy.
+ The number of the enabled channels will be returned by GET_IDE_REGS_BASE_ADDR() function.
+
+ If the new state is set, then EFI_SUCCESS is returned. If the new state can
+ not be set, then EFI_DEVICE_ERROR is returned.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_ATA_CONTROLLER_PPI.
+ @param[in] ChannelMask The bitmask that identifies the IDE and SATA channels to
+ enable or disable. This parameter is optional.
+
+ @retval EFI_SUCCESS The IDE or SATA channels were enabled or disabled successfully.
+ @retval EFI_DEVICE_ERROR The IDE or SATA channels could not be enabled or disabled.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_ENABLE_ATA)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_ATA_CONTROLLER_PPI *This,
+ IN UINT8 ChannelMask
+ );
+
+/**
+ Retrieves the I/O port base addresses for command and control registers of the
+ enabled IDE/SATA channels.
+
+ This service fills in the structure poionted to by IdeRegsBaseAddr with the I/O
+ port base addresses for the command and control registers of the IDE and SATA
+ channels that were previously enabled in EnableAtaChannel(). The number of
+ enabled IDE and SATA channels is returned.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_ATA_CONTROLLER_PPI.
+ @param[out] IdeRegsBaseAddr The pointer to caller allocated space to return the
+ I/O port base addresses of the IDE and SATA channels
+ that were previosuly enabled with EnableAtaChannel().
+
+ @return The number of enabled IDE and SATA channels in the platform.
+
+**/
+typedef
+UINT32
+(EFIAPI *GET_IDE_REGS_BASE_ADDR)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_ATA_CONTROLLER_PPI *This,
+ OUT IDE_REGS_BASE_ADDR *IdeRegsBaseAddr
+ );
+
+///
+/// This PPI contains services to enable and disable IDE and SATA channels and
+/// retrieves the base I/O port addresses to the enabled IDE and SATA channels.
+///
+struct _PEI_ATA_CONTROLLER_PPI {
+ PEI_ENABLE_ATA EnableAtaChannel;
+ GET_IDE_REGS_BASE_ADDR GetIdeRegsBaseAddr;
+};
+
+extern EFI_GUID gPeiAtaControllerPpiGuid;
+
+#endif
+
+
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/AtaPassThru.h b/roms/edk2/MdeModulePkg/Include/Ppi/AtaPassThru.h
new file mode 100644
index 000000000..f8ebe56df
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/AtaPassThru.h
@@ -0,0 +1,213 @@
+/** @file
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EDKII_ATA_PASS_THRU_PPI_H_
+#define _EDKII_ATA_PASS_THRU_PPI_H_
+
+#include <Protocol/DevicePath.h>
+#include <Protocol/AtaPassThru.h>
+
+///
+/// Global ID for the EDKII_PEI_ATA_PASS_THRU_PPI.
+///
+#define EDKII_PEI_ATA_PASS_THRU_PPI_GUID \
+ { \
+ 0xa16473fd, 0xd474, 0x4c89, { 0xae, 0xc7, 0x90, 0xb8, 0x3c, 0x73, 0x86, 0x9 } \
+ }
+
+//
+// Forward declaration for the EDKII_PEI_ATA_PASS_THRU_PPI.
+//
+typedef struct _EDKII_PEI_ATA_PASS_THRU_PPI EDKII_PEI_ATA_PASS_THRU_PPI;
+
+//
+// Revision The revision to which the ATA Pass Thru PPI interface adheres.
+// All future revisions must be backwards compatible.
+// If a future version is not back wards compatible it is not the same GUID.
+//
+#define EDKII_PEI_ATA_PASS_THRU_PPI_REVISION 0x00010000
+
+
+/**
+ Sends an ATA command to an ATA device that is attached to the ATA controller.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] Port The port number of the ATA device to send
+ the command.
+ @param[in] PortMultiplierPort The port multiplier port number of the ATA
+ device to send the command.
+ If there is no port multiplier, then specify
+ 0xFFFF.
+ @param[in,out] Packet A pointer to the ATA command to send to
+ the ATA device specified by Port and
+ PortMultiplierPort.
+
+ @retval EFI_SUCCESS The ATA command was sent by the host. For
+ bi-directional commands, InTransferLength bytes
+ were transferred from InDataBuffer. For write
+ and bi-directional commands, OutTransferLength
+ bytes were transferred by OutDataBuffer.
+ @retval EFI_NOT_FOUND The specified ATA device is not found.
+ @retval EFI_INVALID_PARAMETER The contents of Acb are invalid. The ATA command
+ was not sent, so no additional status information
+ is available.
+ @retval EFI_BAD_BUFFER_SIZE The ATA command was not executed. The number
+ of bytes that could be transferred is returned
+ in InTransferLength. For write and bi-directional
+ commands, OutTransferLength bytes were transferred
+ by OutDataBuffer.
+ @retval EFI_NOT_READY The ATA command could not be sent because there
+ are too many ATA commands already queued. The
+ caller may retry again later.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to
+ send the ATA command.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_ATA_PASS_THRU_PASSTHRU) (
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet
+ );
+
+/**
+ Used to retrieve the list of legal port numbers for ATA devices on an ATA controller.
+ These can either be the list of ports where ATA devices are actually present or the
+ list of legal port numbers for the ATA controller. Regardless, the caller of this
+ function must probe the port number returned to see if an ATA device is actually
+ present at that location on the ATA controller.
+
+ The GetNextPort() function retrieves the port number on an ATA controller. If on
+ input Port is 0xFFFF, then the port number of the first port on the ATA controller
+ is returned in Port and EFI_SUCCESS is returned.
+
+ If Port is a port number that was returned on a previous call to GetNextPort(),
+ then the port number of the next port on the ATA controller is returned in Port,
+ and EFI_SUCCESS is returned. If Port is not 0xFFFF and Port was not returned on
+ a previous call to GetNextPort(), then EFI_INVALID_PARAMETER is returned.
+
+ If Port is the port number of the last port on the ATA controller, then EFI_NOT_FOUND
+ is returned.
+
+ @param[in] This The PPI instance pointer.
+ @param[in,out] Port On input, a pointer to the port number on the ATA controller.
+ On output, a pointer to the next port number on the ATA
+ controller. An input value of 0xFFFF retrieves the first
+ port number on the ATA controller.
+
+ @retval EFI_SUCCESS The next port number on the ATA controller was
+ returned in Port.
+ @retval EFI_NOT_FOUND There are no more ports on this ATA controller.
+ @retval EFI_INVALID_PARAMETER Port is not 0xFFFF and Port was not returned
+ on a previous call to GetNextPort().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_ATA_PASS_THRU_THRU_GET_NEXT_PORT) (
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN OUT UINT16 *Port
+ );
+
+/**
+ Used to retrieve the list of legal port multiplier port numbers for ATA devices
+ on a port of an ATA controller. These can either be the list of port multiplier
+ ports where ATA devices are actually present on port or the list of legal port
+ multiplier ports on that port. Regardless, the caller of this function must probe
+ the port number and port multiplier port number returned to see if an ATA device
+ is actually present.
+
+ The GetNextDevice() function retrieves the port multiplier port number of an ATA
+ device present on a port of an ATA controller.
+
+ If PortMultiplierPort points to a port multiplier port number value that was
+ returned on a previous call to GetNextDevice(), then the port multiplier port
+ number of the next ATA device on the port of the ATA controller is returned in
+ PortMultiplierPort, and EFI_SUCCESS is returned.
+
+ If PortMultiplierPort points to 0xFFFF, then the port multiplier port number
+ of the first ATA device on port of the ATA controller is returned in PortMultiplierPort
+ and EFI_SUCCESS is returned.
+
+ If PortMultiplierPort is not 0xFFFF and the value pointed to by PortMultiplierPort
+ was not returned on a previous call to GetNextDevice(), then EFI_INVALID_PARAMETER
+ is returned.
+
+ If PortMultiplierPort is the port multiplier port number of the last ATA device
+ on the port of the ATA controller, then EFI_NOT_FOUND is returned.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] Port The port number present on the ATA controller.
+ @param[in,out] PortMultiplierPort On input, a pointer to the port multiplier
+ port number of an ATA device present on the
+ ATA controller. If on input a PortMultiplierPort
+ of 0xFFFF is specified, then the port multiplier
+ port number of the first ATA device is returned.
+ On output, a pointer to the port multiplier port
+ number of the next ATA device present on an ATA
+ controller.
+
+ @retval EFI_SUCCESS The port multiplier port number of the next ATA
+ device on the port of the ATA controller was
+ returned in PortMultiplierPort.
+ @retval EFI_NOT_FOUND There are no more ATA devices on this port of
+ the ATA controller.
+ @retval EFI_INVALID_PARAMETER PortMultiplierPort is not 0xFFFF, and PortMultiplierPort
+ was not returned on a previous call to GetNextDevice().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_ATA_PASS_THRU_GET_NEXT_DEVICE) (
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN UINT16 Port,
+ IN OUT UINT16 *PortMultiplierPort
+ );
+
+/**
+ Gets the device path information of the underlying ATA host controller.
+
+ @param[in] This The PPI instance pointer.
+ @param[out] DevicePathLength The length of the device path in bytes specified
+ by DevicePath.
+ @param[out] DevicePath The device path of the underlying ATA host controller.
+ This field re-uses EFI Device Path Protocol as
+ defined by Section 10.2 EFI Device Path Protocol
+ of UEFI 2.7 Specification.
+
+ @retval EFI_SUCCESS The device path of the ATA host controller has
+ been successfully returned.
+ @retval EFI_INVALID_PARAMETER DevicePathLength or DevicePath is NULL.
+ @retval EFI_OUT_OF_RESOURCES Not enough resource to return the device path.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_ATA_PASS_THRU_GET_DEVICE_PATH) (
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ );
+
+//
+// EDKII_PEI_ATA_PASS_THRU_PPI provides the services that are required to send
+// ATA commands to an ATA device during PEI.
+//
+struct _EDKII_PEI_ATA_PASS_THRU_PPI {
+ UINT64 Revision;
+ EFI_ATA_PASS_THRU_MODE *Mode;
+ EDKII_PEI_ATA_PASS_THRU_PASSTHRU PassThru;
+ EDKII_PEI_ATA_PASS_THRU_THRU_GET_NEXT_PORT GetNextPort;
+ EDKII_PEI_ATA_PASS_THRU_GET_NEXT_DEVICE GetNextDevice;
+ EDKII_PEI_ATA_PASS_THRU_GET_DEVICE_PATH GetDevicePath;
+};
+
+extern EFI_GUID gEdkiiPeiAtaPassThruPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/CapsuleOnDisk.h b/roms/edk2/MdeModulePkg/Include/Ppi/CapsuleOnDisk.h
new file mode 100644
index 000000000..8ff2ba4b1
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/CapsuleOnDisk.h
@@ -0,0 +1,55 @@
+/** @file
+ This file declares Capsule On Disk PPI. This PPI is used to find and load the
+ capsule on files that are relocated into a temp file under rootdir.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __PEI_CAPSULE_ON_DISK_PPI_H__
+#define __PEI_CAPSULE_ON_DISK_PPI_H__
+
+#define EDKII_PEI_CAPSULE_ON_DISK_PPI_GUID \
+ { \
+ 0x71a9ea61, 0x5a35, 0x4a5d, {0xac, 0xef, 0x9c, 0xf8, 0x6d, 0x6d, 0x67, 0xe0 } \
+ }
+
+typedef struct _EDKII_PEI_CAPSULE_ON_DISK_PPI EDKII_PEI_CAPSULE_ON_DISK_PPI;
+
+/**
+ Loads a DXE capsule from some media into memory and updates the HOB table
+ with the DXE firmware volume information.
+
+ @param PeiServices General-purpose services that are available to every PEIM.
+ @param This Indicates the EFI_PEI_RECOVERY_MODULE_PPI instance.
+
+ @retval EFI_SUCCESS The capsule was loaded correctly.
+ @retval EFI_DEVICE_ERROR A device error occurred.
+ @retval EFI_NOT_FOUND A recovery DXE capsule cannot be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_LOAD_CAPSULE_ON_DISK)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EDKII_PEI_CAPSULE_ON_DISK_PPI *This
+ );
+
+///
+/// Finds and loads the recovery files.
+///
+struct _EDKII_PEI_CAPSULE_ON_DISK_PPI {
+ EDKII_PEI_LOAD_CAPSULE_ON_DISK LoadCapsuleOnDisk; ///< Loads a DXE binary capsule into memory.
+};
+
+extern EFI_GUID gEdkiiPeiCapsuleOnDiskPpiGuid;
+
+#define EDKII_PEI_BOOT_IN_CAPSULE_ON_DISK_MODE_PPI \
+ { \
+ 0xb08a11e4, 0xe2b7, 0x4b75, { 0xb5, 0x15, 0xaf, 0x61, 0x6, 0x68, 0xbf, 0xd1 } \
+ }
+
+extern EFI_GUID gEdkiiPeiBootInCapsuleOnDiskModePpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/Debug.h b/roms/edk2/MdeModulePkg/Include/Ppi/Debug.h
new file mode 100644
index 000000000..d14caa2bf
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/Debug.h
@@ -0,0 +1,75 @@
+/** @file
+ Define the EDKII_DEBUG_PPI that PEIMs can use to dump info to debug port.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __EDKII_DEBUG_PPI_H__
+#define __EDKII_DEBUG_PPI_H__
+
+#include <Pi/PiPeiCis.h>
+
+//
+// Global ID for the EDKII_DEBUG_PPI
+//
+#define EDKII_DEBUG_PPI_GUID \
+ { \
+ 0x999e699c, 0xb013, 0x475e, {0xb1, 0x7b, 0xf3, 0xa8, 0xae, 0x5c, 0x48, 0x75} \
+ }
+
+///
+/// Forward declaration for the PEI_DEBUG_LIB_DEBUG_PPI EDKII_DEBUG_PPI
+///
+typedef struct _EDKII_DEBUG_PPI EDKII_DEBUG_PPI;
+
+/**
+ Print a debug message to debug output device if the specified error level
+ is enabled.
+
+ @param[in] ErrorLevel The error level of the debug message.
+ @param[in] Format Format string for the debug message to print.
+ @param[in] Marker BASE_LIST marker for the variable argument list.
+
+**/
+typedef
+VOID
+(EFIAPI *EDKII_DEBUG_BPRINT)(
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN BASE_LIST Marker
+ );
+
+/**
+ Print an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ @param[in] FileName The pointer to the name of the source file that
+ generated the assert condition.
+ @param[in] LineNumber The line number in the source file that generated
+ the assert condition
+ @param[in] Description The pointer to the description of the assert condition.
+
+**/
+typedef
+VOID
+(EFIAPI *EDKII_DEBUG_ASSERT)(
+ IN CONST CHAR8 *FileName,
+ IN UINTN LineNumber,
+ IN CONST CHAR8 *Description
+ );
+
+///
+/// This PPI contains a set of services to print message to debug output device
+///
+struct _EDKII_DEBUG_PPI {
+ EDKII_DEBUG_BPRINT DebugBPrint;
+ EDKII_DEBUG_ASSERT DebugAssert;
+};
+
+extern EFI_GUID gEdkiiDebugPpiGuid;
+
+#endif
+
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/IoMmu.h b/roms/edk2/MdeModulePkg/Include/Ppi/IoMmu.h
new file mode 100644
index 000000000..34d7f0534
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/IoMmu.h
@@ -0,0 +1,201 @@
+/** @file
+ PEI IOMMU PPI.
+
+Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef __PEI_IOMMU_H__
+#define __PEI_IOMMU_H__
+
+//
+// for EFI_ALLOCATE_TYPE
+//
+#include <Uefi.h>
+
+//
+// Include protocol for common definition
+// EDKII_IOMMU_ACCESS_xxx
+// EDKII_IOMMU_OPERATION
+//
+#include <Protocol/IoMmu.h>
+
+//
+// IOMMU Ppi GUID value
+//
+#define EDKII_IOMMU_PPI_GUID \
+ { \
+ 0x70b0af26, 0xf847, 0x4bb6, { 0xaa, 0xb9, 0xcd, 0xe8, 0x4f, 0xc6, 0x14, 0x31 } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EDKII_IOMMU_PPI EDKII_IOMMU_PPI;
+
+//
+// Revision The revision to which the IOMMU interface adheres.
+// All future revisions must be backwards compatible.
+// If a future version is not back wards compatible it is not the same GUID.
+//
+#define EDKII_IOMMU_PPI_REVISION 0x00010000
+
+/**
+ Set IOMMU attribute for a system memory.
+
+ If the IOMMU PPI exists, the system memory cannot be used
+ for DMA by default.
+
+ When a device requests a DMA access for a system memory,
+ the device driver need use SetAttribute() to update the IOMMU
+ attribute to request DMA access (read and/or write).
+
+ @param[in] This The PPI instance pointer.
+ @param[in] Mapping The mapping value returned from Map().
+ @param[in] IoMmuAccess The IOMMU access.
+
+ @retval EFI_SUCCESS The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.
+ @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
+ @retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combination of access.
+ @retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not supported by the IOMMU.
+ @retval EFI_UNSUPPORTED The IOMMU does not support the memory range specified by Mapping.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources available to modify the IOMMU access.
+ @retval EFI_DEVICE_ERROR The IOMMU device reported an error while attempting the operation.
+ @retval EFI_NOT_AVAILABLE_YET DMA protection has been enabled, but DMA buffer are
+ not available to be allocated yet.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_IOMMU_SET_ATTRIBUTE)(
+ IN EDKII_IOMMU_PPI *This,
+ IN VOID *Mapping,
+ IN UINT64 IoMmuAccess
+ );
+
+/**
+ Provides the controller-specific addresses required to access system memory from a
+ DMA bus master.
+
+ @param This The PPI instance pointer.
+ @param Operation Indicates if the bus master is going to read or write to system memory.
+ @param HostAddress The system memory address to map to the PCI controller.
+ @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
+ that were mapped.
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to
+ access the hosts HostAddress.
+ @param Mapping A resulting value to pass to Unmap().
+
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
+ @retval EFI_NOT_AVAILABLE_YET DMA protection has been enabled, but DMA buffer are
+ not available to be allocated yet.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_IOMMU_MAP)(
+ IN EDKII_IOMMU_PPI *This,
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
+ );
+
+/**
+ Completes the Map() operation and releases any corresponding resources.
+
+ @param This The PPI instance pointer.
+ @param Mapping The mapping value returned from Map().
+
+ @retval EFI_SUCCESS The range was unmapped.
+ @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
+ @retval EFI_NOT_AVAILABLE_YET DMA protection has been enabled, but DMA buffer are
+ not available to be allocated yet.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_IOMMU_UNMAP)(
+ IN EDKII_IOMMU_PPI *This,
+ IN VOID *Mapping
+ );
+
+/**
+ Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
+ OperationBusMasterCommonBuffer64 mapping.
+
+ @param This The PPI instance pointer.
+ @param MemoryType The type of memory to allocate, EfiBootServicesData or
+ EfiRuntimeServicesData.
+ @param Pages The number of pages to allocate.
+ @param HostAddress A pointer to store the base system memory address of the
+ allocated range.
+ @param Attributes The requested bit mask of attributes for the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were allocated.
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
+ @retval EFI_NOT_AVAILABLE_YET DMA protection has been enabled, but DMA buffer are
+ not available to be allocated yet.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_IOMMU_ALLOCATE_BUFFER)(
+ IN EDKII_IOMMU_PPI *This,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN OUT VOID **HostAddress,
+ IN UINT64 Attributes
+ );
+
+/**
+ Frees memory that was allocated with AllocateBuffer().
+
+ @param This The PPI instance pointer.
+ @param Pages The number of pages to free.
+ @param HostAddress The base system memory address of the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+ @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
+ was not allocated with AllocateBuffer().
+ @retval EFI_NOT_AVAILABLE_YET DMA protection has been enabled, but DMA buffer are
+ not available to be allocated yet.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_IOMMU_FREE_BUFFER)(
+ IN EDKII_IOMMU_PPI *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
+ );
+
+///
+/// IOMMU PPI structure.
+///
+struct _EDKII_IOMMU_PPI {
+ UINT64 Revision;
+ EDKII_PEI_IOMMU_SET_ATTRIBUTE SetAttribute;
+ EDKII_PEI_IOMMU_MAP Map;
+ EDKII_PEI_IOMMU_UNMAP Unmap;
+ EDKII_PEI_IOMMU_ALLOCATE_BUFFER AllocateBuffer;
+ EDKII_PEI_IOMMU_FREE_BUFFER FreeBuffer;
+};
+
+///
+/// IOMMU PPI GUID variable.
+///
+extern EFI_GUID gEdkiiIoMmuPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/IpmiPpi.h b/roms/edk2/MdeModulePkg/Include/Ppi/IpmiPpi.h
new file mode 100644
index 000000000..c3412e17b
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/IpmiPpi.h
@@ -0,0 +1,59 @@
+/** @file
+ Ppi for Ipmi of SMS.
+
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _IPMI_PPI_H_
+#define _IPMI_PPI_H_
+
+typedef struct _PEI_IPMI_PPI PEI_IPMI_PPI;
+
+#define PEI_IPMI_PPI_GUID \
+ { \
+ 0xa9731431, 0xd968, 0x4277, 0xb7, 0x52, 0xa3, 0xa9, 0xa6, 0xae, 0x18, 0x98 \
+ }
+
+/**
+ This service enables submitting commands via Ipmi.
+
+ @param[in] This This point for PEI_IPMI_PPI structure.
+ @param[in] NetFunction Net function of the command.
+ @param[in] Command IPMI Command.
+ @param[in] RequestData Command Request Data.
+ @param[in] RequestDataSize Size of Command Request Data.
+ @param[out] ResponseData Command Response Data. The completion code is the first byte of response data.
+ @param[in, out] ResponseDataSize Size of Command Response Data.
+
+ @retval EFI_SUCCESS The command byte stream was successfully submit to the device and a response was successfully received.
+ @retval EFI_NOT_FOUND The command was not successfully sent to the device or a response was not successfully received from the device.
+ @retval EFI_NOT_READY Ipmi Device is not ready for Ipmi command access.
+ @retval EFI_DEVICE_ERROR Ipmi Device hardware error.
+ @retval EFI_TIMEOUT The command time out.
+ @retval EFI_UNSUPPORTED The command was not successfully sent to the device.
+ @retval EFI_OUT_OF_RESOURCES The resource allcation is out of resource or data size error.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_IPMI_SUBMIT_COMMAND) (
+ IN PEI_IPMI_PPI *This,
+ IN UINT8 NetFunction,
+ IN UINT8 Command,
+ IN UINT8 *RequestData,
+ IN UINT32 RequestDataSize,
+ OUT UINT8 *ResponseData,
+ IN OUT UINT32 *ResponseDataSize
+ );
+
+//
+// IPMI PPI
+//
+struct _PEI_IPMI_PPI {
+ PEI_IPMI_SUBMIT_COMMAND IpmiSubmitCommand;
+};
+
+extern EFI_GUID gPeiIpmiPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressHostController.h b/roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressHostController.h
new file mode 100644
index 000000000..3a88180aa
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressHostController.h
@@ -0,0 +1,86 @@
+/** @file
+
+ Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI_H_
+#define _EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI_H_
+
+#include <Protocol/DevicePath.h>
+
+///
+/// Global ID for the EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI.
+///
+#define EDKII_NVME_EXPRESS_HOST_CONTROLLER_PPI_GUID \
+ { \
+ 0xcae3aa63, 0x676f, 0x4da3, { 0xbd, 0x50, 0x6c, 0xc5, 0xed, 0xde, 0x9a, 0xad } \
+ }
+
+//
+// Forward declaration for the EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI.
+//
+typedef struct _EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI;
+
+/**
+ Get the MMIO base address of NVM Express host controller.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] ControllerId The ID of the NVM Express host controller.
+ @param[out] MmioBar The MMIO base address of the controller.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.
+ @retval EFI_NOT_FOUND The specified NVM Express host controller not
+ found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_NVM_EXPRESS_HC_GET_MMIO_BAR) (
+ IN EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ OUT UINTN *MmioBar
+ );
+
+/**
+ Get the device path of NVM Express host controller.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] ControllerId The ID of the NVM Express host controller.
+ @param[out] DevicePathLength The length of the device path in bytes specified
+ by DevicePath.
+ @param[out] DevicePath The device path of NVM Express host controller.
+ This field re-uses EFI Device Path Protocol as
+ defined by Section 10.2 EFI Device Path Protocol
+ of UEFI 2.7 Specification.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.
+ @retval EFI_NOT_FOUND The specified NVM Express host controller not
+ found.
+ @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_NVM_EXPRESS_HC_GET_DEVICE_PATH) (
+ IN EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ );
+
+//
+// This PPI contains a set of services to interact with the NVM Express host
+// controller.
+//
+struct _EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI {
+ EDKII_NVM_EXPRESS_HC_GET_MMIO_BAR GetNvmeHcMmioBar;
+ EDKII_NVM_EXPRESS_HC_GET_DEVICE_PATH GetNvmeHcDevicePath;
+};
+
+extern EFI_GUID gEdkiiPeiNvmExpressHostControllerPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressPassThru.h b/roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressPassThru.h
new file mode 100644
index 000000000..cb5b3b3b1
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/NvmExpressPassThru.h
@@ -0,0 +1,156 @@
+/** @file
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EDKII_NVME_PASS_THRU_PPI_H_
+#define _EDKII_NVME_PASS_THRU_PPI_H_
+
+#include <Protocol/DevicePath.h>
+#include <Protocol/NvmExpressPassthru.h>
+
+///
+/// Global ID for the EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI.
+///
+#define EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_GUID \
+ { \
+ 0x6af31b2c, 0x3be, 0x46c1, { 0xb1, 0x2d, 0xea, 0x4a, 0x36, 0xdf, 0xa7, 0x4c } \
+ }
+
+//
+// Forward declaration for the EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI.
+//
+typedef struct _EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI;
+
+//
+// Revision The revision to which the Nvme Pass Thru PPI interface adheres.
+// All future revisions must be backwards compatible.
+// If a future version is not back wards compatible it is not the same GUID.
+//
+#define EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION 0x00010000
+
+/**
+ Gets the device path information of the underlying NVM Express host controller.
+
+ @param[in] This The PPI instance pointer.
+ @param[out] DevicePathLength The length of the device path in bytes specified
+ by DevicePath.
+ @param[out] DevicePath The device path of the underlying NVM Express
+ host controller.
+ This field re-uses EFI Device Path Protocol as
+ defined by Section 10.2 EFI Device Path Protocol
+ of UEFI 2.7 Specification.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER DevicePathLength or DevicePath is NULL.
+ @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_NVME_PASS_THRU_GET_DEVICE_PATH) (
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ );
+
+/**
+ Used to retrieve the next namespace ID for this NVM Express controller.
+
+ If on input the value pointed to by NamespaceId is 0xFFFFFFFF, then the first
+ valid namespace ID defined on the NVM Express controller is returned in the
+ location pointed to by NamespaceId and a status of EFI_SUCCESS is returned.
+
+ If on input the value pointed to by NamespaceId is an invalid namespace ID
+ other than 0xFFFFFFFF, then EFI_INVALID_PARAMETER is returned.
+
+ If on input the value pointed to by NamespaceId is a valid namespace ID, then
+ the next valid namespace ID on the NVM Express controller is returned in the
+ location pointed to by NamespaceId, and EFI_SUCCESS is returned.
+
+ If the value pointed to by NamespaceId is the namespace ID of the last
+ namespace on the NVM Express controller, then EFI_NOT_FOUND is returned.
+
+ @param[in] This The PPI instance pointer.
+ @param[in,out] NamespaceId On input, a pointer to a legal NamespaceId
+ for an NVM Express namespace present on the
+ NVM Express controller. On output, a pointer
+ to the next NamespaceId of an NVM Express
+ namespace on an NVM Express controller. An
+ input value of 0xFFFFFFFF retrieves the
+ first NamespaceId for an NVM Express
+ namespace present on an NVM Express
+ controller.
+
+ @retval EFI_SUCCESS The Namespace ID of the next Namespace was
+ returned.
+ @retval EFI_NOT_FOUND There are no more namespaces defined on this
+ controller.
+ @retval EFI_INVALID_PARAMETER NamespaceId is an invalid value other than
+ 0xFFFFFFFF.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_NVME_PASS_THRU_GET_NEXT_NAMESPACE)(
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN OUT UINT32 *NamespaceId
+ );
+
+
+/**
+ Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function only
+ supports blocking execution of the command.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] NamespaceId Is a 32 bit Namespace ID to which the Nvm Express command packet will
+ be sent.
+ A Value of 0 denotes the NVM Express controller, a Value of all 0FFh in
+ the namespace ID specifies that the command packet should be sent to all
+ valid namespaces.
+ @param[in,out] Packet A pointer to the EDKII PEI NVM Express PassThru Command Packet to send
+ to the NVMe namespace specified by NamespaceId.
+
+ @retval EFI_SUCCESS The EDKII PEI NVM Express Command Packet was sent by the host.
+ TransferLength bytes were transferred to, or from DataBuffer.
+ @retval EFI_NOT_READY The EDKII PEI NVM Express Command Packet could not be sent because
+ the controller is not ready. The caller may retry again later.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the EDKII PEI NVM
+ Express Command Packet.
+ @retval EFI_INVALID_PARAMETER Namespace, or the contents of EDKII_PEI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET
+ are invalid.
+ The EDKII PEI NVM Express Command Packet was not sent, so no
+ additional status information is available.
+ @retval EFI_UNSUPPORTED The command described by the EDKII PEI NVM Express Command Packet
+ is not supported by the host adapter.
+ The EDKII PEI NVM Express Command Packet was not sent, so no
+ additional status information is available.
+ @retval EFI_TIMEOUT A timeout occurred while waiting for the EDKII PEI NVM Express Command
+ Packet to execute.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_NVME_PASS_THRU_PASSTHRU) (
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ );
+
+//
+// This PPI contains a set of services to send commands
+// to a mass storage device.
+//
+struct _EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI {
+ UINT64 Revision;
+ EFI_NVM_EXPRESS_PASS_THRU_MODE *Mode;
+ EDKII_PEI_NVME_PASS_THRU_GET_DEVICE_PATH GetDevicePath;
+ EDKII_PEI_NVME_PASS_THRU_GET_NEXT_NAMESPACE GetNextNameSpace;
+ EDKII_PEI_NVME_PASS_THRU_PASSTHRU PassThru;
+};
+
+extern EFI_GUID gEdkiiPeiNvmExpressPassThruPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetFilter.h b/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetFilter.h
new file mode 100644
index 000000000..b5ee324db
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetFilter.h
@@ -0,0 +1,25 @@
+/** @file
+ This PPI provides services to register a platform specific reset filter
+ for ResetSystem(). A reset filter evaluates the parameters passed to
+ ResetSystem() and converts a ResetType of EfiResetPlatformSpecific to a
+ non-platform specific reset type. The registered filters are processed before
+ EDKII_PLATFORM_SPECIFIC_RESET_NOTIFICATION_PPI handlers.
+
+ Copyright (c) 2017 - 2018 Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PLATFORM_SPECIFIC_RESET_FILTER_PPI_H_
+#define _PLATFORM_SPECIFIC_RESET_FILTER_PPI_H_
+
+#include <Protocol/ResetNotification.h>
+
+#define EDKII_PLATFORM_SPECIFIC_RESET_FILTER_PPI_GUID \
+ { 0x8c9f4de3, 0x7b90, 0x47ef, { 0x93, 0x8, 0x28, 0x7c, 0xec, 0xd6, 0x6d, 0xe8 } }
+
+typedef EFI_RESET_NOTIFICATION_PROTOCOL EDKII_PLATFORM_SPECIFIC_RESET_FILTER_PPI;
+
+extern EFI_GUID gEdkiiPlatformSpecificResetFilterPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetHandler.h b/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetHandler.h
new file mode 100644
index 000000000..069a4f707
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetHandler.h
@@ -0,0 +1,23 @@
+/** @file
+ This PPI provides services to register a platform specific handler for
+ ResetSystem(). The registered handlers are processed after
+ EDKII_PLATFORM_SPECIFIC_RESET_NOTIFICATION_PPI notifications.
+
+ Copyright (c) 2017 - 2018 Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PLATFORM_SPECIFIC_RESET_HANDLER_PPI_H_
+#define _PLATFORM_SPECIFIC_RESET_HANDLER_PPI_H_
+
+#include <Protocol/ResetNotification.h>
+
+#define EDKII_PLATFORM_SPECIFIC_RESET_HANDLER_PPI_GUID \
+ { 0x75cf14ae, 0x3441, 0x49dc, { 0xaa, 0x10, 0xbb, 0x35, 0xa7, 0xba, 0x8b, 0xab } }
+
+typedef EFI_RESET_NOTIFICATION_PROTOCOL EDKII_PLATFORM_SPECIFIC_RESET_HANDLER_PPI;
+
+extern EFI_GUID gEdkiiPlatformSpecificResetHandlerPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetNotification.h b/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetNotification.h
new file mode 100644
index 000000000..f97e46f5e
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/PlatformSpecificResetNotification.h
@@ -0,0 +1,26 @@
+/** @file
+ This PPI provides services to register a platform specific notification callback for
+ ResetSystem(). The registered handlers are processed after
+ EDKII_PLATFORM_SPECIFIC_RESET_FILTER_PPI notifications and before
+ EDKII_PLATFORM_SPECIFIC_RESET_HANDLER_PPI notifications.
+
+ Copyright (c) 2017 - 2018 Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 Microsoft Corporation. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PLATFORM_SPECIFIC_RESET_NOTIFICATION_PPI_H_
+#define _PLATFORM_SPECIFIC_RESET_NOTIFICATION_PPI_H_
+
+#include <Protocol/ResetNotification.h>
+
+#define EDKII_PLATFORM_SPECIFIC_RESET_NOTIFICATION_PPI_GUID \
+ { 0xe09f355d, 0xdae8, 0x4910, { 0xb1, 0x4a, 0x92, 0x78, 0x0f, 0xdc, 0xf7, 0xcb } }
+
+typedef EFI_RESET_NOTIFICATION_PROTOCOL EDKII_PLATFORM_SPECIFIC_RESET_NOTIFICATION_PPI;
+
+extern EFI_GUID gEdkiiPlatformSpecificResetNotificationPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/PostBootScriptTable.h b/roms/edk2/MdeModulePkg/Include/Ppi/PostBootScriptTable.h
new file mode 100644
index 000000000..09327c0d5
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/PostBootScriptTable.h
@@ -0,0 +1,20 @@
+/** @file
+ POST BootScript Table PPI definition.
+
+ This PPI is used to be notification after boot script table execution.
+
+ Copyright (c) 2010, Intel Corporation. All rights reserved. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_POST_BOOT_SCRIPT_TABLE_H_
+#define _PEI_POST_BOOT_SCRIPT_TABLE_H_
+
+#define PEI_POST_BOOT_SCRIPT_TABLE_PPI_GUID \
+ {0x88c9d306, 0x900, 0x4eb5, 0x82, 0x60, 0x3e, 0x2d, 0xbe, 0xda, 0x1f, 0x89};
+
+extern EFI_GUID gPeiPostScriptTablePpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/SdMmcHostController.h b/roms/edk2/MdeModulePkg/Include/Ppi/SdMmcHostController.h
new file mode 100644
index 000000000..f224f2546
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/SdMmcHostController.h
@@ -0,0 +1,57 @@
+/** @file
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EDKII_PEI_SD_MMC_HOST_CONTROLLER_PPI_H_
+#define _EDKII_PEI_SD_MMC_HOST_CONTROLLER_PPI_H_
+
+///
+/// Global ID for the EDKII_SD_MMC_HOST_CONTROLLER_PPI.
+///
+#define EDKII_SD_MMC_HOST_CONTROLLER_PPI_GUID \
+ { \
+ 0xb30dfeed, 0x947f, 0x4396, { 0xb1, 0x5a, 0xdf, 0xbd, 0xb9, 0x16, 0xdc, 0x24 } \
+ }
+
+///
+/// Forward declaration for the SD_MMC_HOST_CONTROLLER_PPI.
+///
+typedef struct _EDKII_SD_MMC_HOST_CONTROLLER_PPI EDKII_SD_MMC_HOST_CONTROLLER_PPI;
+
+/**
+ Get the MMIO base address of SD/MMC host controller.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] ControllerId The ID of the SD/MMC host controller.
+ @param[in,out] MmioBar The pointer to store the array of available
+ SD/MMC host controller slot MMIO base addresses.
+ The entry number of the array is specified by BarNum.
+ @param[out] BarNum The pointer to store the supported bar number.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_SD_MMC_HC_GET_MMIO_BAR)(
+ IN EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ IN OUT UINTN **MmioBar,
+ OUT UINT8 *BarNum
+ );
+
+///
+/// This PPI contains a set of services to interact with the SD_MMC host controller.
+///
+struct _EDKII_SD_MMC_HOST_CONTROLLER_PPI {
+ EDKII_SD_MMC_HC_GET_MMIO_BAR GetSdMmcHcMmioBar;
+};
+
+extern EFI_GUID gEdkiiPeiSdMmcHostControllerPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/SecPerformance.h b/roms/edk2/MdeModulePkg/Include/Ppi/SecPerformance.h
new file mode 100644
index 000000000..cbdaccdb9
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/SecPerformance.h
@@ -0,0 +1,60 @@
+/** @file
+ Defines the interface to convey performance information from SEC phase to PEI.
+
+Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_SEC_PERFORMANCE_PPI_H_
+#define _PEI_SEC_PERFORMANCE_PPI_H_
+
+#define PEI_SEC_PERFORMANCE_PPI_GUID \
+ { \
+ 0x0ecc666b, 0x4662, 0x47f9, {0x9d, 0xd5, 0xd0, 0x96, 0xff, 0x7d, 0xa4, 0x9e } \
+ }
+
+typedef struct _PEI_SEC_PERFORMANCE_PPI PEI_SEC_PERFORMANCE_PPI;
+
+///
+/// Performance data collected in SEC phase.
+///
+typedef struct {
+ UINT64 ResetEnd; ///< Timer value logged at the beginning of firmware image execution, in unit of nanosecond.
+} FIRMWARE_SEC_PERFORMANCE;
+
+/**
+ This interface conveys performance information out of the Security (SEC) phase into PEI.
+
+ This service is published by the SEC phase. The SEC phase handoff has an optional
+ EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
+ PEI Foundation. As such, if the platform supports collecting performance data in SEC,
+ this information is encapsulated into the data structure abstracted by this service.
+ This information is collected for the boot-strap processor (BSP) on IA-32.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
+ @param[out] Performance The pointer to performance data collected in SEC phase.
+
+ @retval EFI_SUCCESS The performance data was successfully returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *GET_SEC_PERFORMANCE) (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SEC_PERFORMANCE_PPI *This,
+ OUT FIRMWARE_SEC_PERFORMANCE *Performance
+ );
+
+///
+/// This PPI provides function to get performance data collected in SEC phase.
+///
+struct _PEI_SEC_PERFORMANCE_PPI {
+ GET_SEC_PERFORMANCE GetPerformance;
+};
+
+extern EFI_GUID gPeiSecPerformancePpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/SerialPortPei.h b/roms/edk2/MdeModulePkg/Include/Ppi/SerialPortPei.h
new file mode 100644
index 000000000..001611492
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/SerialPortPei.h
@@ -0,0 +1,20 @@
+/** @file
+ PPI that is installed after the initialization of a serial stream device
+ is complete.
+
+ Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __PEI_SERIAL_PORT_PPI_H__
+#define __PEI_SERIAL_PORT_PPI_H__
+
+#define PEI_SERIAL_PORT_PPI \
+ { \
+ 0x490e9d85, 0x8aef, 0x4193, { 0x8e, 0x56, 0xf7, 0x34, 0xa9, 0xff, 0xac, 0x8b } \
+ }
+
+extern EFI_GUID gPeiSerialPortPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/SmmAccess.h b/roms/edk2/MdeModulePkg/Include/Ppi/SmmAccess.h
new file mode 100644
index 000000000..b920f599c
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/SmmAccess.h
@@ -0,0 +1,139 @@
+/** @file
+ EFI SMM Access PPI definition.
+
+ This PPI is used to control the visibility of the SMRAM on the platform.
+ It abstracts the location and characteristics of SMRAM. The expectation is
+ that the north bridge or memory controller would publish this PPI.
+
+ The principal functionality found in the memory controller includes the following:
+ - Exposing the SMRAM to all non-SMM agents, or the "open" state
+ - Shrouding the SMRAM to all but the SMM agents, or the "closed" state
+ - Preserving the system integrity, or "locking" the SMRAM, such that the settings cannot be
+ perturbed by either boot service or runtime agents
+
+Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SMM_ACCESS_PPI_H_
+#define _SMM_ACCESS_PPI_H_
+
+#define PEI_SMM_ACCESS_PPI_GUID \
+ { 0x268f33a9, 0xcccd, 0x48be, { 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 }}
+
+typedef struct _PEI_SMM_ACCESS_PPI PEI_SMM_ACCESS_PPI;
+
+/**
+ Opens the SMRAM area to be accessible by a PEIM driver.
+
+ This function "opens" SMRAM so that it is visible while not inside of SMM. The function should
+ return EFI_UNSUPPORTED if the hardware does not support hiding of SMRAM. The function
+ should return EFI_DEVICE_ERROR if the SMRAM configuration is locked.
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param This The pointer to the SMM Access Interface.
+ @param DescriptorIndex The region of SMRAM to Open.
+
+ @retval EFI_SUCCESS The region was successfully opened.
+ @retval EFI_DEVICE_ERROR The region could not be opened because locked by chipset.
+ @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_OPEN)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_ACCESS_PPI *This,
+ IN UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+
+ This function "closes" SMRAM so that it is not visible while outside of SMM. The function should
+ return EFI_UNSUPPORTED if the hardware does not support hiding of SMRAM.
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param This The pointer to the SMM Access Interface.
+ @param DescriptorIndex The region of SMRAM to Close.
+
+ @retval EFI_SUCCESS The region was successfully closed.
+ @retval EFI_DEVICE_ERROR The region could not be closed because locked by chipset.
+ @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_CLOSE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_ACCESS_PPI *This,
+ IN UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+
+ This function prohibits access to the SMRAM region. This function is usually implemented such
+ that it is a write-once operation.
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param This The pointer to the SMM Access Interface.
+ @param DescriptorIndex The region of SMRAM to Close.
+
+ @retval EFI_SUCCESS The region was successfully locked.
+ @retval EFI_DEVICE_ERROR The region could not be locked because at least
+ one range is still open.
+ @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_LOCK)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_ACCESS_PPI *This,
+ IN UINTN DescriptorIndex
+ );
+
+/**
+ Queries the memory controller for the possible regions that will support SMRAM.
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param This The pointer to the SmmAccessPpi Interface.
+ @param SmramMapSize The pointer to the variable containing size of the
+ buffer to contain the description information.
+ @param SmramMap The buffer containing the data describing the Smram
+ region descriptors.
+
+ @retval EFI_BUFFER_TOO_SMALL The user did not provide a sufficient buffer.
+ @retval EFI_SUCCESS The user provided a sufficiently-sized buffer.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_CAPABILITIES)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_ACCESS_PPI *This,
+ IN OUT UINTN *SmramMapSize,
+ IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
+ );
+
+///
+/// EFI SMM Access PPI is used to control the visibility of the SMRAM on the platform.
+/// It abstracts the location and characteristics of SMRAM. The platform should report
+/// all MMRAM via PEI_SMM_ACCESS_PPI. The expectation is that the north bridge or
+/// memory controller would publish this PPI.
+///
+struct _PEI_SMM_ACCESS_PPI {
+ PEI_SMM_OPEN Open;
+ PEI_SMM_CLOSE Close;
+ PEI_SMM_LOCK Lock;
+ PEI_SMM_CAPABILITIES GetCapabilities;
+ BOOLEAN LockState;
+ BOOLEAN OpenState;
+};
+
+extern EFI_GUID gPeiSmmAccessPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/SmmCommunication.h b/roms/edk2/MdeModulePkg/Include/Ppi/SmmCommunication.h
new file mode 100644
index 000000000..30922cf32
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/SmmCommunication.h
@@ -0,0 +1,57 @@
+/** @file
+ EFI SMM Communication PPI definition.
+
+ This Ppi provides a means of communicating between PEIM and SMI
+ handlers inside of SMM.
+ This Ppi is produced and consumed only in S3 resume boot path.
+ It is NOT available in normal boot path.
+
+Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef _SMM_COMMUNICATION_PPI_H_
+#define _SMM_COMMUNICATION_PPI_H_
+
+#define EFI_PEI_SMM_COMMUNICATION_PPI_GUID \
+ { \
+ 0xae933e1c, 0xcc47, 0x4e38, { 0x8f, 0xe, 0xe2, 0xf6, 0x1d, 0x26, 0x5, 0xdf } \
+ }
+
+typedef struct _EFI_PEI_SMM_COMMUNICATION_PPI EFI_PEI_SMM_COMMUNICATION_PPI;
+
+/**
+ Communicates with a registered handler.
+
+ This function provides a service to send and receive messages from a registered UEFI service.
+
+ @param[in] This The EFI_PEI_SMM_COMMUNICATION_PPI instance.
+ @param[in] CommBuffer A pointer to the buffer to convey into SMRAM.
+ @param[in] CommSize The size of the data buffer being passed in.On exit, the size of data
+ being returned. Zero if the handler does not wish to reply with any data.
+
+ @retval EFI_SUCCESS The message was successfully posted.
+ @retval EFI_INVALID_PARAMETER The CommBuffer was NULL.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMM_COMMUNICATE)(
+ IN CONST EFI_PEI_SMM_COMMUNICATION_PPI *This,
+ IN OUT VOID *CommBuffer,
+ IN OUT UINTN *CommSize
+ );
+
+///
+/// EFI SMM Communication Protocol provides runtime services for communicating
+/// between DXE drivers and a registered SMI handler.
+///
+struct _EFI_PEI_SMM_COMMUNICATION_PPI {
+ EFI_PEI_SMM_COMMUNICATE Communicate;
+};
+
+extern EFI_GUID gEfiPeiSmmCommunicationPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/SmmControl.h b/roms/edk2/MdeModulePkg/Include/Ppi/SmmControl.h
new file mode 100644
index 000000000..855cfec6b
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/SmmControl.h
@@ -0,0 +1,89 @@
+/** @file
+ EFI SMM Control PPI definition.
+
+ This PPI is used to initiate SMI/PMI activations. This protocol could be published by either:
+ - A processor driver to abstract the SMI/PMI IPI
+ - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an
+ Intel chipset
+ Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
+ event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based
+ systems.
+
+ Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef _SMM_CONTROL_PPI_H_
+#define _SMM_CONTROL_PPI_H_
+
+#define PEI_SMM_CONTROL_PPI_GUID \
+ { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }
+
+typedef struct _PEI_SMM_CONTROL_PPI PEI_SMM_CONTROL_PPI;
+
+/**
+ Invokes SMI activation from either the preboot or runtime environment.
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param This The PEI_SMM_CONTROL_PPI instance.
+ @param ArgumentBuffer The optional sized data to pass into the protocol activation.
+ @param ArgumentBufferSize The optional size of the data.
+ @param Periodic An optional mechanism to periodically repeat activation.
+ @param ActivationInterval An optional parameter to repeat at this period one
+ time or, if the Periodic Boolean is set, periodically.
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+ @retval EFI_DEVICE_ERROR The timing is unsupported.
+ @retval EFI_INVALID_PARAMETER The activation period is unsupported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_ACTIVATE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_CONTROL_PPI * This,
+ IN OUT INT8 *ArgumentBuffer OPTIONAL,
+ IN OUT UINTN *ArgumentBufferSize OPTIONAL,
+ IN BOOLEAN Periodic OPTIONAL,
+ IN UINTN ActivationInterval OPTIONAL
+ );
+
+/**
+ Clears any system state that was created in response to the Active call.
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param This The PEI_SMM_CONTROL_PPI instance.
+ @param Periodic Optional parameter to repeat at this period one
+ time or, if the Periodic Boolean is set, periodically.
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+ @retval EFI_DEVICE_ERROR The source could not be cleared.
+ @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_DEACTIVATE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_CONTROL_PPI * This,
+ IN BOOLEAN Periodic OPTIONAL
+ );
+
+///
+/// PEI SMM Control PPI is used to initiate SMI/PMI activations. This protocol could be published by either:
+/// - A processor driver to abstract the SMI/PMI IPI
+/// - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an
+/// Intel chipset
+///
+struct _PEI_SMM_CONTROL_PPI {
+ PEI_SMM_ACTIVATE Trigger;
+ PEI_SMM_DEACTIVATE Clear;
+};
+
+extern EFI_GUID gPeiSmmControlPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/StorageSecurityCommand.h b/roms/edk2/MdeModulePkg/Include/Ppi/StorageSecurityCommand.h
new file mode 100644
index 000000000..89c7edea9
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/StorageSecurityCommand.h
@@ -0,0 +1,277 @@
+/** @file
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EDKII_STORAGE_SECURITY_COMMAND_PPI_H_
+#define _EDKII_STORAGE_SECURITY_COMMAND_PPI_H_
+
+#include <Protocol/DevicePath.h>
+
+///
+/// Global ID for the EDKII_PEI_STORAGE_SECURITY_CMD_PPI.
+///
+#define EDKII_PEI_STORAGE_SECURITY_CMD_PPI_GUID \
+ { \
+ 0x35de0b4e, 0x30fb, 0x46c3, { 0xbd, 0x84, 0x1f, 0xdb, 0xa1, 0x58, 0xbb, 0x56 } \
+ }
+
+//
+// Forward declaration for the EDKII_PEI_STORAGE_SECURITY_CMD_PPI.
+//
+typedef struct _EDKII_PEI_STORAGE_SECURITY_CMD_PPI EDKII_PEI_STORAGE_SECURITY_CMD_PPI;
+
+//
+// Revision The revision to which the Storage Security Command interface adheres.
+// All future revisions must be backwards compatible.
+// If a future version is not back wards compatible it is not the same GUID.
+//
+#define EDKII_STORAGE_SECURITY_PPI_REVISION 0x00010000
+
+
+/**
+ Gets the count of storage security devices that one specific driver detects.
+
+ @param[in] This The PPI instance pointer.
+ @param[out] NumberofDevices The number of storage security devices discovered.
+
+ @retval EFI_SUCCESS The operation performed successfully.
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_STORAGE_SECURITY_GET_NUMBER_DEVICES) (
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ OUT UINTN *NumberofDevices
+ );
+
+/**
+ Gets the device path of a specific storage security device.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] DeviceIndex Specifies the storage security device to which
+ the function wants to talk. Because the driver
+ that implements Storage Security Command PPIs
+ will manage multiple storage devices, the PPIs
+ that want to talk to a single device must specify
+ the device index that was assigned during the
+ enumeration process. This index is a number from
+ one to NumberofDevices.
+ @param[out] DevicePathLength The length of the device path in bytes specified
+ by DevicePath.
+ @param[out] DevicePath The device path of storage security device.
+ This field re-uses EFI Device Path Protocol as
+ defined by Section 10.2 EFI Device Path Protocol
+ of UEFI 2.7 Specification.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER DevicePathLength or DevicePath is NULL.
+ @retval EFI_NOT_FOUND The specified storage security device not found.
+ @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_STORAGE_SECURITY_GET_DEVICE_PATH) (
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ );
+
+/**
+ Send a security protocol command to a device that receives data and/or the result
+ of one or more commands sent by SendData.
+
+ The ReceiveData function sends a security protocol command to the given DeviceIndex.
+ The security protocol command sent is defined by SecurityProtocolId and contains
+ the security protocol specific data SecurityProtocolSpecificData. The function
+ returns the data from the security protocol command in PayloadBuffer.
+
+ For devices supporting the SCSI command set, the security protocol command is sent
+ using the SECURITY PROTOCOL IN command defined in SPC-4.
+
+ For devices supporting the ATA command set, the security protocol command is sent
+ using one of the TRUSTED RECEIVE commands defined in ATA8-ACS if PayloadBufferSize
+ is non-zero.
+
+ If the PayloadBufferSize is zero, the security protocol command is sent using the
+ Trusted Non-Data command defined in ATA8-ACS.
+
+ If PayloadBufferSize is too small to store the available data from the security
+ protocol command, the function shall copy PayloadBufferSize bytes into the
+ PayloadBuffer and return EFI_WARN_BUFFER_TOO_SMALL.
+
+ If PayloadBuffer or PayloadTransferSize is NULL and PayloadBufferSize is non-zero,
+ the function shall return EFI_INVALID_PARAMETER.
+
+ If the given DeviceIndex does not support security protocol commands, the function
+ shall return EFI_UNSUPPORTED.
+
+ If the security protocol fails to complete within the Timeout period, the function
+ shall return EFI_TIMEOUT.
+
+ If the security protocol command completes without an error, the function shall
+ return EFI_SUCCESS. If the security protocol command completes with an error, the
+ function shall return EFI_DEVICE_ERROR.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] DeviceIndex Specifies the storage security device to which the
+ function wants to talk. Because the driver that
+ implements Storage Security Command PPIs will manage
+ multiple storage devices, the PPIs that want to talk
+ to a single device must specify the device index
+ that was assigned during the enumeration process.
+ This index is a number from one to NumberofDevices.
+ @param[in] Timeout The timeout, in 100ns units, to use for the execution
+ of the security protocol command. A Timeout value
+ of 0 means that this function will wait indefinitely
+ for the security protocol command to execute. If
+ Timeout is greater than zero, then this function
+ will return EFI_TIMEOUT if the time required to
+ execute the receive data command is greater than
+ Timeout.
+ @param[in] SecurityProtocolId
+ The value of the "Security Protocol" parameter of
+ the security protocol command to be sent.
+ @param[in] SecurityProtocolSpecificData
+ The value of the "Security Protocol Specific"
+ parameter of the security protocol command to be
+ sent.
+ @param[in] PayloadBufferSize
+ Size in bytes of the payload data buffer.
+ @param[out] PayloadBuffer A pointer to a destination buffer to store the
+ security protocol command specific payload data
+ for the security protocol command. The caller is
+ responsible for having either implicit or explicit
+ ownership of the buffer.
+ @param[out] PayloadTransferSize
+ A pointer to a buffer to store the size in bytes
+ of the data written to the payload data buffer.
+
+ @retval EFI_SUCCESS The security protocol command completed
+ successfully.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The PayloadBufferSize was too small to
+ store the available data from the device.
+ The PayloadBuffer contains the truncated
+ data.
+ @retval EFI_UNSUPPORTED The given DeviceIndex does not support
+ security protocol commands.
+ @retval EFI_DEVICE_ERROR The security protocol command completed
+ with an error.
+ @retval EFI_INVALID_PARAMETER The PayloadBuffer or PayloadTransferSize
+ is NULL and PayloadBufferSize is non-zero.
+ @retval EFI_TIMEOUT A timeout occurred while waiting for the
+ security protocol command to execute.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_STORAGE_SECURITY_RECEIVE_DATA) (
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ IN UINTN DeviceIndex,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
+ );
+
+/**
+ Send a security protocol command to a device.
+
+ The SendData function sends a security protocol command containing the payload
+ PayloadBuffer to the given DeviceIndex. The security protocol command sent is
+ defined by SecurityProtocolId and contains the security protocol specific data
+ SecurityProtocolSpecificData. If the underlying protocol command requires a
+ specific padding for the command payload, the SendData function shall add padding
+ bytes to the command payload to satisfy the padding requirements.
+
+ For devices supporting the SCSI command set, the security protocol command is
+ sent using the SECURITY PROTOCOL OUT command defined in SPC-4.
+
+ For devices supporting the ATA command set, the security protocol command is
+ sent using one of the TRUSTED SEND commands defined in ATA8-ACS if PayloadBufferSize
+ is non-zero. If the PayloadBufferSize is zero, the security protocol command
+ is sent using the Trusted Non-Data command defined in ATA8-ACS.
+
+ If PayloadBuffer is NULL and PayloadBufferSize is non-zero, the function shall
+ return EFI_INVALID_PARAMETER.
+
+ If the given DeviceIndex does not support security protocol commands, the function
+ shall return EFI_UNSUPPORTED.
+
+ If the security protocol fails to complete within the Timeout period, the function
+ shall return EFI_TIMEOUT.
+
+ If the security protocol command completes without an error, the function shall
+ return EFI_SUCCESS. If the security protocol command completes with an error,
+ the functio shall return EFI_DEVICE_ERROR.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] DeviceIndex The ID of the device.
+ @param[in] Timeout The timeout, in 100ns units, to use for the execution
+ of the security protocol command. A Timeout value
+ of 0 means that this function will wait indefinitely
+ for the security protocol command to execute. If
+ Timeout is greater than zero, then this function
+ will return EFI_TIMEOUT if the time required to
+ execute the receive data command is greater than
+ Timeout.
+ @param[in] SecurityProtocolId
+ The value of the "Security Protocol" parameter of
+ the security protocol command to be sent.
+ @param[in] SecurityProtocolSpecificData
+ The value of the "Security Protocol Specific"
+ parameter of the security protocol command to be
+ sent.
+ @param[in] PayloadBufferSize Size in bytes of the payload data buffer.
+ @param[in] PayloadBuffer A pointer to a destination buffer to store the
+ security protocol command specific payload data
+ for the security protocol command.
+
+ @retval EFI_SUCCESS The security protocol command completed successfully.
+ @retval EFI_UNSUPPORTED The given DeviceIndex does not support security
+ protocol commands.
+ @retval EFI_DEVICE_ERROR The security protocol command completed with
+ an error.
+ @retval EFI_INVALID_PARAMETER The PayloadBuffer is NULL and PayloadBufferSize
+ is non-zero.
+ @retval EFI_TIMEOUT A timeout occurred while waiting for the security
+ protocol command to execute.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_STORAGE_SECURITY_SEND_DATA) (
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ IN UINTN DeviceIndex,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ IN VOID *PayloadBuffer
+ );
+
+//
+// EDKII_PEI_STORAGE_SECURITY_CMD_PPI contains a set of services to send security
+// protocol commands to a mass storage device. Two types of security protocol
+// commands are supported. SendData sends a command with data to a device.
+// ReceiveData sends a command that receives data and/or the result of one or
+// more commands sent by SendData.
+//
+struct _EDKII_PEI_STORAGE_SECURITY_CMD_PPI {
+ UINT64 Revision;
+ EDKII_PEI_STORAGE_SECURITY_GET_NUMBER_DEVICES GetNumberofDevices;
+ EDKII_PEI_STORAGE_SECURITY_GET_DEVICE_PATH GetDevicePath;
+ EDKII_PEI_STORAGE_SECURITY_RECEIVE_DATA ReceiveData;
+ EDKII_PEI_STORAGE_SECURITY_SEND_DATA SendData;
+};
+
+extern EFI_GUID gEdkiiPeiStorageSecurityCommandPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/UfsHostController.h b/roms/edk2/MdeModulePkg/Include/Ppi/UfsHostController.h
new file mode 100644
index 000000000..84ee785ed
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/UfsHostController.h
@@ -0,0 +1,53 @@
+/** @file
+
+Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EDKII_PEI_UFS_HOST_CONTROLLER_PPI_H_
+#define _EDKII_PEI_UFS_HOST_CONTROLLER_PPI_H_
+
+///
+/// Global ID for the EDKII_UFS_HOST_CONTROLLER_PPI.
+///
+#define EDKII_UFS_HOST_CONTROLLER_PPI_GUID \
+ { \
+ 0xdc54b283, 0x1a77, 0x4cd6, { 0x83, 0xbb, 0xfd, 0xda, 0x46, 0x9a, 0x2e, 0xc6 } \
+ }
+
+///
+/// Forward declaration for the UFS_HOST_CONTROLLER_PPI.
+///
+typedef struct _EDKII_UFS_HOST_CONTROLLER_PPI EDKII_UFS_HOST_CONTROLLER_PPI;
+
+/**
+ Get the MMIO base address of UFS host controller.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] ControllerId The ID of the UFS host controller.
+ @param[out] MmioBar Pointer to the UFS host controller MMIO base address.
+
+ @retval EFI_SUCCESS The operation succeeds.
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_UFS_HC_GET_MMIO_BAR)(
+ IN EDKII_UFS_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ OUT UINTN *MmioBar
+ );
+
+///
+/// This PPI contains a set of services to interact with the UFS host controller.
+///
+struct _EDKII_UFS_HOST_CONTROLLER_PPI {
+ EDKII_UFS_HC_GET_MMIO_BAR GetUfsHcMmioBar;
+};
+
+extern EFI_GUID gEdkiiPeiUfsHostControllerPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/Usb2HostController.h b/roms/edk2/MdeModulePkg/Include/Ppi/Usb2HostController.h
new file mode 100644
index 000000000..f93af9ae0
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/Usb2HostController.h
@@ -0,0 +1,262 @@
+/** @file
+ Defines the USB Host Controller PPI that provides I/O services for a USB Host
+ Controller that may be used to access recovery devices. These interfaces are
+ modeled on the UEFI 2.3 specification EFI_USB2_HOST_CONTROLLER_PROTOCOL.
+ Refer to section 16.1 of the UEFI 2.3 Specification for more information on
+ these interfaces.
+
+Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved. <BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_USB2_HOST_CONTROLLER_PPI_H_
+#define _PEI_USB2_HOST_CONTROLLER_PPI_H_
+
+#include <Protocol/Usb2HostController.h>
+
+///
+/// Global ID for the PEI_USB2_HOST_CONTROLLER_PPI.
+///
+#define PEI_USB2_HOST_CONTROLLER_PPI_GUID \
+ { \
+ 0xa7d09fe1, 0x74d4, 0x4ba5, { 0x84, 0x7c, 0x12, 0xed, 0x5b, 0x19, 0xad, 0xe4 } \
+ }
+
+///
+/// Forward declaration for the PEI_USB2_HOST_CONTROLLER_PPI.
+///
+typedef struct _PEI_USB2_HOST_CONTROLLER_PPI PEI_USB2_HOST_CONTROLLER_PPI;
+
+/**
+ Initiate a USB control transfer using a specific USB Host controller on the USB bus.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB2_HOST_CONTROLLER_PPI.
+ @param[in] DeviceAddress Represents the address of the target device
+ on the USB.
+ @param[in] DeviceSpeed Indicates device speed.
+ @param[in] MaximumPacketLength Indicates the maximum packet size that the
+ default control transfer
+ endpoint is capable of sending or receiving.
+ @param[in] Request A pointer to the USB device request that
+ will be sent to the USB device.
+ @param[in] TransferDirection Specifies the data direction for the transfer.
+ There are three values available:
+ EfiUsbDataIn, EfiUsbDataOut and EfiUsbNoData.
+ @param[in,out] Data A pointer to the buffer of data that will
+ be transmitted to USB device or
+ received from USB device.
+ @param[in,out] DataLength On input, indicates the size, in bytes, of
+ the data buffer specified by Data.
+ On output, indicates the amount of data
+ actually transferred.
+ @param[in] TimeOut Indicates the maximum time, in milliseconds,
+ that the transfer is allowed to complete.
+ If Timeout is 0, then the caller must wait for
+ the function to be completed until EFI_SUCCESS
+ or EFI_DEVICE_ERROR is returned.
+ @param[in] Translator A pointer to the transaction translator data.
+ @param[out] TransferResult A pointer to the detailed result information
+ generated by this control transfer.
+
+ @retval EFI_SUCCESS The control transfer was completed successfully.
+ @retval EFI_DEVICE_ERROR The control transfer failed due to host controller
+ or device error.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The control transfer could not be completed due to a lack of resources.
+ @retval EFI_TIMEOUT The control transfer failed due to timeout.
+
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB2_HOST_CONTROLLER_CONTROL_TRANSFER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data OPTIONAL,
+ IN OUT UINTN *DataLength OPTIONAL,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Initiate a USB bulk transfer using a specific USB Host controller on the USB bus.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB2_HOST_CONTROLLER_PPI.
+ @param[in] DeviceAddress Represents the address of the target device
+ on the USB.
+ @param[in] EndPointAddress The combination of an endpoint number and
+ an endpoint direction of the target USB device.
+ @param[in] DeviceSpeed Indicates device speed.
+ @param[in] MaximumPacketLength Indicates the maximum packet size the target
+ endpoint is capable of sending or receiving.
+ @param[in,out] Data Array of pointers to the buffers of data
+ that will be transmitted to USB device or
+ received from USB device.
+ @param[in,out] DataLength When input, indicates the size, in bytes, of
+ the data buffers specified by Data. When output,
+ indicates the data size actually transferred.
+ @param[in,out] DataToggle A pointer to the data toggle value.
+ @param[in] TimeOut Indicates the maximum time, in milliseconds,
+ in which the transfer is allowed to complete.
+ If Timeout is 0, then the caller must wait for
+ the function to be completed until EFI_SUCCESS
+ or EFI_DEVICE_ERROR is returned.
+ @param[in] Translator A pointer to the transaction translator data.
+ @param[out] TransferResult A pointer to the detailed result information
+ of the bulk transfer.
+
+ @retval EFI_SUCCESS The bulk transfer was completed successfully.
+ @retval EFI_DEVICE_ERROR The bulk transfer failed due to host controller or device error.
+ Caller should check TransferResult for detailed error information.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The bulk transfer could not be submitted due to a lack of resources.
+ @retval EFI_TIMEOUT The bulk transfer failed due to timeout.
+
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB2_HOST_CONTROLLER_BULK_TRANSFER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Retrieves the number of root hub ports.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB2_HOST_CONTROLLER_PPI.
+ @param[out] PortNumber The pointer to the number of the root hub ports.
+
+ @retval EFI_SUCCESS The port number was retrieved successfully.
+ @retval EFI_INVALID_PARAMETER PortNumber is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB2_HOST_CONTROLLER_GET_ROOTHUB_PORT_NUMBER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
+ );
+
+/**
+ Retrieves the current status of a USB root hub port.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB2_HOST_CONTROLLER_PPI.
+ @param[in] PortNumber Specifies the root hub port from which the status is
+ to be retrieved.
+ This value is zero based.
+ @param[out] PortStatus A pointer to the current port status bits and port
+ status change bits.
+
+ @retval EFI_SUCCESS The status of the USB root hub port specified by
+ PortNumber was returned in PortStatus.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB2_HOST_CONTROLLER_GET_ROOTHUB_PORT_STATUS)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
+ );
+
+/**
+ Sets a feature for the specified root hub port.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB2_HOST_CONTROLLER_PPI.
+ @param[in] PortNumber Specifies the root hub port whose feature is requested
+ to be set. This value is zero based.
+ @param[in] PortFeature Indicates the feature selector associated with the feature
+ set request.
+
+ @retval EFI_SUCCESS The feature specified by PortFeature was set for
+ the USB root hub port specified by PortNumber.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid
+ for this function.
+ @retval EFI_TIMEOUT The time out occurred
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB2_HOST_CONTROLLER_SET_ROOTHUB_PORT_FEATURE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ );
+
+/**
+ Clears a feature for the specified root hub port.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB2_HOST_CONTROLLER_PPI.
+ @param[in] PortNumber Specifies the root hub port whose feature is
+ requested to be cleared.
+ @param[in] PortFeature Indicates the feature selector associated with the
+ feature clear request.
+
+ @return EFI_SUCCESS The feature specified by PortFeature was cleared
+ for the USB root hub port specified by PortNumber.
+ @return EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB2_HOST_CONTROLLER_CLEAR_ROOTHUB_PORT_FEATURE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ );
+
+///
+/// This PPI contains a set of services to interact with the USB host controller.
+/// These interfaces are modeled on the UEFI 2.3 specification protocol
+/// EFI_USB2_HOST_CONTROLLER_PROTOCOL. Refer to section 16.1 of the UEFI 2.3
+/// Specification for more information on these interfaces.
+///
+struct _PEI_USB2_HOST_CONTROLLER_PPI {
+ PEI_USB2_HOST_CONTROLLER_CONTROL_TRANSFER ControlTransfer;
+ PEI_USB2_HOST_CONTROLLER_BULK_TRANSFER BulkTransfer;
+ PEI_USB2_HOST_CONTROLLER_GET_ROOTHUB_PORT_NUMBER GetRootHubPortNumber;
+ PEI_USB2_HOST_CONTROLLER_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
+ PEI_USB2_HOST_CONTROLLER_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
+ PEI_USB2_HOST_CONTROLLER_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
+};
+
+extern EFI_GUID gPeiUsb2HostControllerPpiGuid;
+
+#endif
+
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/UsbController.h b/roms/edk2/MdeModulePkg/Include/Ppi/UsbController.h
new file mode 100644
index 000000000..664c7a21a
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/UsbController.h
@@ -0,0 +1,87 @@
+/** @file
+ Define APIs to retrieve USB Host Controller Info such as controller type and
+ I/O Port Base Address.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_USB_CONTROLLER_PPI_H_
+#define _PEI_USB_CONTROLLER_PPI_H_
+
+///
+/// Global ID for the PEI_USB_CONTROLLER_PPI.
+///
+#define PEI_USB_CONTROLLER_PPI_GUID \
+ { \
+ 0x3bc1f6de, 0x693e, 0x4547,{ 0xa3, 0x0, 0x21, 0x82, 0x3c, 0xa4, 0x20, 0xb2} \
+ }
+
+///
+/// Forward declaration for the PEI_USB_CONTROLLER_PPI.
+///
+typedef struct _PEI_USB_CONTROLLER_PPI PEI_USB_CONTROLLER_PPI;
+
+///
+/// This bit is used in the ControllerType return parameter of GetUsbController()
+/// to identify the USB Host Controller type as UHCI
+///
+#define PEI_UHCI_CONTROLLER 0x01
+
+///
+/// This bit is used in the ControllerType return parameter of GetUsbController()
+/// to identify the USB Host Controller type as OHCI
+///
+#define PEI_OHCI_CONTROLLER 0x02
+
+///
+/// This bit is used in the ControllerType return parameter of GetUsbController()
+/// to identify the USB Host Controller type as EHCI
+///
+#define PEI_EHCI_CONTROLLER 0x03
+
+///
+/// This bit is used in the ControllerType return parameter of GetUsbController()
+/// to identify the USB Host Controller type as XHCI
+///
+#define PEI_XHCI_CONTROLLER 0x04
+
+/**
+ Retrieve USB Host Controller Info such as controller type and I/O Base Address.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_USB_CONTROLLER_PPI.
+ @param[in] ControllerId The ID of the USB controller.
+ @param[out] ControllerType On output, returns the type of the USB controller.
+ @param[out] BaseAddress On output, returns the base address of UHCI's I/O ports
+ if UHCI is enabled or the base address of EHCI's MMIO
+ if EHCI is enabled.
+
+ @retval EFI_SUCCESS USB controller attributes were returned successfully.
+ @retval EFI_INVALID_PARAMETER ControllerId is greater than the maximum number
+ of USB controller supported by this platform.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_GET_USB_CONTROLLER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_CONTROLLER_PPI *This,
+ IN UINT8 UsbControllerId,
+ OUT UINTN *ControllerType,
+ OUT UINTN *BaseAddress
+ );
+
+///
+/// This PPI contains a single service to retrieve the USB Host Controller type
+/// and the base address of the I/O ports used to access the USB Host Controller.
+///
+struct _PEI_USB_CONTROLLER_PPI {
+ PEI_GET_USB_CONTROLLER GetUsbController;
+};
+
+extern EFI_GUID gPeiUsbControllerPpiGuid;
+
+#endif
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/UsbHostController.h b/roms/edk2/MdeModulePkg/Include/Ppi/UsbHostController.h
new file mode 100644
index 000000000..4dbdb4456
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/UsbHostController.h
@@ -0,0 +1,250 @@
+/** @file
+ Defines the USB Host Controller PPI that provides I/O services for a USB Host
+ Controller that may be used to access recovery devices. These interfaces are
+ modeled on the UEFI 2.3 specification EFI_USB2_HOST_CONTROLLER_PROTOCOL.
+ Refer to section 16.1 of the UEFI 2.3 Specification for more information on
+ these interfaces.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_USB_HOST_CONTROLLER_PPI_H_
+#define _PEI_USB_HOST_CONTROLLER_PPI_H_
+
+#include <Protocol/Usb2HostController.h>
+
+///
+/// Global ID for the PEI_USB_HOST_CONTROLLER_PPI.
+///
+#define PEI_USB_HOST_CONTROLLER_PPI_GUID \
+ { \
+ 0x652b38a9, 0x77f4, 0x453f, { 0x89, 0xd5, 0xe7, 0xbd, 0xc3, 0x52, 0xfc, 0x53} \
+ }
+
+///
+/// Forward declaration for the PEI_USB_HOST_CONTROLLER_PPI.
+///
+typedef struct _PEI_USB_HOST_CONTROLLER_PPI PEI_USB_HOST_CONTROLLER_PPI;
+
+/**
+ Initiate a USB control transfer using a specific USB Host controller on the USB bus.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB_HOST_CONTROLLER_PPI.
+ @param[in] DeviceAddress Represents the address of the target device
+ on the USB.
+ @param[in] DeviceSpeed Indicates device speed.
+ @param[in] MaximumPacketLength Indicates the maximum packet size that the
+ default control transfer
+ endpoint is capable of sending or receiving.
+ @param[in] Request A pointer to the USB device request that
+ will be sent to the USB device.
+ @param[in] TransferDirection Specifies the data direction for the transfer.
+ There are three values available:
+ EfiUsbDataIn, EfiUsbDataOut and EfiUsbNoData.
+ @param[in,out] Data A pointer to the buffer of data that will
+ be transmitted to USB device or
+ received from USB device.
+ @param[in,out] DataLength On input, indicates the size, in bytes, of
+ the data buffer specified by Data.
+ On output, indicates the amount of data
+ actually transferred.
+ @param[in] TimeOut Indicates the maximum time, in milliseconds,
+ that the transfer is allowed to complete.
+ If Timeout is 0, then the caller must wait for
+ the function to be completed until EFI_SUCCESS
+ or EFI_DEVICE_ERROR is returned.
+ @param[out] TransferResult A pointer to the detailed result information
+ generated by this control transfer.
+
+ @retval EFI_DEVICE_ERROR The control transfer failed due to host controller
+ or device error.
+ @retval EFI_SUCCESS The control transfer was completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_HOST_CONTROLLER_CONTROL_TRANSFER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINT8 MaximumPacketLength,
+ IN USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data OPTIONAL,
+ IN OUT UINTN *DataLength OPTIONAL,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Initiate a USB bulk transfer using a specific USB Host controller on the USB bus.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB_HOST_CONTROLLER_PPI.
+ @param[in] DeviceAddress Represents the address of the target device
+ on the USB.
+ @param[in] EndPointAddress The combination of an endpoint number and
+ an endpoint direction of the target USB device.
+ @param[in] MaximumPacketLength Indicates the maximum packet size the target
+ endpoint is capable of sending or receiving.
+ @param[in,out] Data Array of pointers to the buffers of data
+ that will be transmitted to USB device or
+ received from USB device.
+ @param[in,out] DataLength When input, indicates the size, in bytes, of
+ the data buffers specified by Data. When output,
+ indicates the data size actually transferred.
+ @param[in,out] DataToggle A pointer to the data toggle value.
+ @param[in] TimeOut Indicates the maximum time, in milliseconds,
+ in which the transfer is allowed to complete.
+ If Timeout is 0, then the caller must wait for
+ the function to be completed until EFI_SUCCESS
+ or EFI_DEVICE_ERROR is returned.
+ @param[out] TransferResult A pointer to the detailed result information
+ of the bulk transfer.
+
+ @retval EFI_SUCCESS The bulk transfer was completed successfully.
+ @retval EFI_DEVICE_ERROR The bulk transfer failed due to host controller or device error.
+ Caller should check TransferResult for detailed error information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_HOST_CONTROLLER_BULK_TRANSFER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Retrieves the number of root hub ports.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB_HOST_CONTROLLER_PPI.
+ @param[out] PortNumber The pointer to the number of the root hub ports.
+
+ @retval EFI_SUCCESS The port number was retrieved successfully.
+ @retval EFI_DEVICE_ERROR An error was encountered while attempting to retrieve
+ the port number.
+ @retval EFI_INVALID_PARAMETER PortNumber is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_NUMBER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
+ );
+
+/**
+ Retrieves the current status of a USB root hub port.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB_HOST_CONTROLLER_PPI.
+ @param[in] PortNumber Specifies the root hub port from which the status is
+ to be retrieved.
+ This value is zero based.
+ @param[out] PortStatus A pointer to the current port status bits and port
+ status change bits.
+
+ @retval EFI_SUCCESS The status of the USB root hub port specified by
+ PortNumber was returned in PortStatus.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_STATUS)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
+ );
+
+/**
+ Sets a feature for the specified root hub port.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB_HOST_CONTROLLER_PPI.
+ @param[in] PortNumber Specifies the root hub port whose feature is requested
+ to be set. This value is zero based.
+ @param[in] PortFeature Indicates the feature selector associated with the feature
+ set request.
+
+ @retval EFI_SUCCESS The feature specified by PortFeature was set for
+ the USB root hub port specified by PortNumber.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid
+ for this function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_HOST_CONTROLLER_SET_ROOTHUB_PORT_FEATURE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ );
+
+/**
+ Clears a feature for the specified root hub port.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
+ PEI_USB_HOST_CONTROLLER_PPI.
+ @param[in] PortNumber Specifies the root hub port whose feature is
+ requested to be cleared.
+ @param[in] PortFeature Indicates the feature selector associated with the
+ feature clear request.
+
+ @return EFI_SUCCESS The feature specified by PortFeature was cleared
+ for the USB root hub port specified by PortNumber.
+ @return EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
+ @return EFI_DEVICE_ERROR Can't read the register.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_HOST_CONTROLLER_CLEAR_ROOTHUB_PORT_FEATURE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ );
+
+///
+/// This PPI contains a set of services to interact with the USB host controller.
+/// These interfaces are modeled on the UEFI 2.3 specification protocol
+/// EFI_USB2_HOST_CONTROLLER_PROTOCOL. Refer to section 16.1 of the UEFI 2.3
+/// Specification for more information on these interfaces.
+///
+struct _PEI_USB_HOST_CONTROLLER_PPI {
+ PEI_USB_HOST_CONTROLLER_CONTROL_TRANSFER ControlTransfer;
+ PEI_USB_HOST_CONTROLLER_BULK_TRANSFER BulkTransfer;
+ PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_NUMBER GetRootHubPortNumber;
+ PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
+ PEI_USB_HOST_CONTROLLER_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
+ PEI_USB_HOST_CONTROLLER_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
+};
+
+extern EFI_GUID gPeiUsbHostControllerPpiGuid;
+
+#endif
+
diff --git a/roms/edk2/MdeModulePkg/Include/Ppi/UsbIo.h b/roms/edk2/MdeModulePkg/Include/Ppi/UsbIo.h
new file mode 100644
index 000000000..71f52f086
--- /dev/null
+++ b/roms/edk2/MdeModulePkg/Include/Ppi/UsbIo.h
@@ -0,0 +1,189 @@
+/** @file
+ Defines the PEI_USB_IO_PPI that the USB-related PEIM can use for I/O operations
+ on the USB BUS. This interface enables recovery from a
+ USB-class storage device, such as USB CD/DVD, USB hard drive, or USB FLASH
+ drive. These interfaces are modeled on the UEFI 2.3 specification EFI_USB_IO_PROTOCOL.
+ Refer to section 16.2.4 of the UEFI 2.3 Specification for more information on
+ these interfaces.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_USB_IO_PPI_H_
+#define _PEI_USB_IO_PPI_H_
+
+#include <Protocol/Usb2HostController.h>
+
+///
+/// Global ID for the PEI_USB_IO_PPI.
+///
+#define PEI_USB_IO_PPI_GUID \
+ { \
+ 0x7c29785c, 0x66b9, 0x49fc, { 0xb7, 0x97, 0x1c, 0xa5, 0x55, 0xe, 0xf2, 0x83} \
+ }
+
+///
+/// Forward declaration for the PEI_USB_IO_PPI.
+///
+typedef struct _PEI_USB_IO_PPI PEI_USB_IO_PPI;
+
+/**
+ Submits control transfer to a target USB device.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_USB_IO_PPI.
+ @param[in] Request A pointer to the USB device request that will be
+ sent to the USB device.
+ @param[in] Direction Specifies the data direction for the transfer. There
+ are three values available:
+ EfiUsbDataIn, EfiUsbDataOut and EfiUsbNoData.
+ @param[in] Timeout Indicates the maximum time, in milliseconds, that
+ the transfer is allowed to complete.
+ If Timeout is 0, then the caller must wait for the
+ function to be completed until EFI_SUCCESS or
+ EFI_DEVICE_ERROR is returned.
+ @param[in,out] Data A pointer to the buffer of data that will be
+ transmitted to or received from the USB device.
+ @param[in] DataLength On input, indicates the size, in bytes, of the data
+ buffer specified by Data.
+
+ @retval EFI_SUCCESS The control transfer was completed successfully.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The control transfer could not be completed due
+ to a lack of resources.
+ @retval EFI_TIMEOUT The control transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The control transfer failed due to host controller
+ or device error.
+ Caller should check TransferResult for detailed
+ error information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_CONTROL_TRANSFER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT32 Timeout,
+ IN OUT VOID *Data OPTIONAL,
+ IN UINTN DataLength OPTIONAL
+ );
+
+/**
+ Submits bulk transfer to a target USB device.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_USB_IO_PPI.
+ @param[in] DeviceEndpoint The endpoint address.
+ @param[in] Data The data buffer to be transfered.
+ @param[in] DataLength The length of data buffer.
+ @param[in] Timeout The timeout for the transfer, in milliseconds.
+ If Timeout is 0, then the caller must wait for the
+ function to be completed until EFI_SUCCESS or
+ EFI_DEVICE_ERROR is returned.
+
+ @retval EFI_SUCCESS The bulk transfer completed successfully.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The bulk transfer could not be completed due to
+ a lack of resources.
+ @retval EFI_TIMEOUT The bulk transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The bulk transfer failed due to host controller
+ or device error.
+ Caller should check TransferResult for detailed
+ error information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_BULK_TRANSFER)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout
+ );
+
+/**
+ Get interface descriptor from a USB device.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_USB_IO_PPI.
+ @param[in] InterfaceDescriptor The interface descriptor.
+
+ @retval EFI_SUCCESS The interface descriptor was returned.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_DEVICE_ERROR A device error occurred, the function failed to
+ get the interface descriptor.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_GET_INTERFACE_DESCRIPTOR)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN EFI_USB_INTERFACE_DESCRIPTOR **InterfaceDescriptor
+ );
+
+/**
+ Get endpoint descriptor from a USB device.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_USB_IO_PPI.
+ @param[in] EndPointIndex The index of the end point.
+ @param[in] EndpointDescriptor The endpoint descriptor.
+
+ @retval EFI_SUCCESS The endpoint descriptor was returned.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_DEVICE_ERROR A device error occurred, the function failed to
+ get the endpoint descriptor.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_GET_ENDPOINT_DESCRIPTOR)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN UINT8 EndpointIndex,
+ IN EFI_USB_ENDPOINT_DESCRIPTOR **EndpointDescriptor
+ );
+
+/**
+ Issue a port reset to the device.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the PEI_USB_IO_PPI.
+
+ @retval EFI_SUCCESS The port reset was issued successfully.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_DEVICE_ERROR Device error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_USB_PORT_RESET)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This
+ );
+
+///
+/// This PPI contains a set of services to interact with the USB host controller.
+/// These interfaces are modeled on the UEFI 2.3 specification EFI_USB_IO_PROTOCOL.
+/// Refer to section 16.2.4 of the UEFI 2.3 Specification for more information on
+/// these interfaces.
+///
+struct _PEI_USB_IO_PPI {
+ PEI_USB_CONTROL_TRANSFER UsbControlTransfer;
+ PEI_USB_BULK_TRANSFER UsbBulkTransfer;
+ PEI_USB_GET_INTERFACE_DESCRIPTOR UsbGetInterfaceDescriptor;
+ PEI_USB_GET_ENDPOINT_DESCRIPTOR UsbGetEndpointDescriptor;
+ PEI_USB_PORT_RESET UsbPortReset;
+};
+
+extern EFI_GUID gPeiUsbIoPpiGuid;
+
+#endif
--
cgit