From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001 From: Angelos Mouzakitis Date: Tue, 10 Oct 2023 14:33:42 +0000 Subject: Add submodule dependency files Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec --- .../Universal/CapsuleRuntimeDxe/CapsuleCache.c | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 roms/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c (limited to 'roms/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c') diff --git a/roms/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c b/roms/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c new file mode 100644 index 000000000..3c96851e9 --- /dev/null +++ b/roms/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c @@ -0,0 +1,57 @@ +/** @file + Flush the cache is required for most architectures while do capsule + update. It is not support at Runtime. + + Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "CapsuleService.h" + +#include + +/** + Writes Back a range of data cache lines covering a set of capsules in memory. + + Writes Back the data cache lines specified by ScatterGatherList. + + @param ScatterGatherList Physical address of the data structure that + describes a set of capsules in memory + +**/ +VOID +CapsuleCacheWriteBack ( + IN EFI_PHYSICAL_ADDRESS ScatterGatherList + ) +{ + EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc; + + if (!EfiAtRuntime ()) { + Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList; + do { + WriteBackDataCacheRange ( + (VOID *)(UINTN)Desc, + (UINTN)sizeof (*Desc) + ); + + if (Desc->Length > 0) { + WriteBackDataCacheRange ( + (VOID *)(UINTN)Desc->Union.DataBlock, + (UINTN)Desc->Length + ); + Desc++; + } else if (Desc->Union.ContinuationPointer > 0) { + Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc->Union.ContinuationPointer; + } + } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0); + + WriteBackDataCacheRange ( + (VOID *)(UINTN)Desc, + (UINTN)sizeof (*Desc) + ); + } +} + -- cgit