From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001
From: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>
Date: Tue, 10 Oct 2023 14:33:42 +0000
Subject: Add submodule dependency files

Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
---
 roms/u-boot/arch/arm/dts/fsl-imx8qxp.dtsi | 51 +++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 roms/u-boot/arch/arm/dts/fsl-imx8qxp.dtsi

(limited to 'roms/u-boot/arch/arm/dts/fsl-imx8qxp.dtsi')

diff --git a/roms/u-boot/arch/arm/dts/fsl-imx8qxp.dtsi b/roms/u-boot/arch/arm/dts/fsl-imx8qxp.dtsi
new file mode 100644
index 000000000..1bffff131
--- /dev/null
+++ b/roms/u-boot/arch/arm/dts/fsl-imx8qxp.dtsi
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8dxp.dtsi"
+
+/ {
+	model = "Freescale i.MX8QXP";
+	compatible = "fsl,imx8qxp";
+
+	cpus {
+		A35_2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+			next-level-cache = <&A35_L2>;
+		};
+
+		A35_3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+			next-level-cache = <&A35_L2>;
+		};
+	};
+
+	pmu {
+		interrupt-affinity = <&A35_0>, <&A35_1>, <&A35_2>, <&A35_3>;
+	};
+};
+
+&A35_2 {
+	device_type = "cpu";
+};
+
+&A35_3 {
+	device_type = "cpu";
+};
-- 
cgit 1.2.3-korg