From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001 From: Angelos Mouzakitis Date: Tue, 10 Oct 2023 14:33:42 +0000 Subject: Add submodule dependency files Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec --- .../arch/arm/mach-aspeed/ast2500/board_common.c | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 roms/u-boot/arch/arm/mach-aspeed/ast2500/board_common.c (limited to 'roms/u-boot/arch/arm/mach-aspeed/ast2500/board_common.c') diff --git a/roms/u-boot/arch/arm/mach-aspeed/ast2500/board_common.c b/roms/u-boot/arch/arm/mach-aspeed/ast2500/board_common.c new file mode 100644 index 000000000..aca200223 --- /dev/null +++ b/roms/u-boot/arch/arm/mach-aspeed/ast2500/board_common.c @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2016 Google, Inc + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Second Watchdog Timer by default is configured + * to trigger secondary boot source. + */ +#define AST_2ND_BOOT_WDT 1 + +/* + * Third Watchdog Timer by default is configured + * to toggle Flash address mode switch before reset. + */ +#define AST_FLASH_ADDR_DETECT_WDT 2 + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +int dram_init(void) +{ + struct udevice *dev; + struct ram_info ram; + int ret; + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM FAIL1\r\n"); + return ret; + } + + ret = ram_get_info(dev, &ram); + if (ret) { + debug("DRAM FAIL2\r\n"); + return ret; + } + + gd->ram_size = ram.size; + + return 0; +} -- cgit 1.2.3-korg