From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001
From: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>
Date: Tue, 10 Oct 2023 14:33:42 +0000
Subject: Add submodule dependency files

Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
---
 roms/u-boot/arch/mips/cpu/cm_init.S | 44 +++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 roms/u-boot/arch/mips/cpu/cm_init.S

(limited to 'roms/u-boot/arch/mips/cpu/cm_init.S')

diff --git a/roms/u-boot/arch/mips/cpu/cm_init.S b/roms/u-boot/arch/mips/cpu/cm_init.S
new file mode 100644
index 000000000..e0d76ce79
--- /dev/null
+++ b/roms/u-boot/arch/mips/cpu/cm_init.S
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * MIPS Coherence Manager (CM) Initialisation
+ *
+ * Copyright (c) 2016 Imagination Technologies Ltd.
+ */
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <asm/cm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+LEAF(mips_cm_map)
+	/* Config3 must exist for a CM to be present */
+	mfc0		t0, CP0_CONFIG, 1
+	bgez		t0, 2f
+	mfc0		t0, CP0_CONFIG, 2
+	bgez		t0, 2f
+
+	/* Check Config3.CMGCR to determine CM presence */
+	mfc0		t0, CP0_CONFIG, 3
+	and		t0, t0, MIPS_CONF3_CMGCR
+	beqz		t0, 2f
+
+	/* Find the current physical GCR base address */
+1:	MFC0		t0, CP0_CMGCRBASE
+	PTR_SLL		t0, t0, 4
+
+	/* If the GCRs are where we want, we're done */
+	PTR_LI		t1, CONFIG_MIPS_CM_BASE
+	beq		t0, t1, 2f
+
+	/* Move the GCRs to our configured base address */
+	PTR_LI		t2, CKSEG1
+	PTR_ADDU	t0, t0, t2
+	sw		zero, GCR_BASE_UPPER(t0)
+	sw		t1, GCR_BASE(t0)
+
+	/* Re-check the GCR base */
+	b		1b
+
+2:	jr		ra
+	END(mips_cm_map)
-- 
cgit