From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001 From: Angelos Mouzakitis Date: Tue, 10 Oct 2023 14:33:42 +0000 Subject: Add submodule dependency files Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec --- roms/u-boot/arch/mips/mach-jz47xx/jz4780/gpio.c | 40 +++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 roms/u-boot/arch/mips/mach-jz47xx/jz4780/gpio.c (limited to 'roms/u-boot/arch/mips/mach-jz47xx/jz4780/gpio.c') diff --git a/roms/u-boot/arch/mips/mach-jz47xx/jz4780/gpio.c b/roms/u-boot/arch/mips/mach-jz47xx/jz4780/gpio.c new file mode 100644 index 000000000..d4884e7fa --- /dev/null +++ b/roms/u-boot/arch/mips/mach-jz47xx/jz4780/gpio.c @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include + +int jz47xx_gpio_get_value(unsigned int gpio) +{ + void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; + int port = gpio / 32; + int pin = gpio % 32; + + return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin); +} + +void jz47xx_gpio_direction_input(unsigned int gpio) +{ + void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; + int port = gpio / 32; + int pin = gpio % 32; + + writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); + writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port)); + writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port)); +} + +void jz47xx_gpio_direction_output(unsigned int gpio, int value) +{ + void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; + int port = gpio / 32; + int pin = gpio % 32; + + writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); + writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port)); + writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port)); + writel(BIT(pin), gpio_regs + + (value ? GPIO_PXPAT0S(port) : GPIO_PXPAT0C(port))); +} -- cgit 1.2.3-korg