From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001 From: Angelos Mouzakitis Date: Tue, 10 Oct 2023 14:33:42 +0000 Subject: Add submodule dependency files Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec --- roms/u-boot/arch/mips/mach-mscc/lowlevel_init.S | 45 +++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 roms/u-boot/arch/mips/mach-mscc/lowlevel_init.S (limited to 'roms/u-boot/arch/mips/mach-mscc/lowlevel_init.S') diff --git a/roms/u-boot/arch/mips/mach-mscc/lowlevel_init.S b/roms/u-boot/arch/mips/mach-mscc/lowlevel_init.S new file mode 100644 index 000000000..91f29ae25 --- /dev/null +++ b/roms/u-boot/arch/mips/mach-mscc/lowlevel_init.S @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2018 Microsemi Corporation + */ + +#include +#include + + .set noreorder + .extern vcoreiii_tlb_init + .extern vcoreiii_ddr_init +#ifdef CONFIG_SOC_LUTON + .extern pll_init +#endif + +LEAF(lowlevel_init) + /* + * As we have no stack yet, we can assume the restricted + * luxury of the sX-registers without saving them + */ + + /* Modify ra/s0 such we return to physical NOR location */ + li t0, 0x0fffffff + li t1, CONFIG_SYS_TEXT_BASE + and s0, ra, t0 + add s0, s0, t1 + + jal vcoreiii_tlb_init + nop + +#ifdef CONFIG_SOC_LUTON + jal pll_init + nop +#endif + + /* Initialize DDR controller to enable stack/gd/heap */ +0: + jal vcoreiii_ddr_init + nop + bnez v0, 0b /* Retry on error */ + nop + + jr s0 + nop + END(lowlevel_init) -- cgit 1.2.3-korg