From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001 From: Angelos Mouzakitis Date: Tue, 10 Oct 2023 14:33:42 +0000 Subject: Add submodule dependency files Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec --- roms/u-boot/arch/mips/mach-mtmips/cpu.c | 48 +++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 roms/u-boot/arch/mips/mach-mtmips/cpu.c (limited to 'roms/u-boot/arch/mips/mach-mtmips/cpu.c') diff --git a/roms/u-boot/arch/mips/mach-mtmips/cpu.c b/roms/u-boot/arch/mips/mach-mtmips/cpu.c new file mode 100644 index 000000000..a4b5cff61 --- /dev/null +++ b/roms/u-boot/arch/mips/mach-mtmips/cpu.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Stefan Roese + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)KSEG1, SZ_256M); + + return 0; +} + +int last_stage_init(void) +{ + void *src, *dst; + + src = malloc(SZ_64K); + dst = malloc(SZ_64K); + if (!src || !dst) { + printf("Can't allocate buffer for cache cleanup copy!\n"); + return 0; + } + + /* + * It has been noticed, that sometimes the d-cache is not in a + * "clean-state" when U-Boot is running on MT7688. This was + * detected when using the ethernet driver (which uses d-cache) + * and a TFTP command does not complete. Copying an area of 64KiB + * in DDR at a very late bootup time in U-Boot, directly before + * calling into the prompt, seems to fix this issue. + */ + memcpy(dst, src, SZ_64K); + free(src); + free(dst); + + return 0; +} -- cgit