From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001
From: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>
Date: Tue, 10 Oct 2023 14:33:42 +0000
Subject: Add submodule dependency files
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
---
roms/u-boot/board/imgtec/xilfpga/Kconfig | 15 ++++++++
roms/u-boot/board/imgtec/xilfpga/MAINTAINERS | 6 +++
roms/u-boot/board/imgtec/xilfpga/Makefile | 7 ++++
roms/u-boot/board/imgtec/xilfpga/README | 55 ++++++++++++++++++++++++++++
roms/u-boot/board/imgtec/xilfpga/xilfpga.c | 25 +++++++++++++
5 files changed, 108 insertions(+)
create mode 100644 roms/u-boot/board/imgtec/xilfpga/Kconfig
create mode 100644 roms/u-boot/board/imgtec/xilfpga/MAINTAINERS
create mode 100644 roms/u-boot/board/imgtec/xilfpga/Makefile
create mode 100644 roms/u-boot/board/imgtec/xilfpga/README
create mode 100644 roms/u-boot/board/imgtec/xilfpga/xilfpga.c
(limited to 'roms/u-boot/board/imgtec/xilfpga')
diff --git a/roms/u-boot/board/imgtec/xilfpga/Kconfig b/roms/u-boot/board/imgtec/xilfpga/Kconfig
new file mode 100644
index 000000000..b0782780f
--- /dev/null
+++ b/roms/u-boot/board/imgtec/xilfpga/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_XILFPGA
+
+config SYS_BOARD
+ default "xilfpga"
+
+config SYS_VENDOR
+ default "imgtec"
+
+config SYS_CONFIG_NAME
+ default "imgtec_xilfpga"
+
+config SYS_TEXT_BASE
+ default 0x80C00000
+
+endif
diff --git a/roms/u-boot/board/imgtec/xilfpga/MAINTAINERS b/roms/u-boot/board/imgtec/xilfpga/MAINTAINERS
new file mode 100644
index 000000000..aa045325e
--- /dev/null
+++ b/roms/u-boot/board/imgtec/xilfpga/MAINTAINERS
@@ -0,0 +1,6 @@
+XILFPGA BOARD
+M: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
+S: Maintained
+F: board/imgtec/xilfpga
+F: include/configs/xilfpga.h
+F: configs/imgtec_xilfpga_defconfig
diff --git a/roms/u-boot/board/imgtec/xilfpga/Makefile b/roms/u-boot/board/imgtec/xilfpga/Makefile
new file mode 100644
index 000000000..9aaf9ce26
--- /dev/null
+++ b/roms/u-boot/board/imgtec/xilfpga/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2016, Imagination Technologies Ltd.
+# Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+obj-y := xilfpga.o
diff --git a/roms/u-boot/board/imgtec/xilfpga/README b/roms/u-boot/board/imgtec/xilfpga/README
new file mode 100644
index 000000000..ac19d485d
--- /dev/null
+++ b/roms/u-boot/board/imgtec/xilfpga/README
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2016, Imagination Technologies Ltd.
+ *
+ * Zubair Lutfullah Kakakhel, Zubair.Kakakhel@imgtec.com
+ */
+
+MIPSfpga
+=======================================
+
+MIPSfpga is an FPGA based development platform by Imagination Technologies
+As we are dealing with a MIPS core instantiated on an FPGA, specifications
+are fluid and can be varied in RTL.
+
+The example project provided by IMGTEC runs on the Nexys4DDR board by
+Digilent powered by the ARTIX-7 FPGA by Xilinx. Relevant details about
+the example project and the Nexys4DDR board:
+
+- microAptiv UP core m14Kc
+- 50MHz clock speed
+- 128Mbyte DDR RAM at 0x0000_0000
+- 8Kbyte RAM at 0x1000_0000
+- axi_intc at 0x1020_0000
+- axi_uart16550 at 0x1040_0000
+- axi_gpio at 0x1060_0000
+- axi_i2c at 0x10A0_0000
+- custom_gpio at 0x10C0_0000
+- axi_ethernetlite at 0x10E0_0000
+- 8Kbyte BootRAM at 0x1FC0_0000
+- 16Mbyte QPI at 0x1D00_0000
+
+Boot protocol:
+--------------
+
+The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000.
+This is for easy reprogrammibility via JTAG.
+
+DDR initialization is already handled by a HW IP block.
+
+When the example project bitstream is loaded, the cpu_reset button
+needs to be pressed.
+
+The bootram initializes the cache and axi_uart
+Then checks if there is anything non 0xffff_ffff at location 0x1D40_0000
+
+If there is, then that is considered as u-boot. u-boot is copied from
+0x1D40_0000 to memory and the bootram jumps into u-boot code.
+
+At this point, the board is ready to load the Linux kernel + buildroot initramfs
+
+This can be done in multiple ways:
+
+1- JTAG load the binary and jump into it.
+2- Load kernel stored in the QSPI flash at 0x1D80_0000
+3- Load uImage via tftp. Ethernet works in u-boot.
+ e.g. env set server ip 192.168.154.45; dhcp uImage; bootm
diff --git a/roms/u-boot/board/imgtec/xilfpga/xilfpga.c b/roms/u-boot/board/imgtec/xilfpga/xilfpga.c
new file mode 100644
index 000000000..6a836370e
--- /dev/null
+++ b/roms/u-boot/board/imgtec/xilfpga/xilfpga.c
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Imagination Technologies MIPSfpga platform code
+ *
+ * Copyright (C) 2016, Imagination Technologies Ltd.
+ *
+ * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* initialize the DDR Controller and PHY */
+int dram_init(void)
+{
+ /* MIG IP block is smart and doesn't need SW
+ * to do any init */
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE; /* in bytes */
+
+ return 0;
+}
--
cgit