From af1a266670d040d2f4083ff309d732d648afba2a Mon Sep 17 00:00:00 2001 From: Angelos Mouzakitis Date: Tue, 10 Oct 2023 14:33:42 +0000 Subject: Add submodule dependency files Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec --- roms/u-boot/cmd/mp.c | 95 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 roms/u-boot/cmd/mp.c (limited to 'roms/u-boot/cmd/mp.c') diff --git a/roms/u-boot/cmd/mp.c b/roms/u-boot/cmd/mp.c new file mode 100644 index 000000000..c2b5235a3 --- /dev/null +++ b/roms/u-boot/cmd/mp.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. + */ + +#include +#include +#include + +static int cpu_status_all(void) +{ + unsigned long cpuid; + + for (cpuid = 0; ; cpuid++) { + if (!is_core_valid(cpuid)) { + if (cpuid == 0) { + printf("Core num: %lu is not valid\n", cpuid); + return 1; + } + break; + } + cpu_status(cpuid); + } + + return 0; +} + +static int +cpu_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + unsigned long cpuid; + + if (argc == 2 && strncmp(argv[1], "status", 6) == 0) + return cpu_status_all(); + + if (argc < 3) + return CMD_RET_USAGE; + + cpuid = simple_strtoul(argv[1], NULL, 10); + if (!is_core_valid(cpuid)) { + printf ("Core num: %lu is not valid\n", cpuid); + return 1; + } + + + if (argc == 3) { + if (strncmp(argv[2], "reset", 5) == 0) + cpu_reset(cpuid); + else if (strncmp(argv[2], "status", 6) == 0) + cpu_status(cpuid); + else if (strncmp(argv[2], "disable", 7) == 0) + return cpu_disable(cpuid); + else + return CMD_RET_USAGE; + + return 0; + } + + /* 4 or greater, make sure its release */ + if (strncmp(argv[2], "release", 7) != 0) + return CMD_RET_USAGE; + + if (cpu_release(cpuid, argc - 3, argv + 3)) + return CMD_RET_USAGE; + + return 0; +} + +#ifdef CONFIG_SYS_LONGHELP +static char cpu_help_text[] = + " reset - Reset cpu \n" + "cpu status - Status of all cpus\n" + "cpu status - Status of cpu \n" + "cpu disable - Disable cpu \n" + "cpu release [args] - Release cpu at with [args]" +#ifdef CONFIG_PPC + "\n" + " [args] : \n" \ + " pir - processor id (if writeable)\n" \ + " r3 - value for gpr 3\n" \ + " r6 - value for gpr 6\n" \ + "\n" \ + " Use '-' for any arg if you want the default value.\n" \ + " Default for r3 is and r6 is 0\n" \ + "\n" \ + " When cpu is released r4 and r5 = 0.\n" \ + " r7 will contain the size of the initial mapped area" +#endif + ""; +#endif + +U_BOOT_CMD( + cpu, CONFIG_SYS_MAXARGS, 1, cpu_cmd, + "Multiprocessor CPU boot manipulation and release", cpu_help_text +); -- cgit