From 76384a2aa1e57174bfa97a2d01b588c49a8cce80 Mon Sep 17 00:00:00 2001 From: Andrey Gusakov Date: Tue, 10 Jul 2018 15:28:03 +0300 Subject: [PATCH 203/211] clk: renesas: r8a77970: cpg-mssr: Add sadc clock Signed-off-by: Andrey Gusakov Signed-off-by: Valentine Barshak --- drivers/clk/renesas/r8a77970-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c index 1e3f6f8..dc70a36 100644 --- a/drivers/clk/renesas/r8a77970-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c @@ -137,6 +137,7 @@ static const struct mssr_mod_clk r8a77970_mod_clks[] __initconst = { DEF_MOD("rwdt", 402, R8A77970_CLK_R), DEF_MOD("intc-ex", 407, R8A77970_CLK_CP), DEF_MOD("intc-ap", 408, R8A77970_CLK_S2D1), + DEF_MOD("sadc", 503, R8A77970_CLK_S2D1), /* @@ H3=S3D1 */ DEF_MOD("hscif3", 517, R8A77970_CLK_S2D1), DEF_MOD("hscif2", 518, R8A77970_CLK_S2D1), DEF_MOD("hscif1", 519, R8A77970_CLK_S2D1), -- 2.7.4