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authorParth Dode <dodecoder@gmail.com>2020-08-28 20:10:18 +0200
committerJan-Simon Moeller <jsmoeller@linuxfoundation.org>2020-08-31 13:54:27 +0000
commitf7b7ad44c4a77f86fa4e3adf1ae23c712f6121d4 (patch)
tree0bca0a905877d8d2fd9060e53a2e7c8704481b12 /meta-agl-jailhouse/recipes-extended/jailhouse/files/agl-ivshmem-demo.c
parent7e79247a82a7a04c4915c086f54612cfe67f0b67 (diff)
meta-agl-jailhouse: Added inmates for jailhouse on agl
w.r.t. the root cell qemu-agl updated jailhouse_git.bb accordingly Bug-AGL: SPEC-3507 Change-Id: I0548d9bbec02d8506205b0dccb4ef591b290bca6 Change-Id: I6d065032ef7fff40535929219ce067aab260f043 Signed-off-by: Parth Dode <dodecoder@gmail.com>
Diffstat (limited to 'meta-agl-jailhouse/recipes-extended/jailhouse/files/agl-ivshmem-demo.c')
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diff --git a/meta-agl-jailhouse/recipes-extended/jailhouse/files/agl-ivshmem-demo.c b/meta-agl-jailhouse/recipes-extended/jailhouse/files/agl-ivshmem-demo.c
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+++ b/meta-agl-jailhouse/recipes-extended/jailhouse/files/agl-ivshmem-demo.c
@@ -0,0 +1,119 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Minimal configuration for ivshmem inmate demo:
+ * 1 CPU, 1MB RAM, serial ports, 4K shmem
+ *
+ * Copyright (c) Siemens AG, 2013, 2014
+ *
+ * Authors:
+ * Henning Schild <henning.schild@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[7];
+ struct jailhouse_pio pio_regions[1];
+ struct jailhouse_pci_device pci_devices[1];
+ struct jailhouse_pci_capability pci_caps[0];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "ivshmem-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
+ JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = 0,
+ .num_pio_regions = ARRAY_SIZE(config.pio_regions),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .num_pci_caps = ARRAY_SIZE(config.pci_caps),
+
+ .console = {
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_PIO,
+ .address = 0x2f8,/* ######## ttyS0 is host -> ttyS1 */
+ },
+ },
+
+ .cpus = {
+ 0b0010,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions (demo) */
+ {
+ .phys_start = 0x271f0000,
+ .virt_start = 0x271f0000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x271f1000,
+ .virt_start = 0x271f1000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x271fa000,
+ .virt_start = 0x271fa000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x271fc000,
+ .virt_start = 0x271fc000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x271fe000,
+ .virt_start = 0x271fe000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0x27200000,/* to 0x27300000 */
+ .virt_start = 0,
+ .size = 0x00100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x00100000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .pio_regions = {
+ PIO_RANGE(0x2f8, 8), /* serial 2 */
+// PIO_RANGE(0x3f8, 8), /* serial 1 */
+ },
+
+ .pci_devices = {
+ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0x0000,
+ .bdf = 0x0e << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
+ .num_msix_vectors = 16,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};