diff options
author | Parth Dode <dodecoder@gmail.com> | 2020-08-26 03:31:42 +0200 |
---|---|---|
committer | Jan-Simon Moeller <jsmoeller@linuxfoundation.org> | 2020-08-28 09:57:55 +0000 |
commit | 7e79247a82a7a04c4915c086f54612cfe67f0b67 (patch) | |
tree | 1f4bde6370bfc3ed552b86d350810a0eb39f1909 /meta-agl-jailhouse/recipes-extended/jailhouse | |
parent | 39872b4742c0f3868a9a4b1b16e2be66f0e754a5 (diff) |
meta-agl-jailhouse: Enable jailhouse on qemu-x86_64 through runqemu
jailhouse enable /usr/share/jailhouse/cells/qemu-agl.cell
added the appropriate QB variables required to use runqemu
v2: updated QB_SERIAL_OPT
v3: updated do_configure and do_install
v4: updated memmap
v5: resolved comments
v6: 2G to 1G
Bug-AGL: SPEC-3507
Change-Id: Iae8cf6a1f27bc285e4c0c5f2518cd1985ddf3b74
Signed-off-by: Parth Dode <dodecoder@gmail.com>
Diffstat (limited to 'meta-agl-jailhouse/recipes-extended/jailhouse')
-rw-r--r-- | meta-agl-jailhouse/recipes-extended/jailhouse/files/qemu-agl.c | 637 | ||||
-rw-r--r-- | meta-agl-jailhouse/recipes-extended/jailhouse/jailhouse_git.bb | 6 |
2 files changed, 643 insertions, 0 deletions
diff --git a/meta-agl-jailhouse/recipes-extended/jailhouse/files/qemu-agl.c b/meta-agl-jailhouse/recipes-extended/jailhouse/files/qemu-agl.c new file mode 100644 index 00000000..cf193c08 --- /dev/null +++ b/meta-agl-jailhouse/recipes-extended/jailhouse/files/qemu-agl.c @@ -0,0 +1,637 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright (c) Siemens AG, 2014-2017 + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Alternatively, you can use or redistribute this file under the following + * BSD license: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + * Configuration for QEMU Standard PC (Q35 + ICH9, 2009) + * created with '/usr/libexec/jailhouse/jailhouse config create -c ttyS1 qemu-agl.c' + * + * NOTE: This config expects the following to be appended to your kernel cmdline + * "memmap=0x5200000$0x22000000" + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_system header; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[17]; + struct jailhouse_irqchip irqchips[1]; + struct jailhouse_pio pio_regions[14]; + struct jailhouse_pci_device pci_devices[13]; + struct jailhouse_pci_capability pci_caps[14]; +} __attribute__((packed)) config = { + .header = { + .signature = JAILHOUSE_SYSTEM_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE, + .hypervisor_memory = { + .phys_start = 0x22000000, + .size = 0x600000, + }, + .debug_console = { + .address = 0x2f8, + .type = JAILHOUSE_CON_TYPE_8250, + .flags = JAILHOUSE_CON_ACCESS_PIO | + JAILHOUSE_CON_REGDIST_1, + }, + .platform_info = { + .pci_mmconfig_base = 0xb0000000, + .pci_mmconfig_end_bus = 0xff, + .iommu_units = { + { + .type = JAILHOUSE_IOMMU_INTEL, + .base = 0xfed90000, + .size = 0x1000, + }, + }, + .x86 = { + .pm_timer_address = 0x608, + .vtd_interrupt_limit = 256, + }, + }, + .root_cell = { + .name = "RootCell", + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pio_regions = ARRAY_SIZE(config.pio_regions), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .num_pci_caps = ARRAY_SIZE(config.pci_caps), + }, + }, + + .cpus = { + 0x000000000000000f, + }, + + .mem_regions = { + /* MemRegion: 00000000-0009fbff : System RAM */ + { + .phys_start = 0x0, + .virt_start = 0x0, + .size = 0xa0000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA, + }, + /* MemRegion: 00100000-201fffff : System RAM */ + { + .phys_start = 0x100000, + .virt_start = 0x100000, + .size = 0x20100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA, + }, + /* MemRegion: 20200000-21ffffff : Kernel */ + { + .phys_start = 0x20200000, + .virt_start = 0x20200000, + .size = 0x1e00000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA, + }, + /* MemRegion: 27200000-31ffffff : System RAM */ + { + .phys_start = 0x27200000, + .virt_start = 0x27200000, + .size = 0xae00000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA, + }, + /* MemRegion: 32000000-33ffffff : RAM buffer */ + { + .phys_start = 0x32000000, + .virt_start = 0x32000000, + .size = 0x2000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA, + }, + /* MemRegion: fe000000-fe7fffff : 0000:00:01.0 */ + { + .phys_start = 0xfe000000, + .virt_start = 0xfe000000, + .size = 0x800000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: fe800000-fe803fff : virtio-pci-modern */ + { + .phys_start = 0xfe800000, + .virt_start = 0xfe800000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: fe804000-fe807fff : virtio-pci-modern */ + { + .phys_start = 0xfe804000, + .virt_start = 0xfe804000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: fe808000-fe80bfff : virtio-pci-modern */ + { + .phys_start = 0xfe808000, + .virt_start = 0xfe808000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: fe80c000-fe80ffff : virtio-pci-modern */ + { + .phys_start = 0xfe80c000, + .virt_start = 0xfe80c000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: feb80000-febbffff : 0000:00:02.0 */ + { + .phys_start = 0xfeb80000, + .virt_start = 0xfeb80000, + .size = 0x40000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: febd0000-febd3fff : ICH HD audio */ + { + .phys_start = 0xfebd0000, + .virt_start = 0xfebd0000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: febd7000-febd7fff : ehci_hcd */ + { + .phys_start = 0xfebd7000, + .virt_start = 0xfebd7000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: febd8000-febd8fff : ahci */ + { + .phys_start = 0xfebd8000, + .virt_start = 0xfebd8000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: fed00000-fed003ff : PNP0103:00 */ + { + .phys_start = 0xfed00000, + .virt_start = 0xfed00000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: 000c0000-000dffff : ROMs */ + { + .phys_start = 0xc0000, + .virt_start = 0xc0000, + .size = 0x20000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* MemRegion: 22600000-271fffff : JAILHOUSE Inmate Memory */ + { + .phys_start = 0x22600000, + .virt_start = 0x22600000, + .size = 0x4c00000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + }, + + .irqchips = { + /* IOAPIC 0, GSI base 0 */ + { + .address = 0xfec00000, + .id = 0xff00, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff + }, + }, + }, + + .pio_regions = { + /* Port I/O: 0000-001f : dma1 */ + /* PIO_RANGE(0x0, 0x20), */ + /* Port I/O: 0020-0021 : pic1 */ + /* PIO_RANGE(0x20, 0x2), */ + /* Port I/O: 0040-0043 : timer0 */ + PIO_RANGE(0x40, 0x4), + /* Port I/O: 0050-0053 : timer1 */ + /* PIO_RANGE(0x50, 0x4), */ + /* Port I/O: 0060-0060 : keyboard */ + PIO_RANGE(0x60, 0x1), + /* Port I/O: 0064-0064 : keyboard */ + PIO_RANGE(0x64, 0x1), + /* Port I/O: 0070-0077 : rtc0 */ + PIO_RANGE(0x70, 0x8), + /* Port I/O: 0080-008f : dma page reg */ + /* PIO_RANGE(0x80, 0x10), */ + /* Port I/O: 00a0-00a1 : pic2 */ + /* PIO_RANGE(0xa0, 0x2), */ + /* Port I/O: 00c0-00df : dma2 */ + /* PIO_RANGE(0xc0, 0x20), */ + /* Port I/O: 00f0-00ff : fpu */ + /* PIO_RANGE(0xf0, 0x10), */ + /* Port I/O: 02f8-02ff : serial */ + PIO_RANGE(0x2f8, 0x8), + /* Port I/O: 0378-037a : parport0 */ + /* PIO_RANGE(0x378, 0x3), */ + /* Port I/O: 03c0-03df : vga+ */ + PIO_RANGE(0x3c0, 0x20), + /* Port I/O: 03f8-03ff : serial */ + PIO_RANGE(0x3f8, 0x8), + /* Port I/O: 0510-051b : QEMU0002:00 */ + /* PIO_RANGE(0x510, 0xc), */ + /* Port I/O: 0600-0603 : ACPI PM1a_EVT_BLK */ + /* PIO_RANGE(0x600, 0x4), */ + /* Port I/O: 0604-0605 : ACPI PM1a_CNT_BLK */ + /* PIO_RANGE(0x604, 0x2), */ + /* Port I/O: 0608-060b : ACPI PM_TMR */ + /* PIO_RANGE(0x608, 0x4), */ + /* Port I/O: 0620-062f : ACPI GPE0_BLK */ + /* PIO_RANGE(0x620, 0x10), */ + /* Port I/O: 0700-073f : i801_smbus */ + /* PIO_RANGE(0x700, 0x40), */ + /* Port I/O: c000-c07f : 0000:00:04.0 */ + PIO_RANGE(0xc000, 0x80), + /* Port I/O: c0c0-c0df : 0000:00:02.0 */ + PIO_RANGE(0xc0c0, 0x20), + /* Port I/O: c0e0-c0ff : 0000:00:03.0 */ + PIO_RANGE(0xc0e0, 0x20), + /* Port I/O: c100-c11f : 0000:00:1d.0 */ + PIO_RANGE(0xc100, 0x20), + /* Port I/O: c120-c13f : 0000:00:1d.1 */ + PIO_RANGE(0xc120, 0x20), + /* Port I/O: c140-c15f : 0000:00:1d.2 */ + PIO_RANGE(0xc140, 0x20), + /* Port I/O: c160-c17f : 0000:00:1f.2 */ + PIO_RANGE(0xc160, 0x20), + }, + + .pci_devices = { + /* PCIDevice: 00:00.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0x0, + .bar_mask = { + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, + }, + .caps_start = 0, + .num_caps = 0, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:01.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0x8, + .bar_mask = { + 0xff800000, 0x00000000, 0xffffc000, + 0xffffffff, 0xfffff000, 0x00000000, + }, + .caps_start = 0, + .num_caps = 6, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 3, + .msix_region_size = 0x1000, + .msix_address = 0xfebd4000, + }, + /* PCIDevice: 00:02.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0x10, + .bar_mask = { + 0xffffffe0, 0xfffff000, 0x00000000, + 0x00000000, 0xffffc000, 0xffffffff, + }, + .caps_start = 0, + .num_caps = 6, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 3, + .msix_region_size = 0x1000, + .msix_address = 0xfebd5000, + }, + /* PCIDevice: 00:03.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0x18, + .bar_mask = { + 0xffffffe0, 0x00000000, 0x00000000, + 0x00000000, 0xffffc000, 0xffffffff, + }, + .caps_start = 6, + .num_caps = 5, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:04.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0x20, + .bar_mask = { + 0xffffff80, 0xfffff000, 0x00000000, + 0x00000000, 0xffffc000, 0xffffffff, + }, + .caps_start = 0, + .num_caps = 6, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 2, + .msix_region_size = 0x1000, + .msix_address = 0xfebd6000, + }, + /* PCIDevice: 00:1b.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xd8, + .bar_mask = { + 0xffffc000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, + }, + .caps_start = 11, + .num_caps = 1, + .num_msi_vectors = 1, + .msi_64bits = 1, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:1d.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xe8, + .bar_mask = { + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xffffffe0, 0x00000000, + }, + .caps_start = 0, + .num_caps = 0, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:1d.1 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xe9, + .bar_mask = { + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xffffffe0, 0x00000000, + }, + .caps_start = 0, + .num_caps = 0, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:1d.2 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xea, + .bar_mask = { + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xffffffe0, 0x00000000, + }, + .caps_start = 0, + .num_caps = 0, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:1d.7 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xef, + .bar_mask = { + 0xfffff000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, + }, + .caps_start = 0, + .num_caps = 0, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:1f.0 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xf8, + .bar_mask = { + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, + }, + .caps_start = 0, + .num_caps = 0, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:1f.2 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xfa, + .bar_mask = { + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xffffffe0, 0xfffff000, + }, + .caps_start = 12, + .num_caps = 2, + .num_msi_vectors = 1, + .msi_64bits = 1, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + /* PCIDevice: 00:1f.3 */ + { + .type = JAILHOUSE_PCI_TYPE_DEVICE, + .iommu = 0, + .domain = 0x0, + .bdf = 0xfb, + .bar_mask = { + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xffffffc0, 0x00000000, + }, + .caps_start = 0, + .num_caps = 0, + .num_msi_vectors = 0, + .msi_64bits = 0, + .msi_maskable = 0, + .num_msix_vectors = 0, + .msix_region_size = 0x0, + .msix_address = 0x0, + }, + }, + + .pci_caps = { + /* PCIDevice: 00:01.0 */ + /* PCIDevice: 00:02.0 */ + /* PCIDevice: 00:04.0 */ + { + .id = PCI_CAP_ID_MSIX, + .start = 0x98, + .len = 0xc, + .flags = JAILHOUSE_PCICAPS_WRITE, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x84, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x70, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x60, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x50, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x40, + .len = 0x2, + .flags = 0, + }, + /* PCIDevice: 00:03.0 */ + { + .id = PCI_CAP_ID_VNDR, + .start = 0x84, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x70, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x60, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x50, + .len = 0x2, + .flags = 0, + }, + { + .id = PCI_CAP_ID_VNDR, + .start = 0x40, + .len = 0x2, + .flags = 0, + }, + /* PCIDevice: 00:1b.0 */ + { + .id = PCI_CAP_ID_MSI, + .start = 0x60, + .len = 0xe, + .flags = JAILHOUSE_PCICAPS_WRITE, + }, + /* PCIDevice: 00:1f.2 */ + { + .id = PCI_CAP_ID_MSI, + .start = 0x80, + .len = 0xe, + .flags = JAILHOUSE_PCICAPS_WRITE, + }, + { + .id = PCI_CAP_ID_SATA, + .start = 0xa8, + .len = 0x2, + .flags = 0, + }, + }, +}; diff --git a/meta-agl-jailhouse/recipes-extended/jailhouse/jailhouse_git.bb b/meta-agl-jailhouse/recipes-extended/jailhouse/jailhouse_git.bb index 2fbd68e3..cb7e48c0 100644 --- a/meta-agl-jailhouse/recipes-extended/jailhouse/jailhouse_git.bb +++ b/meta-agl-jailhouse/recipes-extended/jailhouse/jailhouse_git.bb @@ -38,6 +38,10 @@ JH_CELL_FILES ?= "*.cell" EXTRA_OEMAKE = "ARCH=${JH_ARCH} CROSS_COMPILE=${TARGET_PREFIX} CC="${CC}" KDIR=${STAGING_KERNEL_BUILDDIR}" do_configure() { + + # copy ${WORKDIR}/qemu-agl.c ${S}/configs/x86/ <--- folder where the cells are defined in the source tree to be compiled + cp ${WORKDIR}/qemu-agl.c ${S}/configs/${JH_ARCH} + sed -i '1s|^#!/usr/bin/env python$|#!/usr/bin/env python3|' ${B}/tools/${BPN}-* } @@ -55,6 +59,8 @@ do_install() { oe_runmake PIP=: PYTHON=python3 PYTHON_PIP_USEABLE=yes DESTDIR=${D} install install -d ${D}${CELL_DIR} + + install -m 0644 ${B}/configs/${JH_ARCH}/${JH_CELL_FILES} ${D}${CELL_DIR}/ install -d ${D}${INMATES_DIR} |