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authorFrode Isaksen <fisaksen@baylibre.com>2017-12-19 11:15:35 +0000
committerJan-Simon Moeller <jsmoeller@linuxfoundation.org>2018-02-07 11:47:29 +0000
commitc4a6287185179732dfc1e903c195ff90c19f1065 (patch)
treed35f5010dbd952e40f5c178322026445b55757c1 /meta-eas/recipes-kernel/linux/linux-renesas/0026-arm-dts-add-TC2-cpu-capacity-dmips-mhz-information.patch
parent109dea1d5c5a38807b098b588584636ae636a302 (diff)
This layer provides Energy Aware Scheduling (EAS) patcheseel_5.1.0eel_5.0.3eel_5.0.2eel/5.1.0eel/5.0.3eel/5.0.25.1.05.0.35.0.2eel
For the moment only for Renesas R-Car Gen3 SoC's. Can be expanded for other SoC's by setting the machine feature biglittle and provide the relevant EAS patches. Bug-AGL: SPEC-813 Change-Id: I2b5e69c515c33e57be19b30466fe208d7b8ac1a5 Signed-off-by: Frode Isaksen <fisaksen@baylibre.com>
Diffstat (limited to 'meta-eas/recipes-kernel/linux/linux-renesas/0026-arm-dts-add-TC2-cpu-capacity-dmips-mhz-information.patch')
-rw-r--r--meta-eas/recipes-kernel/linux/linux-renesas/0026-arm-dts-add-TC2-cpu-capacity-dmips-mhz-information.patch70
1 files changed, 70 insertions, 0 deletions
diff --git a/meta-eas/recipes-kernel/linux/linux-renesas/0026-arm-dts-add-TC2-cpu-capacity-dmips-mhz-information.patch b/meta-eas/recipes-kernel/linux/linux-renesas/0026-arm-dts-add-TC2-cpu-capacity-dmips-mhz-information.patch
new file mode 100644
index 0000000..bab5175
--- /dev/null
+++ b/meta-eas/recipes-kernel/linux/linux-renesas/0026-arm-dts-add-TC2-cpu-capacity-dmips-mhz-information.patch
@@ -0,0 +1,70 @@
+From dbe8ad50cfc3117c8b7384f31be43a747911d368 Mon Sep 17 00:00:00 2001
+From: Juri Lelli <juri.lelli@arm.com>
+Date: Tue, 13 Oct 2015 14:56:51 +0100
+Subject: [PATCH 26/92] arm, dts: add TC2 cpu capacity-dmips-mhz information
+
+Add TC2 cpu capacity information.
+
+Cc: Liviu Dudau <liviu.dudau@arm.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Cc: Rob Herring <robh+dt@kernel.org>
+Cc: Pawel Moll <pawel.moll@arm.com>
+Cc: Mark Rutland <mark.rutland@arm.com>
+Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
+Cc: Kumar Gala <galak@codeaurora.org>
+Cc: Russell King <linux@arm.linux.org.uk>
+Cc: devicetree@vger.kernel.org
+Acked-by: Sudeep Holla <sudeep.holla@arm.com>
+Signed-off-by: Juri Lelli <juri.lelli@arm.com>
+---
+ arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+index 0205c97..45d08cc 100644
+--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
++++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+@@ -39,6 +39,7 @@
+ reg = <0>;
+ cci-control-port = <&cci_control1>;
+ cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
++ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu1: cpu@1 {
+@@ -47,6 +48,7 @@
+ reg = <1>;
+ cci-control-port = <&cci_control1>;
+ cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
++ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu2: cpu@2 {
+@@ -55,6 +57,7 @@
+ reg = <0x100>;
+ cci-control-port = <&cci_control2>;
+ cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
++ capacity-dmips-mhz = <516>;
+ };
+
+ cpu3: cpu@3 {
+@@ -63,6 +66,7 @@
+ reg = <0x101>;
+ cci-control-port = <&cci_control2>;
+ cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
++ capacity-dmips-mhz = <516>;
+ };
+
+ cpu4: cpu@4 {
+@@ -71,6 +75,7 @@
+ reg = <0x102>;
+ cci-control-port = <&cci_control2>;
+ cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
++ capacity-dmips-mhz = <516>;
+ };
+
+ idle-states {
+--
+1.9.1
+