diff options
author | Yoshiki Ito <ito.yoshiki001@jp.panasonic.com> | 2021-10-20 13:56:40 +0900 |
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committer | Yoshiki Ito <ito.yoshiki001@jp.panasonic.com> | 2021-10-20 15:12:12 +0900 |
commit | 3967213580b8aeb1b2d5377c25283be141834259 (patch) | |
tree | 715cc80aa128f15bce2e02199d45ab081787b28d /meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware | |
parent | 5c85ab7e123dc24fa2f63182de8499a04984d37f (diff) |
Add support for 16Gbit/1rank DRAM version of the AGL reference hardware
The AGL reference hardware which is numbered 100 or above has
16Gbit/1rank DRAM. If you use the reference hardware described above,
please flash the firmware with the suffix "-agl-refhw-4x2g-1rank".
Bug-AGL: SPEC-4115
Signed-off-by: Yoshiki Ito <ito.yoshiki001@jp.panasonic.com>
Change-Id: Id13458b431451dce4cda717f35a05a6a56cf3d81
Diffstat (limited to 'meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware')
-rw-r--r-- | meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend b/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend index 09c7a76..564e0b5 100644 --- a/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend +++ b/meta-agl-refhw-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend @@ -28,6 +28,10 @@ EMMC_BOOT_OPTION = "RCAR_SA6_TYPE=1" # DDR_8G_OPTION = "RCAR_DRAM_LPDDR4_MEMCONF=1 RCAR_DRAM_MEMRANK=2" +# AGL reference hardware numbered 100 or above has 16Gbit/1rank DRAM +# and please flash the firmware built with the following options. +DDR_8G_1RANK_OPTION = "RCAR_DRAM_LPDDR4_MEMCONF=1 RCAR_DRAM_MEMRANK=1" + ATFW_OPT_agl-refhw-h3 = "LSI=H3 RCAR_DRAM_SPLIT=1 ${EMMC_BOOT_OPTION} ${DDR_8G_OPTION}" # @@ -36,6 +40,7 @@ ATFW_OPT_agl-refhw-h3 = "LSI=H3 RCAR_DRAM_SPLIT=1 ${EMMC_BOOT_OPTION} ${DDR_8G_O # Build options for building as extra firmware when MACHINE=h3ulcb, based on H3[4x2g] H3ULCB[agl-refhw-4x2g] = "LSI=H3 RCAR_DRAM_SPLIT=1 ${EMMC_BOOT_OPTION} ${DDR_8G_OPTION}" +H3ULCB[agl-refhw-4x2g-1rank] = "LSI=H3 RCAR_DRAM_SPLIT=1 ${EMMC_BOOT_OPTION} ${DDR_8G_1RANK_OPTION}" # # Need to prepend the compile tasks with a distclean that actually cleans |