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author | Ronan Le Martret <ronan.lemartret@iot.bzh> | 2018-08-30 12:16:20 +0000 |
---|---|---|
committer | Stephane Desneux <stephane.desneux@iot.bzh> | 2020-05-19 18:56:09 +0000 |
commit | 9e58bd97144ab56a7858c6cd2206d3bd793bb09e (patch) | |
tree | 8bd6471dcf63ae5056bb2760d820b964b0eff9e3 | |
parent | f2fdf13f3cfdb5734820bde94bb7e83c2d8e783c (diff) |
[AGL] Add driver control checksum
* As the driver files come from out of git repository,
we need to check driver file integrity.
Change-Id: I46f2a281f8da1ae606e8ae1ee55324fd5fd9b772
Signed-off-by: Ronan Le Martret <ronan.lemartret@iot.bzh>
6 files changed, 46 insertions, 0 deletions
diff --git a/meta-rcar-gen3/include/checksum_control.inc b/meta-rcar-gen3/include/checksum_control.inc new file mode 100644 index 0000000..e0decc7 --- /dev/null +++ b/meta-rcar-gen3/include/checksum_control.inc @@ -0,0 +1,25 @@ +require include/checksum_control_files.inc + +python do_checksum_control() { + to_check_dico = d.getVarFlags("CTL_CHECKSUM") + if to_check_dico is None: + return 0 + + src_uri = (d.getVar('SRC_URI') or "").split() + for s in src_uri: + c_source=os.path.basename(s) + bb.note("Check source: %s " % (c_source)) + if c_source in to_check_dico: + f_data = bb.fetch2.FetchData(s, d, True) + f_data.setup_localpath(d) + if os.path.exists(f_data.localpath): + mdr5_sum=bb.utils.md5_file(f_data.localpath) + mdr5_ctl=to_check_dico[c_source] + if mdr5_sum != mdr5_ctl: + bb.fatal( "File %s hash should be %s but %s find, please update your driver files." % (c_source, mdr5_ctl, mdr5_sum)) +} + +do_checksum_control[doc] = "Do a checksum of the archives source files" +do_checksum_control[vardeps] = "CTL_CHECKSUM" + +addtask do_checksum_control before do_unpack after do_fetch diff --git a/meta-rcar-gen3/include/checksum_control_files.inc b/meta-rcar-gen3/include/checksum_control_files.inc new file mode 100644 index 0000000..ba4de52 --- /dev/null +++ b/meta-rcar-gen3/include/checksum_control_files.inc @@ -0,0 +1,15 @@ +CTL_CHECKSUM[r8a77951_linux_gsx_binaries_gles.tar.bz2]="72e8973c497a4f8c3a149911df2e56cb" +CTL_CHECKSUM[r8a77960_linux_gsx_binaries_gles.tar.bz2]="194fd35daab3a26b37b9c79078a4719a" +CTL_CHECKSUM[GSX_KM_H3.tar.bz2]="ab1ee4534a1d4b1852478dc6d8fa5eb9" +CTL_CHECKSUM[GSX_KM_M3.tar.bz2]="531b91b53ad7ffaf13e33aec2d499278" +CTL_CHECKSUM[RCG3VUDRL4101ZDO.tar.bz2]="43a8921d5c2a257ccc0bf491c737f5be" +CTL_CHECKSUM[EVARTM0AC0000XCMCTL30SL41C.tar.bz2]="3714b73b8cc317372a22a8335c74e103" +CTL_CHECKSUM[EVARTM0AC0000XV264D30SL41C.tar.bz2]="efcbb6493f61d714b64f6340503fa1d3" +CTL_CHECKSUM[EVARTM0AC0000XV264E30SL41C.tar.bz2]="8b0480bcee569b53438ed79d166630fa" +CTL_CHECKSUM[EVARTM0AC0000XVCMND30SL41C.tar.bz2]="691889ccf3bc295bdfdb5cf90d90bcaf" +CTL_CHECKSUM[EVARTM0AC0000XVCMNE30SL41C.tar.bz2]="9dd7c067632385a5b071f96204766ac1" +CTL_CHECKSUM[RTM0AC0000ADAACMZ1SL41C.tar.gz]="4e0bb98feeb1e309a2ec12c201bc16aa" +CTL_CHECKSUM[RTM0AC0000AEAACMZ1SL41C.tar.gz]="414c5fc22bcf848b5a6eee3812874611" +CTL_CHECKSUM[RTM0AC0000XAAACD30SL41C.tar.gz]="e44c10bd24372fc70013c2498c6869d3" +CTL_CHECKSUM[RTM0AC0000XAAACE30SL41C.tar.gz]="1611375916d9e17cff19c34b83300c83" +CTL_CHECKSUM[RTM0AC0000XACMND30SL41C.tar.gz]="6229f43b2260d194f663bceed16ca273" diff --git a/meta-rcar-gen3/recipes-graphics/gles-module/gles-user-module.bb b/meta-rcar-gen3/recipes-graphics/gles-module/gles-user-module.bb index 344c675..cb7cc20 100644 --- a/meta-rcar-gen3/recipes-graphics/gles-module/gles-user-module.bb +++ b/meta-rcar-gen3/recipes-graphics/gles-module/gles-user-module.bb @@ -1,5 +1,6 @@ require include/gles-control.inc require include/rcar-gen3-path-common.inc +require include/checksum_control.inc DESCRIPTION = "PowerVR GPU user module" LICENSE = "CLOSED" diff --git a/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb b/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb index 50a6765..46eec8f 100644 --- a/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb +++ b/meta-rcar-gen3/recipes-kernel/kernel-module-gles/kernel-module-gles.bb @@ -5,6 +5,8 @@ LIC_FILES_CHKSUM = " \ file://MIT-COPYING;md5=8c2810fa6bfdc5ae5c15a0c1ade34054 \ " inherit module +require include/checksum_control.inc + PN = "kernel-module-gles" PR = "r0" diff --git a/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb b/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb index eb2d33b..df08d06 100644 --- a/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb +++ b/meta-rcar-gen3/recipes-kernel/kernel-module-uvcs/kernel-module-uvcs-drv.bb @@ -12,8 +12,10 @@ LIC_FILES_CHKSUM = " \ " require include/omx-control.inc require include/rcar-gen3-path-common.inc +require include/checksum_control.inc inherit module + PR = "r0" COMPATIBLE_MACHINE = "(salvator-x|ulcb|ebisu)" diff --git a/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb b/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb index 598be28..553aa73 100644 --- a/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb +++ b/meta-rcar-gen3/recipes-multimedia/omx-module/omx-user-module.bb @@ -19,6 +19,7 @@ include ${INCLUDE_FILE}-omx-user-module.inc DEPENDS += '${@oe.utils.conditional("USE_VIDEO_OMX", "1", "kernel-module-uvcs-drv", "", d )}' inherit autotools +require include/checksum_control.inc includedir = "${RENESAS_DATADIR}/include" CFLAGS += " -I${STAGING_DIR_HOST}${RENESAS_DATADIR}/include" |