V3M: add CR7 loader support

Make V3M boot from CR7 by default (look in eLinux instructions)

4 files changed, 67 insertions, 27 deletions

diff --git a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
index 0de1218..0bf05d1 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
+++ b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
@@ -24,12 +24,12 @@ do_deploy_append() {
     install -m 0644 ${S}/tools/dummy_create/cert_header_sa6.bin ${DEPLOYDIR}/cert_header_sa6.bin
 }
 
-do_deploy_append_condor() {
+do_deploy_append_r8a7797() {
     rm ${DEPLOYDIR}/bootparam_sa0.bin
     rm ${DEPLOYDIR}/bootparam_sa0.srec
 }
 
-do_deploy_append_v3hsk() {
+do_deploy_append_r8a7798() {
     rm ${DEPLOYDIR}/bootparam_sa0.bin
     rm ${DEPLOYDIR}/bootparam_sa0.srec
 }
diff --git a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0003-plat-renesas-rcar-V3M-support.patch b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0003-plat-renesas-rcar-V3M-support.patch
index 822895a..292f5fe 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0003-plat-renesas-rcar-V3M-support.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0003-plat-renesas-rcar-V3M-support.patch
@@ -20,6 +20,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  plat/renesas/rcar/drivers/rom/rom_api.c            |   18 +-
  plat/renesas/rcar/drivers/scif/scif.S              |   29 +-
  plat/renesas/rcar/include/bl2_dma_register.h       |    4 +
+ plat/renesas/rcar/include/platform_def.h           |    6 +
  plat/renesas/rcar/pfc/V3M/pfc_init_v3m.c           | 1076 ++++++++++++++++++++
  plat/renesas/rcar/pfc/V3M/pfc_init_v3m.h           |   37 +
  plat/renesas/rcar/pfc/pfc.mk                       |    7 +
@@ -29,8 +30,8 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  plat/renesas/rcar/qos/V3M/qos_init_v3m.h           |   37 +
  plat/renesas/rcar/qos/qos.mk                       |    7 +
  plat/renesas/rcar/qos/qos_init.c                   |   25 +
- plat/renesas/rcar/rcar_def.h                       |    1 +
- 23 files changed, 2490 insertions(+), 13 deletions(-)
+ plat/renesas/rcar/rcar_def.h                       |    5 +
+ 24 files changed, 2500 insertions(+), 13 deletions(-)
  mode change 100644 => 100755 plat/renesas/rcar/bl2_rcar_setup.c
  create mode 100644 plat/renesas/rcar/ddr/V3M/boot_init_dram_regdef_v3m.h
  create mode 100644 plat/renesas/rcar/ddr/V3M/boot_init_dram_v3m.h
@@ -1169,6 +1170,26 @@ index 7c7e7a8..4bc9341 100644
  
  #if (DMACH==0)		/* SYS-DMAC0 (CH0) */
  #define SYS_DMAC_BIT	((uint32_t)1U << 19U)
+diff --git a/plat/renesas/rcar/include/platform_def.h b/plat/renesas/rcar/include/platform_def.h
+index ae5dfab..59685c1 100644
+--- a/plat/renesas/rcar/include/platform_def.h
++++ b/plat/renesas/rcar/include/platform_def.h
+@@ -149,9 +149,15 @@
+  * Put BL2 just below BL3-1. BL2_BASE is calculated using the current BL2 debug
+  * size plus a little space for growth.
+  */
++#if RCAR_LSI == RCAR_V3M
++#define RCAR_SECRAM_BASE		(0xE6300000)
++#define BL2_BASE			(0xE6344000)
++#define BL2_LIMIT			(0xE636E800)
++#else
+ #define	RCAR_SECRAM_BASE		(0xE6300000)
+ #define BL2_BASE			(0xE6304000)
+ #define BL2_LIMIT			(0xE632E800)
++#endif
+ 
+ /*******************************************************************************
+  * BL31 specific defines.
 diff --git a/plat/renesas/rcar/pfc/V3M/pfc_init_v3m.c b/plat/renesas/rcar/pfc/V3M/pfc_init_v3m.c
 new file mode 100644
 index 0000000..0344189
@@ -2989,10 +3010,22 @@ index ca0f311..86ee492 100644
    #error "Don't have QoS initialize routine(Unknown chip)."
   #endif
 diff --git a/plat/renesas/rcar/rcar_def.h b/plat/renesas/rcar/rcar_def.h
-index 03e0f14..103f754 100644
+index 03e0f14..ddbca3b 100644
 --- a/plat/renesas/rcar/rcar_def.h
 +++ b/plat/renesas/rcar/rcar_def.h
-@@ -255,6 +255,7 @@
+@@ -79,7 +79,11 @@
+ #define DEVICE_RCAR_BASE	0xE6000000U
+ #define DEVICE_RCAR_SIZE	0x00300000U
+ 
++#if RCAR_LSI == RCAR_V3M
++#define DEVICE_RCAR_BASE2	MAKE_U(0xE6370000)
++#else
+ #define DEVICE_RCAR_BASE2	MAKE_U(0xE6360000)
++#endif
+ #define DEVICE_RCAR_SIZE2	0x19CA0000U
+ 
+ #define DEVICE_SRAM_BASE	0xE6310000
+@@ -255,6 +259,7 @@
  #define RCAR_CUT_MASK			(0x000000FFU)
  #define RCAR_PRODUCT_H3			(0x00004F00U)
  #define RCAR_PRODUCT_M3			(0x00005200U)
diff --git a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0004-plat-renesas-rcar-V3H-support.patch b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0004-plat-renesas-rcar-V3H-support.patch
index 35e8392..5d6d1ae 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0004-plat-renesas-rcar-V3H-support.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/files/0004-plat-renesas-rcar-V3H-support.patch
@@ -13,7 +13,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  plat/renesas/rcar/drivers/rom/rom_api.c      |   17 +-
  plat/renesas/rcar/drivers/scif/scif.S        |    2 +-
  plat/renesas/rcar/include/bl2_dma_register.h |    2 +-
- plat/renesas/rcar/include/platform_def.h     |    6 +
+ plat/renesas/rcar/include/platform_def.h     |    4 +
  plat/renesas/rcar/pfc/V3H/pfc_init_v3h.c     | 1196 ++++++++++++++++++++++++++
  plat/renesas/rcar/pfc/V3H/pfc_init_v3h.h     |   37 +
  plat/renesas/rcar/pfc/pfc.mk                 |    7 +
@@ -23,9 +23,9 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  plat/renesas/rcar/qos/V3H/qos_init_v3h_v10.h |   37 +
  plat/renesas/rcar/qos/qos.mk                 |    7 +
  plat/renesas/rcar/qos/qos_init.c             |   26 +
- plat/renesas/rcar/rcar_def.h                 |    1 +
+ plat/renesas/rcar/rcar_def.h                 |    3 +-
  tools/dummy_create/makefile                  |    5 +
- 18 files changed, 2114 insertions(+), 5 deletions(-)
+ 18 files changed, 2113 insertions(+), 6 deletions(-)
  create mode 100644 plat/renesas/rcar/pfc/V3H/pfc_init_v3h.c
  create mode 100644 plat/renesas/rcar/pfc/V3H/pfc_init_v3h.h
  create mode 100644 plat/renesas/rcar/qos/V3H/qos_init_v3h_v10.c
@@ -303,25 +303,20 @@ index 4bc9341..195515a 100644
  #else
  #define	DMACH	0	/* DMA CH setting (0/16/32) */
 diff --git a/plat/renesas/rcar/include/platform_def.h b/plat/renesas/rcar/include/platform_def.h
-index ae5dfab..c802ef1 100644
+index 59685c1..edaa59f 100644
 --- a/plat/renesas/rcar/include/platform_def.h
 +++ b/plat/renesas/rcar/include/platform_def.h
-@@ -149,9 +149,15 @@
-  * Put BL2 just below BL3-1. BL2_BASE is calculated using the current BL2 debug
-  * size plus a little space for growth.
-  */
-+#if RCAR_LSI == RCAR_V3H
+@@ -153,6 +153,10 @@
+ #define RCAR_SECRAM_BASE		(0xE6300000)
+ #define BL2_BASE			(0xE6344000)
+ #define BL2_LIMIT			(0xE636E800)
++#elif RCAR_LSI == RCAR_V3H
 +#define RCAR_SECRAM_BASE		(0xEB200000)
 +#define BL2_BASE			(0xEB244000)
 +#define BL2_LIMIT			(0xEB26E800)
-+#else
+ #else
  #define	RCAR_SECRAM_BASE		(0xE6300000)
  #define BL2_BASE			(0xE6304000)
- #define BL2_LIMIT			(0xE632E800)
-+#endif
- 
- /*******************************************************************************
-  * BL31 specific defines.
 diff --git a/plat/renesas/rcar/pfc/V3H/pfc_init_v3h.c b/plat/renesas/rcar/pfc/V3H/pfc_init_v3h.c
 new file mode 100644
 index 0000000..351747a
@@ -2513,10 +2508,19 @@ index 86ee492..07aaac2 100644
    #error "Don't have QoS initialize routine(Unknown chip)."
   #endif
 diff --git a/plat/renesas/rcar/rcar_def.h b/plat/renesas/rcar/rcar_def.h
-index 103f754..e23d33a 100644
+index ddbca3b..d8fd976 100644
 --- a/plat/renesas/rcar/rcar_def.h
 +++ b/plat/renesas/rcar/rcar_def.h
-@@ -257,6 +257,7 @@
+@@ -79,7 +79,7 @@
+ #define DEVICE_RCAR_BASE	0xE6000000U
+ #define DEVICE_RCAR_SIZE	0x00300000U
+ 
+-#if RCAR_LSI == RCAR_V3M
++#if RCAR_LSI == RCAR_V3M || RCAR_LSI == RCAR_V3H
+ #define DEVICE_RCAR_BASE2	MAKE_U(0xE6370000)
+ #else
+ #define DEVICE_RCAR_BASE2	MAKE_U(0xE6360000)
+@@ -261,6 +261,7 @@
  #define RCAR_PRODUCT_M3			(0x00005200U)
  #define RCAR_PRODUCT_V3M		(0x00005400U)
  #define RCAR_PRODUCT_M3N		(0x00005500U)
diff --git a/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb b/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb
index e990273..767692c 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb
+++ b/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb
@@ -11,19 +11,22 @@ S = "${WORKDIR}/git"
 
 BRANCH = "rcar_gen3"
 SRC_URI = "git://github.com/CogentEmbedded/cr7-loader.git;branch=${BRANCH}"
-SRCREV = "9570cd170e876801370560bb0c417816cbfe21d2"
+SRCREV = "f06b622d9f91771076e755aea1aad5fddcb6f172"
 
 PV = "v1.0+renesas+git"
 
-COMPATIBLE_MACHINE = "condor|v3hsk"
+COMPATIBLE_MACHINE = "eagle|condor|v3msk|v3mzf|v3hsk"
 PLATFORM = "rcar"
 
+CR7_OPT_r8a7797 = "LSI=V3M RCAR_DRAM_SPLIT=0 RCAR_KICK_MAIN_CPU=2 RCAR_SECURE_BOOT=0"
+CR7_OPT_r8a7798 = "LSI=V3H RCAR_DRAM_SPLIT=0 RCAR_KICK_MAIN_CPU=2 RCAR_SECURE_BOOT=0"
+
 do_compile() {
     wget https://releases.linaro.org/components/toolchain/binaries/5.1-2015.08/arm-eabi/gcc-linaro-5.1-2015.08-x86_64_arm-eabi.tar.xz
     tar xfJ gcc-linaro-5.1-2015.08-x86_64_arm-eabi.tar.xz
 
-    CROSS_COMPILE=./gcc-linaro-5.1-2015.08-x86_64_arm-eabi/bin/arm-eabi- make RCAR_DRAM_SPLIT=0 RCAR_KICK_MAIN_CPU=2 LSI=V3H RCAR_SECURE_BOOT=0 clean
-    CROSS_COMPILE=./gcc-linaro-5.1-2015.08-x86_64_arm-eabi/bin/arm-eabi- make RCAR_DRAM_SPLIT=0 RCAR_KICK_MAIN_CPU=2 LSI=V3H RCAR_SECURE_BOOT=0
+    CROSS_COMPILE=./gcc-linaro-5.1-2015.08-x86_64_arm-eabi/bin/arm-eabi- make ${CR7_OPT} clean
+    CROSS_COMPILE=./gcc-linaro-5.1-2015.08-x86_64_arm-eabi/bin/arm-eabi- make ${CR7_OPT}
 }
 
 do_deploy() {