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authorVladimir Barinov <vladimir.barinov@cogentembedded.com>2018-01-22 18:12:35 +0300
committerVladimir Barinov <vladimir.barinov@cogentembedded.com>2018-01-22 18:12:35 +0300
commit87c9b2e38b08abd02ed6e6cffeae1f2329709319 (patch)
tree151c7f0a65ccc0961c0c7f67303b42f1dfa8af87
parent21610181defdc3b6e96084615fdd18114db7c019 (diff)
V3M: enable TMU, CMT timers in kernel, add tmu0 timer
1) enable in kernel TMU,CMT timers via Kconfig 2) add missed timer tmu0
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch7
1 files changed, 5 insertions, 2 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch
index ffe7684..dc80f98 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch
@@ -59,12 +59,14 @@ diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index ebe0a37..d3b6771 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
-@@ -166,6 +166,12 @@ config ARCH_R8A77965
+@@ -166,6 +166,14 @@ config ARCH_R8A77965
help
This enables support for the Renesas R-Car M3N SoC.
+config ARCH_R8A7797
+ bool "Renesas R-Car V3M SoC Platform"
++ select SYS_SUPPORTS_SH_TMU
++ select SYS_SUPPORTS_SH_CMT
+ depends on ARCH_RENESAS
+ help
+ This enables support for the Renesas R-Car V3M SoC.
@@ -1263,7 +1265,7 @@ new file mode 100644
index 0000000..6f481a4
--- /dev/null
+++ b/drivers/clk/renesas/r8a7797-cpg-mssr.c
-@@ -0,0 +1,231 @@
+@@ -0,0 +1,232 @@
+/*
+ * r8a7797 Clock Pulse Generator / Module Standby and Software Reset
+ *
@@ -1362,6 +1364,7 @@ index 0000000..6f481a4
+ DEF_MOD("tmu3", 122, R8A7797_CLK_S2D2),
+ DEF_MOD("tmu2", 123, R8A7797_CLK_S2D2),
+ DEF_MOD("tmu1", 124, R8A7797_CLK_S2D2),
++ DEF_MOD("tmu0", 125, R8A7797_CLK_CP),
+ DEF_MOD("ivcp1e", 127, R8A7797_CLK_S2D1),
+ DEF_MOD("scif4", 203, R8A7797_CLK_S2D4), /* @@ H3=S3D4 */
+ DEF_MOD("scif3", 204, R8A7797_CLK_S2D4), /* @@ H3=S3D4 */