V3M/H uboot: fix reset, Micrel phy reset, emmc

1) fix Eagle reset
2) add Condor Micrel PHY reset at startup
3) fix Eagle eMMC (expansion board with emmc 1.8V)
4) remove unused stuff

5 files changed, 85 insertions, 82 deletions

diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0015-board-renesas-Add-V3M-Eagle-board.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0015-board-renesas-Add-V3M-Eagle-board.patch
index 8cecc10..da484f5 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0015-board-renesas-Add-V3M-Eagle-board.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0015-board-renesas-Add-V3M-Eagle-board.patch
@@ -11,10 +11,10 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  board/renesas/eagle/Kconfig     |  15 +++
  board/renesas/eagle/MAINTAINERS |   6 +
  board/renesas/eagle/Makefile    |   9 ++
- board/renesas/eagle/eagle.c     | 246 ++++++++++++++++++++++++++++++++++++++++
+ board/renesas/eagle/eagle.c     | 252 ++++++++++++++++++++++++++++++++++++++++
  configs/r8a7797_eagle_defconfig |   9 ++
- include/configs/r8a7797_eagle.h | 152 +++++++++++++++++++++++++
- 7 files changed, 441 insertions(+)
+ include/configs/r8a7797_eagle.h | 152 ++++++++++++++++++++++++
+ 7 files changed, 447 insertions(+)
  create mode 100644 board/renesas/eagle/Kconfig
  create mode 100644 board/renesas/eagle/MAINTAINERS
  create mode 100644 board/renesas/eagle/Makefile
@@ -93,10 +93,10 @@ index 0000000..87d63e1
 +obj-y	:= eagle.o ../rcar-gen3-common/common.o
 diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
 new file mode 100644
-index 0000000..b38c579
+index 0000000..48ea727
 --- /dev/null
 +++ b/board/renesas/eagle/eagle.c
-@@ -0,0 +1,246 @@
+@@ -0,0 +1,252 @@
 +/*
 + * board/renesas/eagle/eagle.c
 + *     This file is Eagle board support.
@@ -128,28 +128,31 @@ index 0000000..b38c579
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +#define SCIF0_MSTP207		(1 << 7)
-+#define SD2_MSTP314		(1 << 14)
++#define SD0_MSTP314		(1 << 14)
 +#define ETHERAVB_MSTP812	(1 << 12)
-+#define RPC_MSTP917			(1 << 17)
++#define RPC_MSTP917		(1 << 17)
++#define I2C0_MSTP931		(1 << 31)
++
++#define SD0CKCR			0xE6150074
++
++#define PFC_PMMR		0xe6060000
++#define PFC_POC1		0xe6060384
++#define POC_MMC_3V3		0x003ff000
 +
-+#define CLK2MHZ(clk)	(clk / 1000 / 1000)
 +void s_init(void)
 +{
 +	struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
 +	struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-+	u32 stc;
 +
 +	/* Watchdog init */
 +	writel(0xA5A5A500, &rwdt->rwtcsra);
 +	writel(0xA5A5A500, &swdt->swtcsra);
-+
-+	/* CPU frequency setting. Set to 0.8GHz */
-+	stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
-+	clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 +}
 +
 +int board_early_init_f(void)
 +{
++	int freq;
++
 +	rcar_prr_init();
 +
 +	writel(0xa5a5ffff, 0xe6150900);
@@ -158,11 +161,16 @@ index 0000000..b38c579
 +	/* SCIF0 */
 +	mstp_clrbits_le32(MSTPSR2, SMSTPCR2, SCIF0_MSTP207);
 +	/* SDHI2/MMC */
-+	mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD2_MSTP314);
++	mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314);
 +	/* EHTERAVB */
 +	mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812);
 +	/* QSPI */
 +	mstp_clrbits_le32(MSTPSR9, SMSTPCR9, RPC_MSTP917);
++	/* I2C0 */
++	mstp_clrbits_le32(MSTPSR9, SMSTPCR9, I2C0_MSTP931);
++
++	freq = rcar_get_sdhi_config_clk();
++	writel(freq, SD0CKCR);
 +
 +	return 0;
 +}
@@ -181,7 +189,7 @@ index 0000000..b38c579
 +	gpio_request(GPIO_FN_AVB0_AVTP_MATCH, NULL);
 +	gpio_request(GPIO_FN_AVB0_LINK, NULL);
 +	gpio_request(GPIO_FN_AVB0_PHY_INT, NULL);
-+	gpio_request(GPIO_FN_AVB0_MAGIC, NULL);
++	/* gpio_request(GPIO_FN_AVB0_MAGIC, NULL); */
 +	gpio_request(GPIO_FN_AVB0_MDC, NULL);
 +	gpio_request(GPIO_FN_AVB0_MDIO, NULL);
 +	gpio_request(GPIO_FN_AVB0_TXCREFCLK, NULL);
@@ -211,8 +219,8 @@ index 0000000..b38c579
 +	udelay(1);
 +#endif
 +
-+	/* QSPI */
 +#if !defined(CONFIG_SYS_NO_FLASH)
++	/* QSPI */
 +	gpio_request(GPIO_FN_QSPI0_SPCLK, NULL);
 +	gpio_request(GPIO_FN_QSPI0_MOSI_IO0, NULL);
 +	gpio_request(GPIO_FN_QSPI0_MISO_IO1, NULL);
@@ -229,6 +237,12 @@ index 0000000..b38c579
 +	gpio_request(GPIO_FN_RPC_WP_N, NULL);
 +	gpio_request(GPIO_FN_RPC_INT_N, NULL);
 +#endif
++
++#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_RCAR)
++	/* I2C0 to access PMIC */
++	gpio_request(GPIO_IFN_SDA0, NULL);
++	gpio_request(GPIO_IFN_SCL0, NULL);
++#endif
 +	return 0;
 +}
 +
@@ -270,6 +284,8 @@ index 0000000..b38c579
 +{
 +	int ret = -ENODEV;
 +#ifdef CONFIG_SH_SDHI
++	u32 val;
++
 +	/* SDHI2/eMMC */
 +	gpio_request(GPIO_FN_MMC_D0, NULL);
 +	gpio_request(GPIO_FN_MMC_D1, NULL);
@@ -284,6 +300,11 @@ index 0000000..b38c579
 +	gpio_request(GPIO_FN_MMC_CD, NULL);
 +	gpio_request(GPIO_FN_MMC_WP, NULL);
 +
++	val = readl(PFC_POC1);
++	val &= ~POC_MMC_3V3;		/* POC = 1.8V */
++	writel(~val, PFC_PMMR);
++	writel(val, PFC_POC1);
++
 +	ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI2_BASE, 0,
 +			   SH_SDHI_QUIRK_64BIT_BUF);
 +#endif
@@ -294,15 +315,6 @@ index 0000000..b38c579
 +int dram_init(void)
 +{
 +	gd->ram_size = PHYS_SDRAM_1_SIZE;
-+#if (CONFIG_NR_DRAM_BANKS >= 2)
-+	gd->ram_size += PHYS_SDRAM_2_SIZE;
-+#endif
-+#if (CONFIG_NR_DRAM_BANKS >= 3)
-+	gd->ram_size += PHYS_SDRAM_3_SIZE;
-+#endif
-+#if (CONFIG_NR_DRAM_BANKS >= 4)
-+	gd->ram_size += PHYS_SDRAM_4_SIZE;
-+#endif
 +
 +	return 0;
 +}
@@ -311,18 +323,6 @@ index 0000000..b38c579
 +{
 +	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 +	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-+#if (CONFIG_NR_DRAM_BANKS >= 2)
-+	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-+	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-+#endif
-+#if (CONFIG_NR_DRAM_BANKS >= 3)
-+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
-+	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-+#endif
-+#if (CONFIG_NR_DRAM_BANKS >= 4)
-+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
-+	gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-+#endif
 +}
 +
 +const struct rcar_sysinfo sysinfo = {
@@ -331,8 +331,14 @@ index 0000000..b38c579
 +
 +void reset_cpu(ulong addr)
 +{
-+#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
-+	i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
++#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_RCAR)
++	u8 val;
++
++	i2c_set_bus_num(0);
++	i2c_init(400000, 0);
++	i2c_read(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
++	val |= 0x02;
++	i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
 +#endif
 +}
 +
@@ -360,7 +366,7 @@ index 0000000..d68e28f
 +CONFIG_SPI_FLASH_SPANSION=y
 diff --git a/include/configs/r8a7797_eagle.h b/include/configs/r8a7797_eagle.h
 new file mode 100644
-index 0000000..a4ae6bf
+index 0000000..c6ab5b7
 --- /dev/null
 +++ b/include/configs/r8a7797_eagle.h
 @@ -0,0 +1,152 @@
@@ -434,6 +440,7 @@ index 0000000..a4ae6bf
 +#define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 192 / 2)
 +#define CONFIG_S3D2_CLK_FREQ	(266666666u/2)
 +#define CONFIG_S3D4_CLK_FREQ	(266666666u/4)
++#define CONFIG_S2D2_CLK_FREQ	(133333333u)
 +
 +/* Generic Timer Definitions (use in assembler source) */
 +#define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
@@ -445,15 +452,14 @@ index 0000000..a4ae6bf
 +
 +/* i2c */
 +#define CONFIG_SYS_I2C
-+#define CONFIG_SYS_I2C_SH
-+#define CONFIG_SYS_I2C_SLAVE		0x60
-+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	1
-+#define CONFIG_SYS_I2C_SH_SPEED0	400000
-+#define CONFIG_SH_I2C_DATA_HIGH		4
-+#define CONFIG_SH_I2C_DATA_LOW		5
-+#define CONFIG_SH_I2C_CLOCK		10000000
-+
-+#define CONFIG_SYS_I2C_POWERIC_ADDR	0x30
++#define CONFIG_SYS_I2C_RCAR
++#define CONFIG_SYS_RCAR_I2C0_SPEED	400000
++#define CONFIG_SYS_RCAR_I2C1_SPEED	400000
++#define CONFIG_SYS_RCAR_I2C2_SPEED	400000
++#define CONFIG_SYS_RCAR_I2C3_SPEED	400000
++#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS	4
++#define CONFIG_SYS_I2C_POWERIC_ADDR	0x5A
++#define CONFIG_HP_CLK_FREQ		CONFIG_S2D2_CLK_FREQ
 +
 +/* USB */
 +#undef CONFIG_CMD_USB
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0017-board-renesas-Add-V3MSK-board.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0017-board-renesas-Add-V3MSK-board.patch
index 4850e03..f5bcc9c 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0017-board-renesas-Add-V3MSK-board.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0017-board-renesas-Add-V3MSK-board.patch
@@ -11,12 +11,12 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  board/renesas/v3msk/Kconfig     |  15 +++
  board/renesas/v3msk/MAINTAINERS |   6 ++
  board/renesas/v3msk/Makefile    |   9 ++
- board/renesas/v3msk/cpld.c      | 164 +++++++++++++++++++++++++++++++
+ board/renesas/v3msk/cpld.c      | 164 ++++++++++++++++++++++++++++++++
  board/renesas/v3msk/mdio_bb.h   | 156 ++++++++++++++++++++++++++++++
- board/renesas/v3msk/v3msk.c     | 209 ++++++++++++++++++++++++++++++++++++++++
+ board/renesas/v3msk/v3msk.c     | 204 ++++++++++++++++++++++++++++++++++++++++
  configs/v3msk_defconfig         |   9 ++
- include/configs/v3msk.h         | 145 ++++++++++++++++++++++++++++
- 9 files changed, 717 insertions(+)
+ include/configs/v3msk.h         | 133 ++++++++++++++++++++++++++
+ 9 files changed, 700 insertions(+)
  create mode 100644 board/renesas/v3msk/Kconfig
  create mode 100644 board/renesas/v3msk/MAINTAINERS
  create mode 100644 board/renesas/v3msk/Makefile
@@ -429,10 +429,10 @@ index 0000000..0311006
 +}
 diff --git a/board/renesas/v3msk/v3msk.c b/board/renesas/v3msk/v3msk.c
 new file mode 100644
-index 0000000..b0de041
+index 0000000..4e4ee1f
 --- /dev/null
 +++ b/board/renesas/v3msk/v3msk.c
-@@ -0,0 +1,209 @@
+@@ -0,0 +1,203 @@
 +/*
 + * board/renesas/v3msk/v3msk.c
 + *     This is V3MSK board support.
@@ -470,20 +470,14 @@ index 0000000..b0de041
 +
 +#define SD0CKCR		0xE6150074
 +
-+#define CLK2MHZ(clk)	(clk / 1000 / 1000)
 +void s_init(void)
 +{
 +	struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
 +	struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-+	u32 stc;
 +
 +	/* Watchdog init */
 +	writel(0xA5A5A500, &rwdt->rwtcsra);
 +	writel(0xA5A5A500, &swdt->swtcsra);
-+
-+	/* CPU frequency setting. Set to 0.8GHz */
-+	stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
-+	clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 +}
 +
 +int board_early_init_f(void)
@@ -659,10 +653,10 @@ index 0000000..d32840c
 +CONFIG_SPI_FLASH_SPANSION=y
 diff --git a/include/configs/v3msk.h b/include/configs/v3msk.h
 new file mode 100644
-index 0000000..8998da4
+index 0000000..225d462
 --- /dev/null
 +++ b/include/configs/v3msk.h
-@@ -0,0 +1,145 @@
+@@ -0,0 +1,133 @@
 +/*
 + * include/configs/v3msk.h
 + *     This file is V3MSK board configuration.
@@ -742,18 +736,6 @@ index 0000000..8998da4
 +#define GICC_BASE	(0xF1020000)
 +#define CONFIG_GICV2
 +
-+/* i2c */
-+#define CONFIG_SYS_I2C
-+#define CONFIG_SYS_I2C_SH
-+#define CONFIG_SYS_I2C_SLAVE		0x60
-+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	1
-+#define CONFIG_SYS_I2C_SH_SPEED0	400000
-+#define CONFIG_SH_I2C_DATA_HIGH		4
-+#define CONFIG_SH_I2C_DATA_LOW		5
-+#define CONFIG_SH_I2C_CLOCK		10000000
-+
-+#define CONFIG_SYS_I2C_POWERIC_ADDR	0x30
-+
 +/* USB */
 +#undef CONFIG_CMD_USB
 +
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch
index 0718d1c..36644ba 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch
@@ -11,10 +11,10 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  board/renesas/condor/Kconfig     |  15 +++
  board/renesas/condor/MAINTAINERS |   6 +
  board/renesas/condor/Makefile    |  10 ++
- board/renesas/condor/condor.c    | 250 +++++++++++++++++++++++++++++++++++++++
+ board/renesas/condor/condor.c    | 264 +++++++++++++++++++++++++++++++++++++++
  configs/r8a7798_condor_defconfig |  10 ++
- include/configs/r8a7798_condor.h | 160 +++++++++++++++++++++++++
- 7 files changed, 455 insertions(+)
+ include/configs/r8a7798_condor.h | 160 ++++++++++++++++++++++++
+ 7 files changed, 469 insertions(+)
  create mode 100644 board/renesas/condor/Kconfig
  create mode 100644 board/renesas/condor/MAINTAINERS
  create mode 100644 board/renesas/condor/Makefile
@@ -94,10 +94,10 @@ index 0000000..d11d859
 +obj-y	:= condor.o ../rcar-gen3-common/common.o
 diff --git a/board/renesas/condor/condor.c b/board/renesas/condor/condor.c
 new file mode 100644
-index 0000000..67571f6
+index 0000000..a46a1a7
 --- /dev/null
 +++ b/board/renesas/condor/condor.c
-@@ -0,0 +1,250 @@
+@@ -0,0 +1,264 @@
 +/*
 + * board/renesas/condor/condor.c
 + *     This is Condor board support.
@@ -210,6 +210,13 @@ index 0000000..67571f6
 +	gpio_request(GPIO_FN_AVB0_RX_CTL, NULL);
 +	gpio_request(GPIO_IFN_AVB0_AVTP_CAPTURE, NULL);
 +	gpio_request(GPIO_FN_AVB0_AVTP_PPS, NULL);
++
++	/* PHY_RST */
++	gpio_request(GPIO_GP_1_16, NULL);
++	gpio_direction_output(GPIO_GP_1_16, 0);
++	mdelay(20);
++	gpio_set_value(GPIO_GP_1_16, 1);
++	udelay(1);
 +#elif defined(CONFIG_SH_ETHER)
 +	gpio_request(GPIO_FN_GETHER_LINK_A, NULL);
 +	gpio_request(GPIO_FN_GETHER_PHY_INT_A, NULL);
@@ -230,6 +237,13 @@ index 0000000..67571f6
 +	gpio_request(GPIO_FN_GETHER_RD0, NULL);
 +	gpio_request(GPIO_FN_GETHER_RXC, NULL);
 +	gpio_request(GPIO_FN_GETHER_RX_CTL, NULL);
++
++	/* PHY_RST */
++	gpio_request(GPIO_GP_4_22, NULL);
++	gpio_direction_output(GPIO_GP_4_22, 0);
++	mdelay(20);
++	gpio_set_value(GPIO_GP_4_22, 1);
++	udelay(1);
 +#endif
 +	/* QSPI/RPC */
 +	gpio_request(GPIO_FN_QSPI0_SPCLK, NULL);
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch
index b47c724..cea18c3 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch
@@ -17,8 +17,8 @@ index 59d34b8..538cdc2 100644
 --- a/arch/arm/include/asm/arch-rcar_gen3/rcar-base.h
 +++ b/arch/arm/include/asm/arch-rcar_gen3/rcar-base.h
 @@ -78,6 +78,12 @@
- /* SH-I2C */
- #define CONFIG_SYS_I2C_SH_BASE0	0xE60B0000
+ #define CONFIG_SYS_RCAR_I2C2_BASE	0xE6510000
+ #define CONFIG_SYS_RCAR_I2C3_BASE	0xE66D0000
  
 +/* RPC */
 +#define CONFIG_SYS_RPC_BASE		0xEE200000
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend
index 3be0e60..bf3a33b 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend
@@ -12,6 +12,7 @@ SRC_URI_append = " \
     file://0009-configs-rcar-gen3-common-Enable-askenv-command.patch \
     file://0010-configs-rcar-gen3-common-Enable-hush-parser.patch \
     file://0011-configs-rcar-gen3-common-Enable-GPT-support.patch \
+    file://0012-ARM-rcar_gen3-Add-I2C-definitions.patch \
     file://0013-mtd-spi-QSPI-flash-support.patch \
     file://0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch \
     file://0015-board-renesas-Add-V3M-Eagle-board.patch \