diff options
author | Duy Dang <duy.dang.yw@rvc.renesas.com> | 2018-11-06 08:50:46 +0700 |
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committer | Duy Dang <duy.dang.yw@rvc.renesas.com> | 2018-12-20 09:41:35 +0700 |
commit | 1a2393c84e33afdecb09f7988e346a036f62ea44 (patch) | |
tree | 6456147eac2267812a35918ff62dc3fe35be4824 | |
parent | 0814c5cebd418b10a24b11e22ae08a84324d0f27 (diff) |
rcar-gen3: u-boot: Update SRCREV to version 3.9.1
This commit updates SRCREV of U-Boot to version 3.9.1 for
the following changes:
- Generate fitting memory map on R-Car Gen3, fix protection area
access error and fix to enable icache early in R-Car Gen3.
- Add module clock stop before OS startup.
- Reorder TMIO clock handling.
- Do not issue CMD 6 on SD 1.00 and SD 1.01.
- Fix protection area access error at Cortex-A53.
- Avoid unsupported internal delay mode for R-Car E3 and limit to
100Mbps.
- Revert "net: Fix cache misalignment message after network load
operations"
- Add "usb_pgood_delay" to the default environment variable.
- Fix warning of the make W=1 C=2.
- Resolve the problem that the eMMC read of the environment setting
value may fail at startup.
- Add vbus-supply regulator support.
- Resolve the problem that the SD card (UHS, etc.) isn’t
recognized.
- Fix MOD_SEL bit numbering for R-Car E3.
Signed-off-by: Duy Dang <duy.dang.yw@rvc.renesas.com>
Signed-off-by: Khang Nguyen <khang.nguyen.xv@renesas.com>
Signed-off-by: Takamitsu Honda <takamitsu.honda.pv@renesas.com>
-rw-r--r-- | meta-rcar-gen3/recipes-bsp/u-boot/u-boot_2018.09.bb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/meta-rcar-gen3/recipes-bsp/u-boot/u-boot_2018.09.bb b/meta-rcar-gen3/recipes-bsp/u-boot/u-boot_2018.09.bb index 524f18a..50ba275 100644 --- a/meta-rcar-gen3/recipes-bsp/u-boot/u-boot_2018.09.bb +++ b/meta-rcar-gen3/recipes-bsp/u-boot/u-boot_2018.09.bb @@ -4,10 +4,10 @@ require u-boot.inc DEPENDS += "bc-native dtc-native" UBOOT_URL = "git://github.com/renesas-rcar/u-boot.git" -BRANCH = "v2018.09/rcar-3.8.0" +BRANCH = "v2018.09/rcar-3.9.1" SRC_URI = "${UBOOT_URL};branch=${BRANCH}" -SRCREV = "70206a1b84e6e35c33b3760fae6a2a6dbe6ce534" +SRCREV = "4d322dccdcf49c0aab18eb703663128aec81cffc" PV = "v2018.09+git${SRCPV}" UBOOT_SREC_SUFFIX = "srec" |