diff options
author | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2018-01-04 18:53:49 +0300 |
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committer | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2018-01-04 18:53:49 +0300 |
commit | ce2e43bcc02c9d96eddc50ae8b24754f62c2e3fa (patch) | |
tree | 5ea3f1bfb1b3832434d1d7e7d70854a87c553280 /meta-rcar-gen3-adas/recipes-bsp/u-boot | |
parent | 56f087827096aa6b8aadb75e13b79c8ac8feae5e (diff) |
V3M: add IPL
Add V3M in ATF
Diffstat (limited to 'meta-rcar-gen3-adas/recipes-bsp/u-boot')
-rw-r--r-- | meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch | 21 |
1 files changed, 6 insertions, 15 deletions
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch index 8545634..050d98f 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch @@ -3510,19 +3510,7 @@ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-comm index 0a959f7..ec20aba 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h -@@ -93,7 +93,11 @@ - #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } - - /* MEMORY */ -+#if defined(CONFIG_R8A7797) -+#define CONFIG_SYS_TEXT_BASE 0x58280000 -+#else - #define CONFIG_SYS_TEXT_BASE 0x50000000 -+#endif - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7fff0) - - -@@ -124,6 +128,14 @@ +@@ -124,6 +128,17 @@ #define PHYS_SDRAM_1_SIZE ((unsigned long)(0x80000000 - DRAM_RSV_SIZE)) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE @@ -3530,8 +3518,11 @@ index 0a959f7..ec20aba 100644 +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE) /* legacy */ +#define PHYS_SDRAM_1_SIZE ((unsigned long)(0x40000000 - DRAM_RSV_SIZE)) -+#define PHYS_SDRAM_2 0x0600000000 /* ext */ -+#define PHYS_SDRAM_2_SIZE ((unsigned long)0x80000000) ++ #if defined(CONFIG_TARGET_V3MSK) ++ #define PHYS_SDRAM_1_SIZE ((unsigned long)(0x80000000 - DRAM_RSV_SIZE)) ++ #else ++ #define PHYS_SDRAM_1_SIZE ((unsigned long)(0x40000000 - DRAM_RSV_SIZE)) ++ #endif +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE #else |