diff options
author | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2017-09-20 01:40:33 +0300 |
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committer | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2017-09-20 01:44:10 +0300 |
commit | bc699eede30c964b938512470231f6f6088a636b (patch) | |
tree | 2fa2b6afcf2e40327e71c9879e46374afe64c918 /meta-rcar-gen3-adas/recipes-bsp | |
parent | 2212d4e5596911054210a6a3e1bdb6e079de6ed8 (diff) |
switch to 2.23.0 bsp
Diffstat (limited to 'meta-rcar-gen3-adas/recipes-bsp')
6 files changed, 16 insertions, 65 deletions
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0012-board-ulcb-Fix-reset-command-clock-setting.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0012-board-ulcb-Fix-reset-command-clock-setting.patch deleted file mode 100644 index 3ddd592..0000000 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0012-board-ulcb-Fix-reset-command-clock-setting.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 238ab2a2f90819ef4a050b8d2a8f1b1359e2a28a Mon Sep 17 00:00:00 2001 -From: Yusuke Goda <yusuke.goda.sx@renesas.com> -Date: Thu, 11 May 2017 19:46:18 +0900 -Subject: [PATCH] board: ulcb: Fix reset command clock setting - -Reset command uses the power control of the PMIC via CPLD. -CPLD is connected by GPIO2 and GPIO6, so GPIO2 and GPIO6 -clock need to be supplied. - -Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> ---- - board/renesas/ulcb/cpld.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/board/renesas/ulcb/cpld.c b/board/renesas/ulcb/cpld.c -index abc7c84..66922d7 100644 ---- a/board/renesas/ulcb/cpld.c -+++ b/board/renesas/ulcb/cpld.c -@@ -9,6 +9,7 @@ - - #include <common.h> - #include <asm/arch/prr_depend.h> -+#include <asm/arch/rcar-mstp.h> - #include <asm/io.h> - #include <asm/gpio.h> - -@@ -24,6 +25,9 @@ - #define MISO GPIO_GP_6_10 - #endif - -+#define GP2_MSTP910 (1 << 10) -+#define GP6_MSTP906 (1 << 6) -+ - #define CPLD_ADDR_MODE 0x00 /* RW */ - #define CPLD_ADDR_MUX 0x02 /* RW */ - #define CPLD_ADDR_DIPSW6 0x08 /* R */ -@@ -103,6 +107,9 @@ static void cpld_init(void) - val |= PUEN_SSI_SDATA4; - writel(val, PFC_PUEN5); - -+ /* GPIO2, GPIO6 for reset */ -+ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, GP6_MSTP906 | GP2_MSTP910); -+ - gpio_request(SCLK, NULL); - gpio_request(SSTBZ, NULL); - gpio_request(MOSI, NULL); --- -1.9.1 - diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch index 672ec39..c6dc960 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch @@ -44,12 +44,13 @@ diff --git a/arch/arm/cpu/armv8/rcar_gen3/Makefile b/arch/arm/cpu/armv8/rcar_gen index 2bf2416..e85ca94 100644 --- a/arch/arm/cpu/armv8/rcar_gen3/Makefile +++ b/arch/arm/cpu/armv8/rcar_gen3/Makefile -@@ -13,3 +13,5 @@ obj-$(CONFIG_R8A7795) += lowlevel_init.o cpu_info-r8a7795.o \ - pfc.o pfc-r8a7795.o pfc-r8a7795_es.o prr_depend.o +@@ -13,3 +13,6 @@ obj-$(CONFIG_R8A7795) += lowlevel_init.o cpu_info-r8a7795.o \ obj-$(CONFIG_R8A7796) += lowlevel_init.o cpu_info-r8a7796.o \ - pfc.o pfc-r8a7796.o prr_depend.o + pfc.o pfc-r8a7796.o prr_depend.o \ + board.o +obj-$(CONFIG_R8A7797) += lowlevel_init.o cpu_info-r8a7797.o \ -+ pfc.o pfc-r8a7797.o prr_depend.o ++ pfc.o pfc-r8a7797.o prr_depend.o \ ++ board.o diff --git a/arch/arm/cpu/armv8/rcar_gen3/cpu_info-r8a7797.c b/arch/arm/cpu/armv8/rcar_gen3/cpu_info-r8a7797.c new file mode 100644 index 0000000..cc8e1e6 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch index 42782cf..b47c724 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch @@ -17,8 +17,8 @@ index 59d34b8..538cdc2 100644 --- a/arch/arm/include/asm/arch-rcar_gen3/rcar-base.h +++ b/arch/arm/include/asm/arch-rcar_gen3/rcar-base.h @@ -78,6 +78,12 @@ - #define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000 - #define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000 + /* SH-I2C */ + #define CONFIG_SYS_I2C_SH_BASE0 0xE60B0000 +/* RPC */ +#define CONFIG_SYS_RPC_BASE 0xEE200000 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch index 0186c20..bcbf1f6 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch @@ -22,15 +22,15 @@ index 491d378..803636e 100644 +#define RPC_MSTP917 (1 << 17) #define SD0_MSTP314 (1 << 14) #define SD1_MSTP313 (1 << 13) - #define SD2_MSTP312 (1 << 12) /* either MMC0 */ + #define SD2_MSTP312 (1 << 12) /* either MMC0 */ @@ -51,6 +52,8 @@ int board_early_init_f(void) - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SCIF2_MSTP310); /* EHTERAVB */ - mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812); + mstp_clrbits_le32(SMSTPCR8, SMSTPCR8, ETHERAVB_MSTP812); + /* RPC */ -+ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, RPC_MSTP917); ++ mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, RPC_MSTP917); /* eMMC */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); /* SDHI0, 3 */ -- 1.9.3 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch index 1e2c155..6328773 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch @@ -24,13 +24,13 @@ index 3939f97..2e9baac 100644 #define SD1_MSTP313 (1 << 13) #define SD2_MSTP312 (1 << 12) @@ -53,6 +54,8 @@ int board_early_init_f(void) - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SCIF2_MSTP310); /* EHTERAVB */ - mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812); + mstp_clrbits_le32(SMSTPCR8, SMSTPCR8, ETHERAVB_MSTP812); + /* RPC */ -+ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, RPC_MSTP917); ++ mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, RPC_MSTP917); /* eMMC */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); /* SDHI0 */ -- 1.9.3 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend index 5ab8dfd..730c8c2 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend @@ -12,7 +12,6 @@ SRC_URI_append = " \ file://0009-configs-rcar-gen3-common-Enable-askenv-command.patch \ file://0010-configs-rcar-gen3-common-Enable-hush-parser.patch \ file://0011-configs-rcar-gen3-common-Enable-GPT-support.patch \ - file://0012-board-ulcb-Fix-reset-command-clock-setting.patch \ file://0013-mtd-spi-QSPI-flash-support.patch \ file://0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch \ file://0015-board-renesas-Add-V3M-Eagle-board.patch \ |