V3H: Add GETHER

1) Add GETHER in uboot/kernel
2) Condor board: setup as default interface

2 files changed, 93 insertions, 66 deletions

diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0018-arm-renesas-Add-Renesas-R8A7798-SoC-support.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0018-arm-renesas-Add-Renesas-R8A7798-SoC-support.patch
index 026126e..c325687 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0018-arm-renesas-Add-Renesas-R8A7798-SoC-support.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0018-arm-renesas-Add-Renesas-R8A7798-SoC-support.patch
@@ -19,10 +19,11 @@ Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
  arch/arm/include/asm/arch-rcar_gen3/r8a7798.h      |   34 +
  arch/arm/include/asm/arch-rcar_gen3/rcar_gen3.h    |    2 +
  drivers/mtd/spi/sf_probe.c                         |    2 +-
- drivers/net/sh_eth.h                               |    5 +-
+ drivers/net/sh_eth.c                               |   11 +-
+ drivers/net/sh_eth.h                               |    7 +-
  drivers/serial/serial_sh.h                         |    2 +-
- include/configs/rcar-gen3-common.h                 |    4 +
- 14 files changed, 3701 insertions(+), 4 deletions(-)
+ include/configs/rcar-gen3-common.h                 |    6 +
+ 15 files changed, 3714 insertions(+), 6 deletions(-)
  create mode 100644 arch/arm/cpu/armv8/rcar_gen3/cpu_info-r8a7798.c
  create mode 100644 arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7798.c
  create mode 100644 arch/arm/include/asm/arch-rcar_gen3/r8a7798-gpio.h
@@ -3826,36 +3827,75 @@ index 4b9a61b..95129ce 100644
  	if (((flash->dual_flash == SF_SINGLE_FLASH) &&
  	     (flash->size > SPI_FLASH_16MB_BOUN)) ||
  	     ((flash->dual_flash > SF_SINGLE_FLASH) &&
+diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
+index 4bf493e..8226591 100644
+--- a/drivers/net/sh_eth.c
++++ b/drivers/net/sh_eth.c
+@@ -380,8 +380,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
+ 	struct phy_device *phy;
+ 
+ 	/* Configure e-dmac registers */
++	val = EMDR_DESC | EDMR_EL;
++#if defined(CONFIG_R8A7798)
++	val |= EDMR_NBST;
++#endif
+ 	sh_eth_write(eth, (sh_eth_read(eth, EDMR) & ~EMDR_DESC_R) |
+-			(EMDR_DESC | EDMR_EL), EDMR);
++			val, EDMR);
+ 
+ 	sh_eth_write(eth, 0, EESIPR);
+ 	sh_eth_write(eth, 0, TRSCER);
+@@ -417,7 +421,8 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
+ #if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740)
+ 	sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII);
+ #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+-	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
++	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) || \
++	defined(CONFIG_R8A7798)
+ 	sh_eth_write(eth, sh_eth_read(eth, RMIIMR) | 0x1, RMIIMR);
+ #endif
+ 	/* Configure phy */
+@@ -444,7 +449,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
+ 		sh_eth_write(eth, 1, RTRATE);
+ #elif defined(CONFIG_CPU_SH7724) || defined(CONFIG_R8A7790) || \
+ 		defined(CONFIG_R8A7791) || defined(CONFIG_R8A7793) || \
+-		defined(CONFIG_R8A7794)
++		defined(CONFIG_R8A7794) || defined(CONFIG_R8A7798)
+ 		val = ECMR_RTM;
+ #endif
+ 	} else if (phy->speed == 10) {
 diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
-index 5cb520c..591e75d 100644
+index 5cb520c..3c30d42 100644
 --- a/drivers/net/sh_eth.h
 +++ b/drivers/net/sh_eth.h
-@@ -226,7 +226,6 @@ static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = {
- 	[RMII_MII] =  0x0790,
- };
- 
--#if defined(SH_ETH_TYPE_RZ)
- static const u16 sh_eth_offset_rz[SH_ETH_MAX_REGISTER_OFFSET] = {
- 	[EDSR]	= 0x0000,
- 	[EDMR]	= 0x0400,
-@@ -279,7 +278,6 @@ static const u16 sh_eth_offset_rz[SH_ETH_MAX_REGISTER_OFFSET] = {
- 	[MAFCR]	= 0x0778,
- 	[RMII_MII] =  0x0790,
- };
--#endif
- 
- static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
- 	[ECMR]	= 0x0100,
-@@ -361,6 +359,9 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
+@@ -361,6 +361,9 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
  #elif defined(CONFIG_R7S72100)
  #define SH_ETH_TYPE_RZ
  #define BASE_IO_ADDR	0xE8203000
 +#elif defined(CONFIG_R8A7798)
-+#define SH_ETH_TYPE_RZ
++#define SH_ETH_TYPE_GETHER
 +#define BASE_IO_ADDR	0xE7400000
  #endif
  
  /*
+@@ -377,6 +380,7 @@ enum EDSR_BIT {
+ 
+ /* EDMR */
+ enum DMAC_M_BIT {
++	EDMR_NBST	= 0x80, /* DMA transfer burst mode */
+ 	EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
+ #if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_RZ)
+ 	EDMR_SRST	= 0x03, /* Receive/Send reset */
+@@ -567,7 +571,8 @@ enum FELIC_MODE_BIT {
+ #ifdef CONFIG_CPU_SH7724
+ 	ECMR_RTM = 0x00000010,
+ #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+-	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
++	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) || \
++	defined(CONFIG_R8A7798)
+ 	ECMR_RTM = 0x00000004,
+ #endif
+ 
 diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
 index 478824e..ded0d3d 100644
 --- a/drivers/serial/serial_sh.h
@@ -3870,10 +3910,10 @@ index 478824e..ded0d3d 100644
  # define SCSCR_INIT(port)	(port->clk_mode == EXT_CLK ? 0x32 : 0x30)
  				/* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
-index 39d86dd..8124369 100644
+index dc5560d..a3721ad 100644
 --- a/include/configs/rcar-gen3-common.h
 +++ b/include/configs/rcar-gen3-common.h
-@@ -133,6 +133,12 @@
+@@ -134,6 +134,12 @@
   #endif
  #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
  #define CONFIG_SYS_SDRAM_SIZE		PHYS_SDRAM_1_SIZE
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch
index 68e0ac9..ddab534 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0019-board-renesas-Add-Condor-board.patch
@@ -7,14 +7,14 @@ Condor is a board based on R-Car V3H SoC (R8A7798)
 
 Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
 ---
- arch/arm/cpu/armv8/Kconfig       |   7 ++
+ arch/arm/cpu/armv8/Kconfig       |   4 +
  board/renesas/condor/Kconfig     |  15 +++
  board/renesas/condor/MAINTAINERS |   6 +
- board/renesas/condor/Makefile    |   9 ++
- board/renesas/condor/condor.c    | 251 +++++++++++++++++++++++++++++++++++++++
+ board/renesas/condor/Makefile    |  10 ++
+ board/renesas/condor/condor.c    | 239 +++++++++++++++++++++++++++++++++++++++
  configs/r8a7798_condor_defconfig |  10 ++
- include/configs/r8a7798_condor.h | 159 +++++++++++++++++++++++++
- 7 files changed, 457 insertions(+)
+ include/configs/r8a7798_condor.h | 160 ++++++++++++++++++++++++++
+ 7 files changed, 444 insertions(+)
  create mode 100644 board/renesas/condor/Kconfig
  create mode 100644 board/renesas/condor/MAINTAINERS
  create mode 100644 board/renesas/condor/Makefile
@@ -23,7 +23,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  create mode 100644 include/configs/r8a7798_condor.h
 
 diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
-index 343b121..0edd5db 100644
+index 58a9259..0edd5db 100644
 --- a/arch/arm/cpu/armv8/Kconfig
 +++ b/arch/arm/cpu/armv8/Kconfig
 @@ -22,6 +22,9 @@ config TARGET_EAGLE
@@ -36,7 +36,7 @@ index 343b121..0edd5db 100644
  endchoice
  
  config R8A7796X
-@@ -53,5 +59,6 @@ source "board/renesas/salvator-x/Kconfig"
+@@ -56,5 +59,6 @@ source "board/renesas/salvator-x/Kconfig"
  source "board/renesas/ulcb/Kconfig"
  source "board/renesas/eagle/Kconfig"
  source "board/renesas/v3msk/Kconfig"
@@ -66,7 +66,7 @@ index 0000000..21ba79f
 +endif
 diff --git a/board/renesas/condor/MAINTAINERS b/board/renesas/condor/MAINTAINERS
 new file mode 100644
-index 0000000..d0442b8
+index 0000000..9076b24
 --- /dev/null
 +++ b/board/renesas/condor/MAINTAINERS
 @@ -0,0 +1,6 @@
@@ -78,7 +78,7 @@ index 0000000..d0442b8
 +F:	configs/r8a7798_condor_defconfig
 diff --git a/board/renesas/condor/Makefile b/board/renesas/condor/Makefile
 new file mode 100644
-index 0000000..4c5d29b
+index 0000000..d11d859
 --- /dev/null
 +++ b/board/renesas/condor/Makefile
 @@ -0,0 +1,10 @@
@@ -94,10 +94,10 @@ index 0000000..4c5d29b
 +obj-y	:= condor.o ../rcar-gen3-common/common.o
 diff --git a/board/renesas/condor/condor.c b/board/renesas/condor/condor.c
 new file mode 100644
-index 0000000..d31e5fd
+index 0000000..30c155b
 --- /dev/null
 +++ b/board/renesas/condor/condor.c
-@@ -0,0 +1,252 @@
+@@ -0,0 +1,239 @@
 +/*
 + * board/renesas/condor/condor.c
 + *     This is Condor board support.
@@ -160,10 +160,13 @@ index 0000000..d31e5fd
 +	mstp_clrbits_le32(MSTPSR2, SMSTPCR2, SCIF0_MSTP207);
 +	/* SDHI0/MMC */
 +	mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314);
-+	/* Gigabit Ethernet */
-+	mstp_clrbits_le32(MSTPSR8, SMSTPCR8, GETHER_MSTP813);
++#if defined(CONFIG_RAVB)
 +	/* RAVB Ethernet */
 +	mstp_clrbits_le32(MSTPSR8, SMSTPCR8, RAVB_MSTP812);
++#elif defined(CONFIG_SH_ETHER)
++	/* Gigabit Ethernet */
++	mstp_clrbits_le32(MSTPSR8, SMSTPCR8, GETHER_MSTP813);
++#endif
 +	/* QSPI/RPC */
 +	mstp_clrbits_le32(MSTPSR9, SMSTPCR9, RPC_MSTP917);
 +
@@ -175,17 +178,17 @@ index 0000000..d31e5fd
 +
 +int board_init(void)
 +{
-+	/* adress of boot parameters */
++	/* address of boot parameters */
 +	gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
 +
 +	/* Init PFC controller */
 +	pinmux_init();
-+#ifdef CONFIG_RAVB
++#if defined(CONFIG_RAVB)
 +	gpio_request(GPIO_GFN_AVB0_AVTP_CAPTURE, NULL);
 +	gpio_request(GPIO_GFN_AVB0_AVTP_MATCH, NULL);
 +	gpio_request(GPIO_FN_AVB0_LINK, NULL);
 +	gpio_request(GPIO_FN_AVB0_PHY_INT, NULL);
-+	/* gpio_request(GPIO_FN_AVB0_MAGIC, NULL); */
++	/* gpio_request(GPIO_FN_AVB0_MAGIC, NULL); - PHY reset gpio  */
 +	gpio_request(GPIO_FN_AVB0_MDC, NULL);
 +	gpio_request(GPIO_FN_AVB0_MDIO, NULL);
 +	gpio_request(GPIO_FN_AVB0_TXCREFCLK, NULL);
@@ -203,11 +206,10 @@ index 0000000..d31e5fd
 +	gpio_request(GPIO_FN_AVB0_RX_CTL, NULL);
 +	gpio_request(GPIO_IFN_AVB0_AVTP_CAPTURE, NULL);
 +	gpio_request(GPIO_FN_AVB0_AVTP_PPS, NULL);
-+#endif
-+#ifdef CONFIG_SH_ETHER
++#elif defined(CONFIG_SH_ETHER)
 +	gpio_request(GPIO_FN_GETHER_LINK_A, NULL);
 +	gpio_request(GPIO_FN_GETHER_PHY_INT_A, NULL);
-+	/* GPIO_FN_GETHER_MAGIC: PHY reset gpio  */
++	/* gpio_request(GPIO_FN_GETHER_MAGIC, NULL); - PHY reset gpio  */
 +	gpio_request(GPIO_FN_GETHER_MDC_A, NULL);
 +	gpio_request(GPIO_FN_GETHER_MDIO_A, NULL);
 +	gpio_request(GPIO_FN_GETHER_TXCREFCLK, NULL);
@@ -245,18 +247,17 @@ index 0000000..d31e5fd
 +	return 0;
 +}
 +
-+#ifdef CONFIG_RAVB
++#if defined(CONFIG_RAVB)
 +#define MAHR 0xE68005C0
 +#define MALR 0xE68005C8
-+#endif
-+#ifdef CONFIG_SH_ETHER
++#elif defined(CONFIG_SH_ETHER)
 +#define MAHR 0xE74005C0
 +#define MALR 0xE74005C8
 +#endif
 +int board_eth_init(bd_t *bis)
 +{
 +	int ret = -ENODEV;
-+#ifdef CONFIG_RAVB
++
 +	u32 val;
 +	unsigned char enetaddr[6];
 +
@@ -270,24 +271,10 @@ index 0000000..d31e5fd
 +
 +	val = enetaddr[4] << 8 | enetaddr[5];
 +	writel(val, MALR);
-+
++#if defined(CONFIG_RAVB)
 +	ret = ravb_initialize(bis);
-+#endif
-+#ifdef CONFIG_SH_ETHER
-+	u32 val;
-+	unsigned char enetaddr[6];
-+
++#elif defined(CONFIG_SH_ETHER)
 +	ret = sh_eth_initialize(bis);
-+	if (!eth_getenv_enetaddr("ethaddr", enetaddr))
-+		return ret;
-+
-+	/* Set Mac address */
-+	val = enetaddr[0] << 24 | enetaddr[1] << 16 |
-+	    enetaddr[2] << 8 | enetaddr[3];
-+	writel(val, MAHR);
-+
-+	val = enetaddr[4] << 8 | enetaddr[5];
-+	writel(val, MALR);
 +#endif
 +	return ret;
 +}
@@ -368,7 +355,7 @@ index 0000000..1cab2ae
 +CONFIG_SPI_FLASH_BAR=y
 diff --git a/include/configs/r8a7798_condor.h b/include/configs/r8a7798_condor.h
 new file mode 100644
-index 0000000..f0b2e0b
+index 0000000..a7cc2a0
 --- /dev/null
 +++ b/include/configs/r8a7798_condor.h
 @@ -0,0 +1,160 @@
@@ -421,7 +408,7 @@ index 0000000..f0b2e0b
 +#undef CONFIG_SPI_FLASH_SPANSION
 +#endif
 +
-+#if 1
++#if 0
 +/* Ethernet RAVB */
 +#define CONFIG_RAVB
 +#define CONFIG_RAVB_PHY_ADDR	0x0
@@ -433,7 +420,7 @@ index 0000000..f0b2e0b
 +#define CONFIG_BITBANGMII_MULTI
 +#define CONFIG_SH_ETHER_BITBANG
 +#else
-+/* SH Ether */
++/* GETHER */
 +#define CONFIG_NET_MULTI
 +#define CONFIG_SH_ETHER
 +#define CONFIG_SH_ETHER_USE_PORT	0