R8A7797: enable IMR resourses in kernel

1 files changed, 43 insertions, 7 deletions

diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch
index 93cf1ec..d9b00f6 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch
@@ -8,10 +8,10 @@ This adds Renesas R8A7797 SoC support
 Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
 ---
  arch/arm64/Kconfig.platforms                  |    6 +
- arch/arm64/boot/dts/renesas/r8a7797.dtsi      |  973 ++++++++++
+ arch/arm64/boot/dts/renesas/r8a7797.dtsi      | 1005 ++++++++++
  drivers/clk/renesas/Kconfig                   |    1 +
  drivers/clk/renesas/Makefile                  |    1 +
- drivers/clk/renesas/r8a7797-cpg-mssr.c        |  218 +++
+ drivers/clk/renesas/r8a7797-cpg-mssr.c        |  222 +++
  drivers/clk/renesas/rcar-gen3-cpg.c           |   41 +-
  drivers/clk/renesas/rcar-gen3-cpg.h           |    6 +
  drivers/clk/renesas/renesas-cpg-mssr.c        |    6 +
@@ -48,7 +48,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  drivers/thermal/rcar_gen3_thermal.c           |   29 +
  include/dt-bindings/clock/r8a7797-cpg-mssr.h  |   48 +
  include/dt-bindings/power/r8a7797-sysc.h      |   32 +
- 41 files changed, 4256 insertions(+), 30 deletions(-)
+ 41 files changed, 4292 insertions(+), 30 deletions(-)
  create mode 100644 arch/arm64/boot/dts/renesas/r8a7797.dtsi
  create mode 100644 drivers/clk/renesas/r8a7797-cpg-mssr.c
  create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a7797.c
@@ -75,10 +75,10 @@ index 7c104ca..9380fc6 100644
  	help
 diff --git a/arch/arm64/boot/dts/renesas/r8a7797.dtsi b/arch/arm64/boot/dts/renesas/r8a7797.dtsi
 new file mode 100644
-index 0000000..30638e3
+index 0000000..1be93e8
 --- /dev/null
 +++ b/arch/arm64/boot/dts/renesas/r8a7797.dtsi
-@@ -0,0 +1,973 @@
+@@ -0,0 +1,1005 @@
 +/*
 + * Device Tree Source for the r8a7797 SoC
 + *
@@ -1050,6 +1050,38 @@ index 0000000..30638e3
 +			power-domains = <&sysc R8A7797_PD_ALWAYS_ON>;
 +			status = "okay";
 +		};
++
++		imrlx4_ch0: imr-lx4@fe860000 {
++			compatible = "renesas,imr-lx4";
++			reg = <0 0xfe860000 0 0x2000>;
++			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&cpg CPG_MOD 823>;
++			power-domains = <&sysc R8A7797_PD_ALWAYS_ON>;
++		};
++
++		imrlx4_ch1: imr-lx4@fe870000 {
++			compatible = "renesas,imr-lx4";
++			reg = <0 0xfe870000 0 0x2000>;
++			interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&cpg CPG_MOD 822>;
++			power-domains = <&sysc R8A7797_PD_ALWAYS_ON>;
++		};
++
++		imrlx4_ch2: imr-lx4@fe880000 {
++			compatible = "renesas,imr-lx4";
++			reg = <0 0xfe880000 0 0x2000>;
++			interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&cpg CPG_MOD 821>;
++			power-domains = <&sysc R8A7797_PD_ALWAYS_ON>;
++		};
++
++		imrlx4_ch3: imr-lx4@fe890000 {
++			compatible = "renesas,imr-lx4";
++			reg = <0 0xfe890000 0 0x2000>;
++			interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&cpg CPG_MOD 820>;
++			power-domains = <&sysc R8A7797_PD_ALWAYS_ON>;
++		};
 +	};
 +};
 diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
@@ -1078,10 +1110,10 @@ index 1072f76..c6f0abb 100644
  obj-$(CONFIG_CLK_RENESAS_CPG_MSSR)	+= renesas-cpg-mssr.o clk-div6.o
 diff --git a/drivers/clk/renesas/r8a7797-cpg-mssr.c b/drivers/clk/renesas/r8a7797-cpg-mssr.c
 new file mode 100644
-index 0000000..c8e9a3f
+index 0000000..29dfe4a
 --- /dev/null
 +++ b/drivers/clk/renesas/r8a7797-cpg-mssr.c
-@@ -0,0 +1,218 @@
+@@ -0,0 +1,222 @@
 +/*
 + * r8a7797 Clock Pulse Generator / Module Standby and Software Reset
 + *
@@ -1209,6 +1241,10 @@ index 0000000..c8e9a3f
 +	DEF_MOD("vin0",			 811,	R8A7797_CLK_S2D1),
 +	DEF_MOD("etheravb",		 812,	R8A7797_CLK_S2D2),
 +	DEF_MOD("isp",			 817,	R8A7797_CLK_S2D1),	/* @@ Unknown Module Clock */
++	DEF_MOD("imr3",			 820,	R8A7797_CLK_S2D1),
++	DEF_MOD("imr2",			 821,	R8A7797_CLK_S2D1),
++	DEF_MOD("imr1",			 822,	R8A7797_CLK_S2D1),
++	DEF_MOD("imr0",			 823,	R8A7797_CLK_S2D1),
 +	DEF_MOD("gpio5",		 907,	R8A7797_CLK_CP),
 +	DEF_MOD("gpio4",		 908,	R8A7797_CLK_CP),
 +	DEF_MOD("gpio3",		 909,	R8A7797_CLK_CP),