Add V3H support and Condor board

1) add uboot R-Car V3H SoC (r87798) and V3H based Condor board
2) add kernel R-Car V3H SoC (r87798) and V3H based Condor board

1 files changed, 954 insertions, 4 deletions

diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
index ffaf796..483ba45 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
@@ -26,10 +26,11 @@ Videobox Mini board on R8A7795 SoC
 Videobox Mini board on R8A7797 SoC
 Videobox2 board on R8A7795 ES1.x SoC
 Videobox2 board on R8A7795 SoC
+Condor board on R8A7798 SoC
 
 Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
 ---
- arch/arm64/boot/dts/renesas/Makefile               |   20 +
+ arch/arm64/boot/dts/renesas/Makefile               |   21 +
  arch/arm64/boot/dts/renesas/legacy/Makefile        |    8 +
  .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts    | 1710 +++++++++++++++++++
  .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts    |  441 +++++
@@ -67,6 +68,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts  |  518 ++++++
  arch/arm64/boot/dts/renesas/r8a7797-v3msk-view.dts |  298 ++++
  arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts      |  314 ++++
+ arch/arm64/boot/dts/renesas/r8a7798-condor.dts     |  939 +++++++++++
  arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi      |  545 ++++++
  arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi      |   30 +
  arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi       |   46 +
@@ -75,7 +77,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  arch/arm64/boot/dts/renesas/ulcb-vb.dtsi           | 1726 +++++++++++++++++++
  arch/arm64/boot/dts/renesas/ulcb-vb2.dtsi          | 1772 ++++++++++++++++++++
  arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi          |  578 +++++++
- 46 files changed, 19159 insertions(+)
+ 47 files changed, 20099 insertions(+)
  create mode 100644 arch/arm64/boot/dts/renesas/legacy/Makefile
  create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
  create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts
@@ -113,6 +115,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts
  create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-view.dts
  create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7798-condor.dts
  create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi
  create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi
  create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
@@ -123,10 +126,10 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
  create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi
 
 diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index f9c71df..1c63893 100644
+index f9c71df..3b5cff6 100644
 --- a/arch/arm64/boot/dts/renesas/Makefile
 +++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -6,5 +6,25 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
+@@ -6,5 +6,26 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
  dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb
  dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-xs.dtb
  
@@ -146,6 +149,7 @@ index f9c71df..1c63893 100644
 +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-view.dtb
 +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-kf.dtb
 +dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vbm.dtb
++dtb-$(CONFIG_ARCH_R8A7798) += r8a7798-condor.dtb
 +
 +# ADAS legacy boards
 +subdir-y	:= legacy
@@ -12759,6 +12763,952 @@ index 0000000..91d10c5
 +	non-removable;
 +	status = "okay";
 +};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7798-condor.dts b/arch/arm64/boot/dts/renesas/r8a7798-condor.dts
+new file mode 100644
+index 0000000..ed9cc28
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7798-condor.dts
+@@ -0,0 +1,940 @@
++/*
++ * Device Tree Source for the Condor board
++ *
++ * Copyright (C) 2018 Renesas Electronics Corp.
++ * Copyright (C) 2018 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7798.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++	model = "Renesas Condor board based on r8a7798";
++	compatible = "renesas,condor", "renesas,r8a7798";
++
++	aliases {
++		serial0 = &scif0;
++		ethernet0 = &avb;
++	};
++
++	chosen {
++		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
++		stdout-path = "serial0:115200n8";
++	};
++
++
++	memory@48000000 {
++		device_type = "memory";
++		/* first 128MB is reserved for secure area. */
++		reg = <0x0 0x48000000 0x0 0x38000000>;
++	};
++
++	reserved-memory {
++		#address-cells = <2>;
++		#size-cells = <2>;
++		ranges;
++
++		/* device specific region for Lossy Decompression */
++		lossy_decompress: linux,lossy_decompress {
++			no-map;
++			reg = <0x00000000 0x6c000000 0x0 0x03000000>;
++		};
++
++		/* global autoconfigured region for contiguous allocations */
++		linux,cma {
++			compatible = "shared-dma-pool";
++			reusable;
++			reg = <0x00000000 0x6f000000 0x0 0x10000000>;
++			linux,cma-default;
++		};
++
++		/* device specific region for contiguous allocations */
++		linux,multimedia {
++			compatible = "shared-dma-pool";
++			reusable;
++			reg = <0x00000000 0x7f000000 0x0 0x01000000>;
++		};
++	};
++
++	mmngr {
++		compatible = "renesas,mmngr";
++		memory-region = <&lossy_decompress>;
++	};
++
++	mmngrbuf {
++		compatible = "renesas,mmngrbuf";
++	};
++
++	vspm_if {
++		compatible = "renesas,vspm_if";
++	};
++
++	lvds-encoder {
++		compatible = "thine,thc63lvdm83d";
++
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			port@0 {
++				reg = <0>;
++				lvds_enc_in: endpoint {
++					remote-endpoint = <&du_out_lvds0>;
++				};
++			};
++			port@1 {
++				reg = <1>;
++				lvds_enc_out: endpoint {
++					remote-endpoint = <&lvds_in>;
++				};
++			};
++		};
++	};
++
++	lvds {
++		compatible = "lvds-connector";
++
++		width-mm = <210>;
++		height-mm = <158>;
++
++		panel-timing {
++			clock-frequency = <138000000>;
++			hactive = <1920>;
++			vactive = <1080>;
++			hsync-len = <32>;
++			hfront-porch = <20>;
++			hback-porch = <160>;
++			vfront-porch = <3>;
++			vback-porch = <31>;
++			vsync-len = <5>;
++		};
++
++		port {
++			lvds_in: endpoint {
++				remote-endpoint = <&lvds_enc_out>;
++			};
++		};
++	};
++
++	hdmi-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi_con: endpoint {
++			remote-endpoint = <&adv7511_out>;
++			};
++		};
++	};
++
++	dclkin_p0: clock-out0 {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <148500000>;
++	};
++
++	msiof_ref_clk: msiof-ref-clock {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <66666666>;
++	};
++
++	vcc_3v3: regulator0 {
++		compatible = "regulator-fixed";
++		regulator-name = "fixed-VCC3V3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-boot-on;
++		regulator-always-on;
++	};
++
++	vcc_vddq_vin0: regulator1 {
++		compatible = "regulator-fixed";
++		regulator-name = "VCC-VDDQ-VIN0";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-boot-on;
++		regulator-always-on;
++	};
++};
++
++&du {
++	status = "okay";
++
++	ports {
++		port@0 {
++			endpoint {
++				remote-endpoint = <&adv7511_in>;
++			};
++		};
++	};
++};
++
++&extal_clk {
++	clock-frequency = <16666666>;
++};
++
++&extalr_clk {
++	clock-frequency = <32768>;
++};
++
++&pfc {
++	pinctrl-0 = <&scif_clk_pins>;
++	pinctrl-names = "default";
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++
++	scif0_pins: scif0 {
++		groups = "scif0_data";
++		function = "scif0";
++	};
++
++	scif_clk_pins: scif_clk {
++		groups = "scif_clk_b";
++		function = "scif_clk";
++	};
++
++	i2c0_pins: i2c0 {
++		groups = "i2c0";
++		function = "i2c0";
++	};
++
++	i2c1_pins: i2c1 {
++		groups = "i2c1";
++		function = "i2c1";
++	};
++
++	avb_pins: avb {
++		groups = "avb_mdc";
++		function = "avb";
++	};
++
++	sdhi2_pins_1v8: sdhi2_1v8 {
++		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
++		function = "mmc";
++		power-source = <1800>;
++	};
++
++	sdhi2_pins_3v3: sdhi2_3v3 {
++		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
++		function = "mmc";
++		power-source = <3300>;
++	};
++
++	tpu_pins: tpu {
++		/* GP1_19 pin; CP4 test point */
++		groups = "tpu_to0";
++		function = "tpu";
++	};
++};
++
++&scif0 {
++	pinctrl-0 = <&scif0_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&scif_clk {
++	clock-frequency = <14745600>;
++	status = "okay";
++};
++
++&sdhi2 {
++	/* used for on-board eMMC */
++	pinctrl-0 = <&sdhi2_pins_3v3>;
++	pinctrl-1 = <&sdhi2_pins_1v8>;
++	pinctrl-names = "default", "state_uhs";
++
++	vmmc-supply = <&vcc_3v3>;
++	vqmmc-supply = <&vcc_vddq_vin0>;
++	mmc-hs200-1_8v;
++	mmc-hs400-1_8v;
++	bus-width = <8>;
++	non-removable;
++	status = "okay";
++};
++
++&i2c0 {
++	pinctrl-0 = <&i2c0_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++	clock-frequency = <400000>;
++
++	hdmi@39{
++		compatible = "adi,adv7511w";
++		#sound-dai-cells = <0>;
++		reg = <0x39>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
++
++		adi,input-depth = <8>;
++		adi,input-colorspace = "rgb";
++		adi,input-clock = "1x";
++		adi,input-style = <1>;
++		adi,input-justification = "evenly";
++
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			port@0 {
++				reg = <0>;
++				adv7511_in: endpoint {
++					remote-endpoint = <&lvds_enc_out>;
++				};
++			};
++			port@1 {
++				reg = <1>;
++				adv7511_out: endpoint {
++					remote-endpoint = <&hdmi_con>;
++				};
++			};
++		};
++	};
++
++	gpio_exp_20: gpio@20 {
++		compatible = "onsemi,pca9654";
++		reg = <0x20>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++
++	gpio_exp_21: gpio@21 {
++		compatible = "onsemi,pca9654";
++		reg = <0x21>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++};
++
++&i2c1 {
++	pinctrl-0 = <&i2c1_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++	clock-frequency = <400000>;
++
++	ov106xx@0 {
++		compatible = "ovti,ov106xx";
++		reg = <0x60>;
++
++		port@0 {
++			ov106xx_in0: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin0ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++
++	ov106xx@1 {
++		compatible = "ovti,ov106xx";
++		reg = <0x61>;
++
++		port@0 {
++			ov106xx_in1: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin1ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++
++	ov106xx@2 {
++		compatible = "ovti,ov106xx";
++		reg = <0x62>;
++
++		port@0 {
++			ov106xx_in2: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin2ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++
++	ov106xx@3 {
++		compatible = "ovti,ov106xx";
++		reg = <0x63>;
++
++		port@0 {
++			ov106xx_in3: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin3ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des0ep3: endpoint {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++
++	ov106xx@4 {
++		compatible = "ovti,ov106xx";
++		reg = <0x64>;
++
++		port@0 {
++			ov106xx_in4: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin4ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++
++	ov106xx@5 {
++		compatible = "ovti,ov106xx";
++		reg = <0x65>;
++
++		port@0 {
++			ov106xx_in5: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin5ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++
++	ov106xx@6 {
++		compatible = "ovti,ov106xx";
++		reg = <0x66>;
++
++		port@0 {
++			ov106xx_in6: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin6ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++
++	ov106xx@7 {
++		compatible = "ovti,ov106xx";
++		reg = <0x67>;
++
++		port@0 {
++			ov106xx_in7: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin7ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des1ep3: endpoint {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++
++	max9286@0 {
++		compatible = "maxim,max9286";
++		reg = <0x48>;
++		gpios = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>; /* MAX9286 PWDN */
++		maxim,gpio0 = <0>;
++		maxim,sensor_delay = <100>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++
++		port@0 {
++			max9286_des0ep0: endpoint@0 {
++				max9271-addr = <0x50>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++			max9286_des0ep1: endpoint@1 {
++				max9271-addr = <0x51>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++			max9286_des0ep2: endpoint@2 {
++				max9271-addr = <0x52>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++			max9286_des0ep3: endpoint@3 {
++				max9271-addr = <0x53>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			max9286_csi0ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++	};
++
++	max9286@1 {
++		compatible = "maxim,max9286";
++		reg = <0x4a>;
++		gpios = <&gpio_exp_21 0 GPIO_ACTIVE_LOW>; /* MAX9286 PWDN */
++		maxim,gpio0 = <0>;
++		maxim,sensor_delay = <100>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++
++		port@0 {
++			max9286_des1ep0: endpoint@0 {
++				max9271-addr = <0x54>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in4>;
++			};
++			max9286_des1ep1: endpoint@1 {
++				max9271-addr = <0x55>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++			};
++			max9286_des1ep2: endpoint@2 {
++				max9271-addr = <0x56>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in6>;
++			};
++			max9286_des1ep3: endpoint@3 {
++				max9271-addr = <0x57>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in7>;
++			};
++		};
++		port@1 {
++			max9286_csi1ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec {
++	status = "okay";
++};
++
++&wdt0 {
++	timeout-sec = <60>;
++	status = "okay";
++};
++
++&cmt0 {
++	status = "okay";
++};
++
++&cmt1 {
++	status = "okay";
++};
++
++&cmt2 {
++	status = "okay";
++};
++
++&cmt3 {
++	status = "okay";
++};
++
++&tpu {
++	pinctrl-0 = <&tpu_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&tmu0 {
++	status = "okay";
++};
++
++&tmu1 {
++	status = "okay";
++};
++
++&tmu2 {
++	status = "okay";
++};
++
++&tmu3 {
++	status = "okay";
++};
++
++&tmu4 {
++	status = "okay";
++};
++
++&avb {
++	pinctrl-0 = <&avb_pins>;
++	pinctrl-names = "default";
++	renesas,no-ether-link;
++	phy-handle = <&phy0>;
++	status = "okay";
++	phy-int-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>;
++
++	phy0: ethernet-phy@0 {
++		rxc-skew-ps = <1500>;
++		rxdv-skew-ps = <420>; /* default */
++		rxd0-skew-ps = <420>; /* default */
++		rxd1-skew-ps = <420>; /* default */
++		rxd2-skew-ps = <420>; /* default */
++		rxd3-skew-ps = <420>; /* default */
++		txc-skew-ps = <900>; /* default */
++		txen-skew-ps = <420>; /* default */
++		txd0-skew-ps = <420>; /* default */
++		txd1-skew-ps = <420>; /* default */
++		txd2-skew-ps = <420>; /* default */
++		txd3-skew-ps = <420>; /* default */
++		reg = <0>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
++		max-speed = <1000>;
++	};
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in4>;
++			};
++		};
++		port@1 {
++			csi1ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in5>;
++			};
++		};
++		port@1 {
++			csi1ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in6>;
++			};
++		};
++		port@1 {
++			csi1ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in7>;
++			};
++		};
++		port@1 {
++			csi1ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	channel0 {
++		status = "okay";
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
 diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi
 new file mode 100644
 index 0000000..b469ca6