Add QSPI support and Hyperflash devicetree support.

1 files changed, 69 insertions, 0 deletions

diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0126-r8a7798-pinctrl-Add-pin-function-for-hyperflash.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0126-r8a7798-pinctrl-Add-pin-function-for-hyperflash.patch
new file mode 100644
index 0000000..0babaa4
--- /dev/null
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0126-r8a7798-pinctrl-Add-pin-function-for-hyperflash.patch
@@ -0,0 +1,69 @@
+From 6633820967dcedde29b2e0507b7583c08901a12f Mon Sep 17 00:00:00 2001
+From: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
+Date: Thu, 5 Apr 2018 18:32:59 +0300
+Subject: [PATCH] r8a7798: pinctrl: Add pin function for hyperflash
+
+Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7798.c | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7798.c b/drivers/pinctrl/sh-pfc/pfc-r8a7798.c
+index f20afd1..f6f159e 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7798.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7798.c
+@@ -1525,6 +1525,24 @@ static const unsigned int qspi1_data4_mux[] = {
+ 	QSPI1_IO2_MARK, QSPI1_IO3_MARK
+ };
+ 
++static const unsigned int rpc_hyperflash_pins[] = {
++	RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 12),
++	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 7),
++	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9),
++	RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 6),
++	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 4),
++	RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
++	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 0)
++};
++static const unsigned int rpc_hyperflash_mux[] = {
++	RPC_INT_N_MARK, RPC_RESET_N_MARK,
++	QSPI1_SSL_MARK, QSPI1_IO3_MARK,
++	QSPI1_IO2_MARK, QSPI1_MISO_IO1_MARK,
++	QSPI1_MOSI_IO0_MARK, QSPI1_SPCLK_MARK,
++	QSPI0_SSL_MARK, QSPI0_IO3_MARK,
++	QSPI0_IO2_MARK, QSPI0_MISO_IO1_MARK,
++	QSPI0_MOSI_IO0_MARK, QSPI0_SPCLK_MARK
++};
+ 
+ /* - I2C -------------------------------------------------------------------- */
+ static const unsigned int i2c0_pins[] = {
+@@ -2479,6 +2497,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ 	SH_PFC_PIN_GROUP(qspi1_ctrl),
+ 	SH_PFC_PIN_GROUP(qspi1_data2),
+ 	SH_PFC_PIN_GROUP(qspi1_data4),
++	SH_PFC_PIN_GROUP(rpc_hyperflash),
+ };
+ 
+ static const char * const avb_groups[] = {
+@@ -2755,6 +2774,10 @@ static const char * const qspi1_groups[] = {
+ 	"qspi1_data4",
+ };
+ 
++static const char * const rpc_hyperflash_groups[] = {
++	"rpc_hyperflash",
++};
++
+ static const struct sh_pfc_function pinmux_functions[] = {
+ 	SH_PFC_FUNCTION(avb),
+ 	SH_PFC_FUNCTION(gether),
+@@ -2793,6 +2816,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ 	SH_PFC_FUNCTION(vin1),
+ 	SH_PFC_FUNCTION(qspi0),
+ 	SH_PFC_FUNCTION(qspi1),
++	SH_PFC_FUNCTION(rpc_hyperflash),
+ };
+ 
+ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
+-- 
+2.7.4
+