Pack patches: put all ADAS boards patches on one

15 files changed, 13640 insertions, 13979 deletions

diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0031-arm64-dts-r8a7795-es1-salvator-x-view-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0031-arm64-dts-r8a7795-es1-salvator-x-view-add-ADAS-board.patch
deleted file mode 100644
index ddcff1d..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0031-arm64-dts-r8a7795-es1-salvator-x-view-add-ADAS-board.patch
+++ /dev/null
@@ -1,588 +0,0 @@
-From c4d2ada2089db7db1a059af37f371f6e2df213f4 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7795-es1-salvator-x-view: add ADAS board
-
-Salvator-X.View board on R8A7795 ES1.x SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   3 +
- .../dts/renesas/r8a7795-es1-salvator-x-view.dts    | 552 +++++++++++++++++++++
- 2 files changed, 555 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 32fb4d9..2a00759 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -4,5 +4,8 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
- 
-+# ADAS boards
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x-view.dtb
-+
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts
-new file mode 100644
-index 0000000..3f3d66a
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts
-@@ -0,0 +1,552 @@
-+/*
-+ * Device Tree Source for the Salvator-X.View board on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2015-2017 Cogent Embedded, Inc
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-es1-salvator-x.dts"
-+
-+/ {
-+	model = "Renesas Salvator-X.View board based on r8a7795";
-+};
-+
-+&pfc {
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+};
-+
-+&i2c4 {
-+	/delete-node/hdmi-in@34;
-+	/delete-node/composite-in@70;
-+
-+	ov106xx@0 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x60>;
-+
-+		port@0 {
-+			ov106xx_in0: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin0ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@1 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x61>;
-+
-+		port@0 {
-+			ov106xx_in1: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin1ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@2 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x62>;
-+
-+		port@0 {
-+			ov106xx_in2: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin2ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@3 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x63>;
-+
-+		port@0 {
-+			ov106xx_in3: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin3ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des0ep3: endpoint {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@4 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x64>;
-+
-+		port@0 {
-+			ov106xx_in4: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin4ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@5 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x65>;
-+
-+		port@0 {
-+			ov106xx_in5: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin5ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@6 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x66>;
-+
-+		port@0 {
-+			ov106xx_in6: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin6ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@7 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x67>;
-+
-+		port@0 {
-+			ov106xx_in7: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin7ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des1ep3: endpoint {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@0 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x4c>;
-+		gpios = <&gpio6 30 GPIO_ACTIVE_LOW>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+		maxim,i2c-quirk = <0x6c>;
-+
-+		port@0 {
-+			max9286_des0ep0: endpoint@0 {
-+				max9271-addr = <0x50>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+			max9286_des0ep1: endpoint@1 {
-+				max9271-addr = <0x51>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+			max9286_des0ep2: endpoint@2 {
-+				max9271-addr = <0x52>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+			max9286_des0ep3: endpoint@3 {
-+				max9271-addr = <0x53>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi0ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@1 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x6c>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+
-+		port@0 {
-+			max9286_des1ep0: endpoint@0 {
-+				max9271-addr = <0x54>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in4>;
-+			};
-+			max9286_des1ep1: endpoint@1 {
-+				max9271-addr = <0x55>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+			};
-+			max9286_des1ep2: endpoint@2 {
-+				max9271-addr = <0x56>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in6>;
-+			};
-+			max9286_des1ep3: endpoint@3 {
-+				max9271-addr = <0x57>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in7>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi2ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin0 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_20 {
-+	status = "disabled";
-+	/delete-node/ports;
-+};
-+
-+&csi2_40 {
-+	/delete-node/ports;
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0032-arm64-dts-r8a7795-es1-h3ulcb-view-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0032-arm64-dts-r8a7795-es1-h3ulcb-view-add-ADAS-board.patch
deleted file mode 100644
index 24af837..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0032-arm64-dts-r8a7795-es1-h3ulcb-view-add-ADAS-board.patch
+++ /dev/null
@@ -1,581 +0,0 @@
-From 14d2ada2089db7db1a059af37f371f6e2df213f4 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7795-es1-h3ulcb-view: add ADAS board
-
-H3ULCB.View board on R8A7795 ES1.x SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   1 +
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts   | 546 +++++++++++++++++++++
- 2 files changed, 547 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 2a00759..43aa35d 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
- 
- # ADAS boards
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-view.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
-new file mode 100644
-index 0000000..de56fa4
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
-@@ -0,0 +1,546 @@
-+/*
-+ * Device Tree Source for the H3ULCB.View board on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-es1-h3ulcb.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB.View board based on r8a7795";
-+};
-+
-+&i2c4 {
-+	ov106xx@0 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x60>;
-+
-+		port@0 {
-+			ov106xx_in0: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin0ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@1 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x61>;
-+
-+		port@0 {
-+			ov106xx_in1: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin1ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@2 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x62>;
-+
-+		port@0 {
-+			ov106xx_in2: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin2ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@3 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x63>;
-+
-+		port@0 {
-+			ov106xx_in3: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin3ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des0ep3: endpoint {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@4 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x64>;
-+
-+		port@0 {
-+			ov106xx_in4: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin4ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@5 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x65>;
-+
-+		port@0 {
-+			ov106xx_in5: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin5ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@6 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x66>;
-+
-+		port@0 {
-+			ov106xx_in6: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin6ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@7 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x67>;
-+
-+		port@0 {
-+			ov106xx_in7: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin7ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des1ep3: endpoint {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@0 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x4c>;
-+		gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+		maxim,i2c-quirk = <0x6c>;
-+
-+		port@0 {
-+			max9286_des0ep0: endpoint@0 {
-+				max9271-addr = <0x50>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+			max9286_des0ep1: endpoint@1 {
-+				max9271-addr = <0x51>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+			max9286_des0ep2: endpoint@2 {
-+				max9271-addr = <0x52>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+			max9286_des0ep3: endpoint@3 {
-+				max9271-addr = <0x53>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi0ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@1 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x6c>;
-+		gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+
-+		port@0 {
-+			max9286_des1ep0: endpoint@0 {
-+				max9271-addr = <0x54>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in4>;
-+			};
-+			max9286_des1ep1: endpoint@1 {
-+				max9271-addr = <0x55>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+			};
-+			max9286_des1ep2: endpoint@2 {
-+				max9271-addr = <0x56>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in6>;
-+			};
-+			max9286_des1ep3: endpoint@3 {
-+				max9271-addr = <0x57>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in7>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi2ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0033-arm64-dts-r8a7795-es1-h3ulcb-had-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0033-arm64-dts-r8a7795-es1-h3ulcb-had-add-ADAS-board.patch
deleted file mode 100644
index cc85e66..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0033-arm64-dts-r8a7795-es1-h3ulcb-had-add-ADAS-board.patch
+++ /dev/null
@@ -1,321 +0,0 @@
-From 40240b74fe0b5c851127996328504e86a9fc4407 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:41:48 +0300
-Subject: [PATCH] arm64: dts: r8a7795-es1-h3ulcb-had: add ADAS board
-
-H3ULCB.HAD board on R8A7795 ES1.x SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   1 +
- .../dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts    |  22 ++
- .../dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts    |  23 +++
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi   | 224 +++++++++++++++++++++
- 4 files changed, 270 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 43aa35d..51a4ac9 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
- # ADAS boards
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
-new file mode 100644
-index 0000000..6b13f07
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
-@@ -0,0 +1,22 @@
-+/*
-+ * Device Tree Source for the H3ULCB.HAD board Alfa side on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-es1-h3ulcb-had.dtsi"
-+
-+/ {
-+	model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+
-+	/* Root complex */
-+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
-new file mode 100644
-index 0000000..2f8b274
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
-@@ -0,0 +1,23 @@
-+/*
-+ * Device Tree Source for the H3ULCB.HAD board Beta side on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-es1-h3ulcb-had.dtsi"
-+
-+/ {
-+	model = "Renesas H3ULCB.HAD board Beta side based on r8a7795";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+
-+	/* Endpoint */
-+	endpoint;
-+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
-new file mode 100644
-index 0000000..d18ff37
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
-@@ -0,0 +1,225 @@
-+/*
-+ * Device Tree Source for the H3ULCB.HAD board on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/*
-+ * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides)
-+ * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0)
-+ */
-+
-+#include "r8a7795-es1-h3ulcb-view.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB.HAD board based on r8a7795";
-+
-+	aliases {
-+		serial1 = &scif1;
-+		spi1 = &spi0_gpio;
-+		spi2 = &spi1_gpio;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial1:115200n8";
-+	};
-+
-+	spi0_gpio: spi_gpio@0 {
-+		compatible = "spi-gpio";
-+		num-chipselects = <1>;
-+		gpio-sck = <&gpio5 17 0>;
-+		gpio-mosi = <&gpio5 20 0>;
-+		gpio-miso = <&gpio5 22 0>;
-+		cs-gpios = <&gpio5 19 0>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		spidev@0 {
-+			compatible = "spi-gpio";
-+			reg = <0>;
-+			spi-max-frequency = <2000000>;
-+			spi-cpha;
-+			spi-cpol;
-+		};
-+	};
-+
-+	spi1_gpio: spi_gpio@1 {
-+		compatible = "spi-gpio";
-+		num-chipselects = <1>;
-+		gpio-sck = <&gpio6 8 0>;
-+		gpio-mosi = <&gpio6 7 0>;
-+		gpio-miso = <&gpio6 10 0>;
-+		cs-gpios = <&gpio6 5 0>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		spidev@0 {
-+			compatible = "spi-gpio";
-+			reg = <0>;
-+			spi-max-frequency = <2000000>;
-+			spi-cpha;
-+			spi-cpol;
-+		};
-+	};
-+
-+	hdmi1-out {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi1_con: endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_out>;
-+			};
-+		};
-+	};
-+};
-+
-+&du {
-+	ports {
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_in>;
-+			};
-+		};
-+		port@2 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_in>;
-+			};
-+		};
-+	};
-+};
-+
-+&hdmi1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		port@0 {
-+			reg = <0>;
-+				rcar_dw_hdmi1_in: endpoint {
-+				remote-endpoint = <&du_out_hdmi1>;
-+			};
-+		};
-+		port@1 {
-+			reg = <1>;
-+				rcar_dw_hdmi1_out: endpoint {
-+				remote-endpoint = <&hdmi1_con>;
-+			};
-+		};
-+	};
-+};
-+
-+&pfc {
-+	scif1_pins: scif1 {
-+		groups = "scif1_data_a";
-+		function = "scif1";
-+	};
-+
-+	msiof0_pins: spi1 {
-+		groups = "msiof0_clk", "msiof0_rxd",  "msiof0_txd",
-+			 "msiof0_ss1";
-+		function = "msiof0";
-+	};
-+
-+	msiof1_pins: spi2 {
-+		groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a",
-+			 "msiof1_ss1_a";
-+		function = "msiof1";
-+	};
-+
-+	sound_clk_pins: sound-clk {
-+		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
-+			 "audio_clkout_a" /*, "audio_clkout3_a"*/;
-+		function = "audio_clk";
-+	};
-+
-+	usb31_pins: usb31 {
-+		groups = "usb31";
-+		function = "usb31";
-+	};
-+
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	canfd0_pins: canfd0 {
-+		groups = "canfd0_data_a";
-+		function = "canfd0";
-+	};
-+};
-+
-+&scif1 {
-+	pinctrl-0 = <&scif1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&avb {
-+	/delete-property/phy-handle;
-+	/delete-property/phy-gpios;
-+	/delete-node/ethernet-phy@0;
-+
-+	fixed-link {
-+		speed = <1000>;
-+		full-duplex;
-+	};
-+};
-+
-+&msiof0 {
-+	pinctrl-0 = <&msiof0_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+	cs-gpios = <&gpio5 19 0>;
-+
-+	spidev@0 {
-+		compatible = "renesas,sh-msiof";
-+		reg = <0>;
-+		spi-max-frequency = <66666666>;
-+		spi-cpha;
-+		spi-cpol;
-+	};
-+};
-+
-+&msiof1 {
-+	status = "disabled";
-+	cs-gpios = <&gpio6 5 0>;
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+
-+	renesas,can-clock-select = <0x0>;
-+	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
-+		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
-+		>;
-+};
-+
-+&canfd {
-+	pinctrl-0 = <&canfd0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
-+		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
-+		>;
-+
-+	channel0 {
-+		status = "okay";
-+	};
-+};
-+
-+&xhci1 {
-+	status = "okay";
-+	pinctrl-0 = <&usb31_pins>;
-+	pinctrl-names = "default";
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0034-arm64-dts-r8a7795-es1-h3ulcb-kf-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0034-arm64-dts-r8a7795-es1-h3ulcb-kf-add-ADAS-board.patch
deleted file mode 100644
index 5fe2f6f..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0034-arm64-dts-r8a7795-es1-h3ulcb-kf-add-ADAS-board.patch
+++ /dev/null
@@ -1,2265 +0,0 @@
-From f0f043eab3dd06552b3600af1caf50e535f766f1 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7795-es1-h3ulcb-kf: add ADAS board
-
-Kingfisher board on R8A7795 ES1.x SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |    1 +
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts  |  443 ++++++
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts     | 1655 ++++++++++++++++++++
- arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi       |   75 +
- arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi       |   33 +
- 5 files changed, 2207 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
- create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
- create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 51a4ac9..24f8036 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf-v1.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
-new file mode 100644
-index 0000000..d245bbe
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
-@@ -0,0 +1,443 @@
-+/*
-+ * Device Tree Source for the H3ULCB Kingfisher V1 board on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-es1-h3ulcb-kf.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795";
-+
-+	aliases {
-+		serial1 = &hscif0;
-+		serial2 = &hscif1;
-+		serial3 = &scif1;
-+	};
-+
-+	wlan_en: regulator@4 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wlan-en-regulator";
-+
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	codec_en_reg: regulator@6 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "codec-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 15 0>;
-+
-+		/* delay - CHECK */
-+		startup-delay-us = <70000>;
-+		enable-active-high;
-+	};
-+
-+	amp_en_reg: regulator@7 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "amp-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 0 0>;
-+
-+		startup-delay-us = <0>;
-+		enable-active-high;
-+	};
-+
-+	/delete-node/regulator@8;
-+
-+	sdio_switch: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wifi_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_74 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	/delete-node/regulator@10;
-+
-+	radio_switch: regulator@11 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "radio_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	kim {
-+		compatible = "kim";
-+		nshutdown_gpio = <343>;  /* gpio_ext_74 pin 3 */
-+		/* serial1 */
-+		dev_name = "/dev/ttySC1";
-+		flow_cntrl = <1>;
-+		/* int div 8 hscif@26.6666656MHz */
-+		baud_rate = <3333332>;
-+	};
-+
-+	hdmi-out {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con: endpoint {
-+				remote-endpoint = <&adv7513_out>;
-+			};
-+		};
-+	};
-+};
-+
-+&pfc {
-+	/delete-node/hscif4;
-+
-+	scif1_pins: scif1 {
-+		groups = "scif1_data_b";
-+		function = "scif1";
-+	};
-+
-+	hscif0_pins: hscif0 {
-+		groups = "hscif0_data", "hscif0_ctrl";
-+		function = "hscif0";
-+	};
-+
-+	hscif1_pins: hscif1 {
-+		groups = "hscif1_data_a", "hscif1_ctrl_a";
-+		function = "hscif1";
-+	};
-+
-+	du_pins: du {
-+		groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
-+		function = "du";
-+	};
-+};
-+
-+&du {
-+	pinctrl-0 = <&du_pins>;
-+	pinctrl-names = "default";
-+
-+	ports {
-+		port@0 {
-+			endpoint {
-+				remote-endpoint = <&adv7513_in>;
-+			};
-+		};
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_in>;
-+			};
-+		};
-+	};
-+};
-+
-+&gpio0 {
-+	/delete-node/video_a_irq;
-+	/delete-node/video_b_irq;
-+	/delete-node/gpioext_2_20_irq;
-+};
-+
-+&gpio1 {
-+	/delete-node/gpioext_2_21_irq;
-+	/delete-node/wifi_irq;
-+};
-+
-+&gpio2 {
-+	bl_pwm {
-+		gpio-hog;
-+		gpios = <3 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "BL PWM 100%";
-+	};
-+};
-+
-+&gpio5 {
-+	/delete-node/touch_irq;
-+	/delete-node/bt_strap;
-+
-+	/* V1 has h/w bug with swapped RTS and CTS on BT interface */
-+	/* Ignore these pins */
-+	hscif0_cts {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "hscif0 CTS";
-+	};
-+
-+	hscif0_rts {
-+		gpio-hog;
-+		gpios = <16 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "hscif0 RTS";
-+	};
-+};
-+
-+&gpio7 {
-+	/delete-node/gpioext_2_21_irq;
-+};
-+
-+&scif1 {
-+	pinctrl-0 = <&scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hscif0 {
-+	pinctrl-0 = <&hscif0_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&hscif1 {
-+	pinctrl-0 = <&hscif1_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hscif4 {
-+	/delete-property/pinctrl-0;
-+	/delete-property/pinctrl-names;
-+
-+	status = "disabled";
-+};
-+
-+&i2c2 {
-+	/delete-node/pca9535@20;
-+	/delete-node/pca9535@21;
-+
-+	gpio_ext_74: pca9539@74 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x74>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio6>;
-+		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
-+
-+		hub_pwen {
-+			gpio-hog;
-+			gpios = <6 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "HUB pwen";
-+		};
-+		hub_rst {
-+			gpio-hog;
-+			gpios = <7 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "HUB rst";
-+		};
-+		otg_offvbus {
-+			gpio-hog;
-+			gpios = <8 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "OTG off VBUSn";
-+		};
-+		otg_extlpn {
-+			gpio-hog;
-+			gpios = <9 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "OTG EXTLPn";
-+		};
-+		otg_stat1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "OTG Stat1";
-+		};
-+		otg_stat2 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "OTG Stat2";
-+		};
-+	};
-+
-+	gpio_ext_75: pca9539@75 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x75>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio6>;
-+		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
-+
-+		gps_rst {
-+			gpio-hog;
-+			gpios = <6 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "GPS rst";
-+		};
-+		fpdl_shdn {
-+			gpio-hog;
-+			gpios = <9 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "FPDLink shdn";
-+		};
-+	};
-+};
-+
-+&i2cswitch2 {
-+	reg = <0x71>;
-+	reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
-+
-+	i2c@4 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <4>;
-+
-+		hdmi@3d {
-+			compatible = "adi,adv7511w";
-+			reg = <0x3d>;
-+			interrupt-parent = <&gpio2>;
-+			interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
-+			pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
-+
-+			adi,input-depth = <8>;
-+			adi,input-colorspace = "rgb";
-+			adi,input-clock = "1x";
-+			adi,input-style = <1>;
-+			adi,input-justification = "evenly";
-+			adi,clock-delay = <1200>;
-+
-+			ports {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+
-+				port@0 {
-+					reg = <0>;
-+					adv7513_in: endpoint {
-+						remote-endpoint = <&du_out_rgb>;
-+					};
-+				};
-+
-+				port@1 {
-+					reg = <1>;
-+					adv7513_out: endpoint {
-+						remote-endpoint = <&hdmi_con>;
-+					};
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	/delete-node/pca9535@21;
-+
-+	gpio_ext_76: pca9539@76 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x76>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio7>;
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+		port_b_a0 {
-+			gpio-hog;
-+			gpios = <0 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "Video-B A0";
-+		};
-+		port_b_a1 {
-+			gpio-hog;
-+			gpios = <1 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "Video-B A1";
-+		};
-+		port_a_a0 {
-+			gpio-hog;
-+			gpios = <2 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "Video-A A0";
-+		};
-+		port_a_a1 {
-+			gpio-hog;
-+			gpios = <3 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "Video-A A1";
-+		};
-+		/* pin 12 - CAM_CLK */
-+		rpi_cam_io_1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO1";
-+		};
-+		/* pin 11 - CAM_GPIO - assume pwdn */
-+		rpi_cam_io_0 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO0";
-+		};
-+		/* 0 - FPDLink output, 1 - LVDS output */
-+		lvds_vs_fpdl {
-+			gpio-hog;
-+			gpios = <14 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "LVDS switch";
-+		};
-+	};
-+
-+	gpio_ext_77: pca9539@77 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x77>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio5>;
-+		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
-+
-+		mpcie_wake {
-+			gpio-hog;
-+			gpios = <0 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "mPCIe WAKE#";
-+		};
-+		mpcie_wdisable {
-+			gpio-hog;
-+			gpios = <1 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "mPCIe W_DISABLE";
-+		};
-+		mpcie_clreq {
-+			gpio-hog;
-+			gpios = <2 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "mPCIe CLKREQ#";
-+		};
-+		mpcie_ovc {
-+			gpio-hog;
-+			gpios = <3 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "mPCIe OVC";
-+		};
-+	};
-+};
-+
-+&i2cswitch4 {
-+	reg = <0x71>;
-+	reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
-+};
-+
-+&wlcore {
-+	interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
-new file mode 100644
-index 0000000..075bf2c
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
-@@ -0,0 +1,1655 @@
-+/*
-+ * Device Tree Source for the H3ULCB Kingfisher board on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-es1-h3ulcb.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB Kingfisher board based on r8a7795";
-+
-+	aliases {
-+		serial1 = &hscif4;
-+	};
-+
-+	snd_clk: snd_clk {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <24576000>;
-+		clock-output-names = "scki";
-+	};
-+
-+	wlan_en: regulator@4 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wlan-en-regulator";
-+
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vcc_sdhi3: regulator@41 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+	};
-+
-+	vccq_sdhi3: regulator@5 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 VccQ";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	codec_en_reg: regulator@6 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "codec-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 15 0>;
-+
-+		/* delay - CHECK */
-+		startup-delay-us = <70000>;
-+		enable-active-high;
-+	};
-+
-+	amp_en_reg: regulator@7 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "amp-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 0 0>;
-+
-+		startup-delay-us = <0>;
-+		enable-active-high;
-+	};
-+
-+	lvds_switch: regulator@8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "lvds_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio1 24 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	sdio_switch: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wifi_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_20 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	sound_switch: regulator@10 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "pcm3168a_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_21 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	radio_switch: regulator@11 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "radio_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	kim {
-+		compatible = "kim";
-+		nshutdown_gpio = <343>;  /* pca9535@i2c2.0x20 pin 3 */
-+		/* serial1 */
-+		dev_name = "/dev/ttySC1";
-+		flow_cntrl = <1>;
-+		/* int div 8 hscif@26.6666656MHz */
-+		baud_rate = <3333332>;
-+	};
-+
-+	btwilink {
-+		compatible = "btwilink";
-+	};
-+
-+	sound_ext: sound@0 {
-+		pinctrl-0 = <&sound_0_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "pcm3168a";
-+
-+		simple-audio-card,bitclock-master = <&sound_ext_master>;
-+		simple-audio-card,frame-master = <&sound_ext_master>;
-+		sound_ext_master: simple-audio-card,cpu@0 {
-+			sound-dai = <&rcar_sound 0>;
-+			dai-tdm-slot-num = <8>;
-+			dai-tdm-slot-width = <32>;
-+		};
-+
-+		simple-audio-card,codec@0 {
-+			sound-dai = <&pcm3168a>;
-+			dai-tdm-slot-num = <8>;
-+			dai-tdm-slot-width = <32>;
-+			system-clock-frequency = <24576000>;
-+		};
-+	};
-+
-+	/delete-node/sound;
-+
-+	rsnd_ak4613: sound@1 {
-+		pinctrl-0 = <&sound_1_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "ak4613";
-+
-+		simple-audio-card,bitclock-master = <&sndcpu>;
-+		simple-audio-card,frame-master = <&sndcpu>;
-+
-+		sndcpu: simple-audio-card,cpu@1 {
-+			sound-dai = <&rcar_sound 1>;
-+		};
-+
-+		sndcodec: simple-audio-card,codec@1 {
-+			sound-dai = <&ak4613>;
-+		};
-+	};
-+
-+	sound_radio: sound@2 {
-+		pinctrl-0 = <&sound_2_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "i2s";
-+		simple-audio-card,name = "radio";
-+
-+		simple-audio-card,bitclock-master = <&sound_radio_master>;
-+		simple-audio-card,frame-master = <&sound_radio_master>;
-+		simple-audio-card,cpu@2 {
-+			sound-dai = <&rcar_sound 2>;
-+		};
-+
-+		sound_radio_master: simple-audio-card,codec@2 {
-+			sound-dai = <&radio>;
-+			system-clock-frequency = <12288000>;
-+		};
-+	};
-+
-+	lvds-encoder {
-+		compatible = "thine,thc63lvdm83d";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			port@0 {
-+				reg = <0>;
-+				lvds_enc_in: endpoint {
-+					remote-endpoint = <&du_out_lvds0>;
-+				};
-+			};
-+			port@1 {
-+				reg = <1>;
-+				lvds_enc_out: endpoint {
-+					remote-endpoint = <&lvds_in>;
-+				};
-+			};
-+		};
-+	};
-+
-+	lvds {
-+		compatible = "lvds-connector";
-+
-+		width-mm = <210>;
-+		height-mm = <158>;
-+
-+		panel-timing {
-+			/* 1280x800 @60Hz */
-+			clock-frequency = <65000000>;
-+			hactive = <1280>;
-+			vactive = <800>;
-+			hsync-len = <40>;
-+			hfront-porch = <80>;
-+			hback-porch = <40>;
-+			vfront-porch = <14>;
-+			vback-porch = <14>;
-+			vsync-len = <4>;
-+		};
-+
-+		port {
-+			lvds_in: endpoint {
-+				remote-endpoint = <&lvds_enc_out>;
-+			};
-+		};
-+	};
-+
-+	radio: si468x@0 {
-+		compatible = "si,si468x-pcm";
-+		status = "okay";
-+
-+		#sound-dai-cells = <0>;
-+	};
-+};
-+
-+&pfc {
-+	hscif4_pins: hscif4 {
-+		groups = "hscif4_data_a", "hscif4_ctrl";
-+		function = "hscif4";
-+	};
-+
-+	sdhi3_pins_3v3: sd3_3v3 {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+		power-source = <3300>;
-+	};
-+
-+	sound_0_pins: sound0 {
-+		groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
-+		function = "ssi";
-+	};
-+
-+	sound_1_pins: sound1 {
-+		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
-+		function = "ssi";
-+	};
-+
-+	sound_2_pins: sound2 {
-+		groups = "ssi6_ctrl", "ssi6_data";
-+		function = "ssi";
-+	};
-+
-+	usb0_pins: usb0 {
-+		groups = "usb0";
-+		function = "usb0";
-+	};
-+
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+
-+	canfd0_pins: canfd0 {
-+		groups = "canfd0_data_a";
-+		function = "canfd0";
-+	};
-+
-+	canfd1_pins: canfd1 {
-+		groups = "canfd1_data";
-+		function = "canfd1";
-+	};
-+};
-+
-+&gpio0 {
-+	video_a_irq {
-+		gpio-hog;
-+		gpios = <13 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-A irq";
-+	};
-+
-+	video_b_irq {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-B irq";
-+	};
-+
-+	gpioext_2_20_irq {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x20@i2c2 irq";
-+	};
-+};
-+
-+&gpio1 {
-+	gpioext_2_21_irq {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x21@i2c2 irq";
-+	};
-+
-+	wifi_irq {
-+		gpio-hog;
-+		gpios = <25 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "wifi irq";
-+	};
-+};
-+
-+&gpio5 {
-+	touch_irq {
-+		gpio-hog;
-+		gpios = <6 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "touch irq";
-+	};
-+
-+	/* From TI forum */
-+	/* BT_AUD_OUT should be pulled low when WL_EN is activated. */
-+	/* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
-+	bt_strap {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		output-low;
-+		line-name = "BT strap pin";
-+	};
-+};
-+
-+&gpio7 {
-+	gpioext_2_21_irq {
-+		gpio-hog;
-+		gpios = <3 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x21@i2c4 irq";
-+	};
-+};
-+
-+&hscif4 {
-+	pinctrl-0 = <&hscif4_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	clock-frequency = <400000>;
-+
-+	gpio_ext_20: pca9535@20 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x20>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio0>;
-+		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
-+	};
-+
-+	gpio_ext_21: pca9535@21 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x21>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio1>;
-+		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
-+	};
-+
-+	i2cswitch2: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* BCM node(s) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* USB3.0 HUB node(s) */
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* Power amp node(s) */
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* Radio node(s) */
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+			/* A2B node(s) */
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* PCIe node(s) */
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* LVDS display node(s) */
-+
-+			polytouch: edt-ft5x06@38 {
-+				compatible = "edt,edt-ft5x06";
-+				reg = <0x38>;
-+				interrupt-parent = <&gpio5>;
-+				interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
-+			};
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Audio, GPS and Gyro node(s) */
-+
-+			pcm3168a: audio-codec@44 {
-+				#sound-dai-cells = <0>;
-+				compatible = "ti,pcm3168a";
-+				reg = <0x44>;
-+				clocks = <&snd_clk>;
-+				clock-names = "scki";
-+				tdm;
-+				VDD1-supply = <&codec_en_reg>;
-+				VDD2-supply = <&codec_en_reg>;
-+				VCCAD1-supply = <&codec_en_reg>;
-+				VCCAD2-supply = <&codec_en_reg>;
-+				VCCDA1-supply = <&amp_en_reg>;
-+				VCCDA2-supply = <&amp_en_reg>;
-+			};
-+
-+			lsm9ds0_acc_mag@1d {
-+				compatible = "st,lsm9ds0_acc_mag";
-+				reg = <0x1d>;
-+			};
-+
-+			lsm9ds0_gyr@6b {
-+				compatible = "st,lsm9ds0-gyro";
-+				reg = <0x6b>;
-+			};
-+
-+			/* GPS@ 0x42 */
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	gpio_ext_22: pca9535@21 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x22>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio7>;
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+		/* pin 12 - CAM_CLK */
-+		rpi_cam_io_1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO1";
-+		};
-+		/* pin 11 - CAM_GPIO - assume pwdn */
-+		rpi_cam_io_0 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO0";
-+		};
-+	};
-+
-+	i2cswitch4: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* SAM node(s) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* Slot A (CN10) */
-+
-+			ov106xx@0 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x60>;
-+
-+				port@0 {
-+					ov106xx_in0: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin0ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep0>;
-+					};
-+					ov106xx_ti964_des0ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep0>;
-+					};
-+					ov106xx_ti954_des0ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@1 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x61>;
-+
-+				port@0 {
-+					ov106xx_in1: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin1ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep1>;
-+					};
-+					ov106xx_ti964_des0ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep1>;
-+					};
-+					ov106xx_ti954_des0ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@2 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x62>;
-+
-+				port@0 {
-+					ov106xx_in2: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin2ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep2>;
-+					};
-+					ov106xx_ti964_des0ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@3 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x63>;
-+
-+				port@0 {
-+					ov106xx_in3: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin3ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep3>;
-+					};
-+					ov106xx_ti964_des0ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@0 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti964_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti964_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					ti964_des0ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					ti964_des0ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@0 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti954_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti954_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2a */
-+			max9286-max9271@0 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2a>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des0ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					max9286_des0ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					max9286_des0ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					max9286_des0ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi0ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* Slot B (CN11) */
-+
-+			ov106xx@4 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x64>;
-+
-+				port@0 {
-+					ov106xx_in4: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin4ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep0>;
-+					};
-+					ov106xx_ti964_des1ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep0>;
-+					};
-+					ov106xx_ti954_des1ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@5 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x65>;
-+
-+				port@0 {
-+					ov106xx_in5: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin5ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep1>;
-+					};
-+					ov106xx_ti964_des1ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep1>;
-+					};
-+					ov106xx_ti954_des1ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@6 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x66>;
-+
-+				port@0 {
-+					ov106xx_in6: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin6ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep2>;
-+					};
-+					ov106xx_ti964_des1ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@7 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x67>;
-+
-+				port@0 {
-+					ov106xx_in7: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin7ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep3>;
-+					};
-+					ov106xx_ti964_des1ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@1 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti964_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti964_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					ti964_des1ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					ti964_des1ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@1 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti954_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti954_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2a */
-+			max9286-max9271@1 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2a>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des1ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					max9286_des1ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					max9286_des1ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					max9286_des1ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi2ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* Slot B (CN11) */
-+
-+			video_b_ext0: pca9535@27 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x27>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR2";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+				video_b_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B DES_SHDN";
-+				};
-+				video_b_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B led";
-+				};
-+			};
-+
-+			video_b_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B cfg2";
-+				};
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+			};
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Slot A (CN10) */
-+
-+			video_a_ext0: pca9535@26 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x26>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR2";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+				video_a_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A DES_SHDN";
-+				};
-+				video_a_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A led";
-+				};
-+			};
-+
-+			video_a_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg2";
-+				};
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+			vin0_ti964_des0ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep0>;
-+			};
-+			vin0_ti954_des0ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+			vin1_ti964_des0ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep1>;
-+			};
-+			vin1_ti954_des0ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+			vin2_ti964_des0ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+			vin3_ti964_des0ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+			vin4_ti964_des1ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep0>;
-+			};
-+			vin4_ti954_des1ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+			vin5_ti964_des1ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep1>;
-+			};
-+			vin5_ti954_des1ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+			vin6_ti964_des1ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+			vin7_ti964_des1ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&rcar_sound {
-+	pinctrl-0 = <&sound_clk_pins>;
-+
-+	/* Multi DAI */
-+	#sound-dai-cells = <1>;
-+
-+	rcar_sound,dai {
-+		dai0 {
-+			playback = <&ssi7>;
-+			capture  = <&ssi8>;
-+		};
-+
-+		dai1 {
-+			playback = <&ssi0 &src0 &dvc0>;
-+			capture  = <&ssi1 &src1 &dvc1>;
-+		};
-+
-+		dai2 {
-+			capture  = <&ssi6>;
-+		};
-+	};
-+};
-+
-+&sdhi3 {
-+	pinctrl-0 = <&sdhi3_pins_3v3>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&wlan_en>;
-+	vqmmc-supply = <&vccq_sdhi3>;
-+	keep-power-in-suspend;
-+	enable-sdio-wakeup;
-+	bus-width = <4>;
-+	no-1-8-v;
-+	non-removable;
-+	cap-power-off-card;
-+	max-frequency = <26000000>;
-+	status = "okay";
-+
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+	wlcore: wlcore@2 {
-+		compatible = "ti,wl1837";
-+		reg = <2>;
-+		interrupt-parent = <&gpio1>;
-+		interrupts = <25 IRQ_TYPE_EDGE_RISING>;
-+	};
-+};
-+
-+&usb2_phy0 {
-+	pinctrl-0 = <&usb0_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hsusb {
-+	status = "okay";
-+};
-+
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&xhci0 {
-+	status = "okay";
-+};
-+
-+&msiof1 {
-+	status = "disabled";
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&canfd {
-+	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+
-+	channel0 {
-+		status = "okay";
-+	};
-+
-+	channel1 {
-+		status = "okay";
-+	};
-+};
-+
-+/* uncomment to enable CN48 on VIN4 */
-+//#include "ulcb-kf-rpi.dtsi"
-+/* uncomment to enable CN47: SD on SDHI3 */
-+//#include "ulcb-kf-sd3.dtsi"
-diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
-new file mode 100644
-index 0000000..d3b4ece
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
-@@ -0,0 +1,75 @@
-+/*
-+ * Device Tree Source for the H3ULCB Kingfisher board:
-+ * this adding conflicting resource on VIN4 for Raspberry Pi camera
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+&i2cswitch4 {
-+	i2c@4 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <4>;
-+
-+		rpi_camera: ov5647@36 {
-+			compatible = "ovti,ov5647";
-+			reg = <0x36>;
-+
-+			port@0 {
-+				rpi_camera_in: endpoint {
-+					clock-lanes = <0>;
-+					data-lanes = <1 2>;
-+					remote-endpoint = <&vin4ep0>;
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi20";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&rpi_camera_in>;
-+				data-lanes = <1 2>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_20_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_20 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "raw8";
-+			receive,vc = <0>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_20_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2>;
-+			csi-rate = <280>;
-+		};
-+	};
-+};
-diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
-new file mode 100644
-index 0000000..ef481d3
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
-@@ -0,0 +1,33 @@
-+/*
-+ * Device Tree Source for the H3/M3ULCB Kingfisher board:
-+ *  this overrides WIFI in favour SD on SDHI3
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+&sdio_switch {
-+	regulator-name = "sd_on";
-+	enable-active-high;
-+};
-+
-+&sdhi3 {
-+	/delete-property/non-removable;
-+	/delete-property/cap-power-off-card;
-+	/delete-property/keep-power-in-suspend;
-+	/delete-property/enable-sdio-wakeup;
-+	/delete-property/sd-uhs-sdr104;
-+
-+	vmmc-supply = <&vcc_sdhi3>;
-+	max-frequency = <46000000>;
-+	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
-+	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
-+};
-+
-+&wlcore {
-+	status = "disabled";
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0035-arm64-dts-r8a7796-salvator-x-view-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0035-arm64-dts-r8a7796-salvator-x-view-add-ADAS-board.patch
deleted file mode 100644
index e067e58..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0035-arm64-dts-r8a7796-salvator-x-view-add-ADAS-board.patch
+++ /dev/null
@@ -1,353 +0,0 @@
-From 782e569e0b0e252b03fdaecae2e6f7c3267a4bcd Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Mon, 17 Apr 2017 19:12:29 +0300
-Subject: [PATCH] arm64: dts: r8a7796-salvator-x-view: add ADAS board
-
-Salvator-X.View board on R8A7796 SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   1 +
- .../boot/dts/renesas/r8a7796-salvator-x-view.dts   | 318 +++++++++++++++++++++
- 2 files changed, 319 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 49ddbd1..52bbef2 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf-v1.dtb
-+dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x-view.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
-new file mode 100644
-index 0000000..cc6866c
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
-@@ -0,0 +1,318 @@
-+/*
-+ * Device Tree Source for the Salvator-X.View board
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2016-2017 Cogent Embedded, Inc
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7796-salvator-x.dts"
-+
-+/ {
-+	model = "Renesas Salvator-X.View board based on r8a7796";
-+};
-+
-+&pfc {
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+};
-+
-+&i2c4 {
-+	/delete-node/hdmi-in@34;
-+	/delete-node/composite-in@70;
-+
-+	ov106xx@0 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x60>;
-+
-+		port@0 {
-+			ov106xx_in0: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin0ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@1 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x61>;
-+
-+		port@0 {
-+			ov106xx_in1: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin1ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@2 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x62>;
-+
-+		port@0 {
-+			ov106xx_in2: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin2ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@3 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x63>;
-+
-+		port@0 {
-+			ov106xx_in3: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin3ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des0ep3: endpoint {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@0 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x4c>;
-+		gpios = <&gpio6 30 GPIO_ACTIVE_LOW>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+		maxim,i2c-quirk = <0x6c>;
-+
-+		port@0 {
-+			max9286_des0ep0: endpoint@0 {
-+				max9271-addr = <0x50>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+			max9286_des0ep1: endpoint@1 {
-+				max9271-addr = <0x51>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+			max9286_des0ep2: endpoint@2 {
-+				max9271-addr = <0x52>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+			max9286_des0ep3: endpoint@3 {
-+				max9271-addr = <0x53>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi0ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin0 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "disabled";
-+};
-+
-+&vin5 {
-+	status = "disabled";
-+};
-+
-+&vin6 {
-+	status = "disabled";
-+};
-+
-+&vin7 {
-+	status = "disabled";
-+};
-+
-+&csi2_20 {
-+	status = "disabled";
-+	/delete-node/ports;
-+};
-+
-+&csi2_40 {
-+	/delete-node/ports;
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0036-arm64-dts-r8a7796-m3ulcb-view-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0036-arm64-dts-r8a7796-m3ulcb-view-add-ADAS-board.patch
deleted file mode 100644
index 9117b99..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0036-arm64-dts-r8a7796-m3ulcb-view-add-ADAS-board.patch
+++ /dev/null
@@ -1,322 +0,0 @@
-From 51c5d0d6f36c1d049afc542130ac8186c12e3a46 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7796-m3ulcb-view: add ADAS board
-
-M3ULCB.View board on R8A7796 SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   1 +
- .../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts | 287 +++++++++++++++++++++
- 2 files changed, 288 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 52bbef2..06207e3 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf-v1.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts
-new file mode 100644
-index 0000000..1ac0041
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts
-@@ -0,0 +1,287 @@
-+/*
-+ * Device Tree Source for the M3ULCB.View board on r8a7796
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7796-m3ulcb.dts"
-+
-+/ {
-+	model = "Renesas M3ULCB.View board based on r8a7796";
-+};
-+
-+&i2c4 {
-+	ov106xx@0 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x60>;
-+
-+		port@0 {
-+			ov106xx_in0: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin0ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@1 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x61>;
-+
-+		port@0 {
-+			ov106xx_in1: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin1ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@2 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x62>;
-+
-+		port@0 {
-+			ov106xx_in2: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin2ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@3 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x63>;
-+
-+		port@0 {
-+			ov106xx_in3: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin3ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des0ep3: endpoint {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@0 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x4c>;
-+		gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+		maxim,i2c-quirk = <0x6c>;
-+
-+		port@0 {
-+			max9286_des0ep0: endpoint@0 {
-+				max9271-addr = <0x50>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+			max9286_des0ep1: endpoint@1 {
-+				max9271-addr = <0x51>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+			max9286_des0ep2: endpoint@2 {
-+				max9271-addr = <0x52>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+			max9286_des0ep3: endpoint@3 {
-+				max9271-addr = <0x53>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi0ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0037-arm64-dts-r8a7796-m3ulcb-kf-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0037-arm64-dts-r8a7796-m3ulcb-kf-add-ADAS-board.patch
deleted file mode 100644
index be77003..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0037-arm64-dts-r8a7796-m3ulcb-kf-add-ADAS-board.patch
+++ /dev/null
@@ -1,1724 +0,0 @@
-From dffbc2287b4fd0c54b49fd4bb41d7f06c23e20b6 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7796-m3ulcb-kf: add ADAS board
-
-Kingfisher board on R8A7796
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |    1 +
- .../boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts      |  443 +++++++
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts  | 1238 ++++++++++++++++++++
- 3 files changed, 1682 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 5d99267..e41b5b3 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf-v1.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb r8a7796-m3ulcb-kf-v1.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
-new file mode 100644
-index 0000000..ff0ec0f
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
-@@ -0,0 +1,443 @@
-+/*
-+ * Device Tree Source for the M3ULCB Kingfisher V1 board
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7796-m3ulcb-kf.dts"
-+
-+/ {
-+	model = "Renesas M3ULCB Kingfisher V1 board based on r8a7796";
-+
-+	aliases {
-+		serial1 = &hscif0;
-+		serial2 = &hscif1;
-+		serial3 = &scif1;
-+	};
-+
-+	wlan_en: regulator@4 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wlan-en-regulator";
-+
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	codec_en_reg: regulator@6 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "codec-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 15 0>;
-+
-+		/* delay - CHECK */
-+		startup-delay-us = <70000>;
-+		enable-active-high;
-+	};
-+
-+	amp_en_reg: regulator@7 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "amp-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 0 0>;
-+
-+		startup-delay-us = <0>;
-+		enable-active-high;
-+	};
-+
-+	/delete-node/regulator@8;
-+
-+	sdio_switch: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wifi_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_74 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	/delete-node/regulator@10;
-+
-+	radio_switch: regulator@11 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "radio_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	kim {
-+		compatible = "kim";
-+		nshutdown_gpio = <343>;  /* gpio_ext_74 pin 3 */
-+		/* serial1 */
-+		dev_name = "/dev/ttySC1";
-+		flow_cntrl = <1>;
-+		/* int div 8 hscif@26.6666656MHz */
-+		baud_rate = <3333332>;
-+	};
-+
-+	hdmi-out {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con: endpoint {
-+				remote-endpoint = <&adv7513_out>;
-+			};
-+		};
-+	};
-+};
-+
-+&pfc {
-+	/delete-node/hscif4;
-+
-+	scif1_pins: scif1 {
-+		groups = "scif1_data_b";
-+		function = "scif1";
-+	};
-+
-+	hscif0_pins: hscif0 {
-+		groups = "hscif0_data", "hscif0_ctrl";
-+		function = "hscif0";
-+	};
-+
-+	hscif1_pins: hscif1 {
-+		groups = "hscif1_data_a", "hscif1_ctrl_a";
-+		function = "hscif1";
-+	};
-+
-+	du_pins: du {
-+		groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
-+		function = "du";
-+	};
-+};
-+
-+&du {
-+	pinctrl-0 = <&du_pins>;
-+	pinctrl-names = "default";
-+
-+	ports {
-+		port@0 {
-+			endpoint {
-+				remote-endpoint = <&adv7513_in>;
-+			};
-+		};
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_in>;
-+			};
-+		};
-+	};
-+};
-+
-+&gpio0 {
-+	/delete-node/video_a_irq;
-+	/delete-node/video_b_irq;
-+	/delete-node/gpioext_2_20_irq;
-+};
-+
-+&gpio1 {
-+	/delete-node/gpioext_2_21_irq;
-+	/delete-node/wifi_irq;
-+};
-+
-+&gpio2 {
-+	bl_pwm {
-+		gpio-hog;
-+		gpios = <3 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "BL PWM 100%";
-+	};
-+};
-+
-+&gpio5 {
-+	/delete-node/touch_irq;
-+	/delete-node/bt_strap;
-+
-+	/* V1 has h/w bug with swapped RTS and CTS on BT interface */
-+	/* Ignore these pins */
-+	hscif0_cts {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "hscif0 CTS";
-+	};
-+
-+	hscif0_rts {
-+		gpio-hog;
-+		gpios = <16 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "hscif0 RTS";
-+	};
-+};
-+
-+&gpio7 {
-+	/delete-node/gpioext_2_21_irq;
-+};
-+
-+&scif1 {
-+	pinctrl-0 = <&scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hscif0 {
-+	pinctrl-0 = <&hscif0_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&hscif1 {
-+	pinctrl-0 = <&hscif1_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hscif4 {
-+	/delete-property/pinctrl-0;
-+	/delete-property/pinctrl-names;
-+
-+	status = "disabled";
-+};
-+
-+&i2c2 {
-+	/delete-node/pca9535@20;
-+	/delete-node/pca9535@21;
-+
-+	gpio_ext_74: pca9539@74 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x74>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio6>;
-+		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
-+
-+		hub_pwen {
-+			gpio-hog;
-+			gpios = <6 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "HUB pwen";
-+		};
-+		hub_rst {
-+			gpio-hog;
-+			gpios = <7 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "HUB rst";
-+		};
-+		otg_offvbus {
-+			gpio-hog;
-+			gpios = <8 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "OTG off VBUSn";
-+		};
-+		otg_extlpn {
-+			gpio-hog;
-+			gpios = <9 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "OTG EXTLPn";
-+		};
-+		otg_stat1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "OTG Stat1";
-+		};
-+		otg_stat2 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "OTG Stat2";
-+		};
-+	};
-+
-+	gpio_ext_75: pca9539@75 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x75>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio6>;
-+		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
-+
-+		gps_rst {
-+			gpio-hog;
-+			gpios = <6 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "GPS rst";
-+		};
-+		fpdl_shdn {
-+			gpio-hog;
-+			gpios = <9 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "FPDLink shdn";
-+		};
-+	};
-+};
-+
-+&i2cswitch2 {
-+	reg = <0x71>;
-+	reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
-+
-+	i2c@4 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <4>;
-+
-+		hdmi@3d {
-+			compatible = "adi,adv7511w";
-+			reg = <0x3d>;
-+			interrupt-parent = <&gpio2>;
-+			interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
-+			pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
-+
-+			adi,input-depth = <8>;
-+			adi,input-colorspace = "rgb";
-+			adi,input-clock = "1x";
-+			adi,input-style = <1>;
-+			adi,input-justification = "evenly";
-+			adi,clock-delay = <1200>;
-+
-+			ports {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+
-+				port@0 {
-+					reg = <0>;
-+					adv7513_in: endpoint {
-+						remote-endpoint = <&du_out_rgb>;
-+					};
-+				};
-+
-+				port@1 {
-+					reg = <1>;
-+					adv7513_out: endpoint {
-+						remote-endpoint = <&hdmi_con>;
-+					};
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	/delete-node/pca9535@21;
-+
-+	gpio_ext_76: pca9539@76 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x76>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio7>;
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+		port_b_a0 {
-+			gpio-hog;
-+			gpios = <0 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "Video-B A0";
-+		};
-+		port_b_a1 {
-+			gpio-hog;
-+			gpios = <1 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "Video-B A1";
-+		};
-+		port_a_a0 {
-+			gpio-hog;
-+			gpios = <2 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "Video-A A0";
-+		};
-+		port_a_a1 {
-+			gpio-hog;
-+			gpios = <3 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "Video-A A1";
-+		};
-+		/* pin 12 - CAM_CLK */
-+		rpi_cam_io_1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO1";
-+		};
-+		/* pin 11 - CAM_GPIO - assume pwdn */
-+		rpi_cam_io_0 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO0";
-+		};
-+		/* 0 - FPDLink output, 1 - LVDS output */
-+		lvds_vs_fpdl {
-+			gpio-hog;
-+			gpios = <14 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "LVDS switch";
-+		};
-+	};
-+
-+	gpio_ext_77: pca9539@77 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x77>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio5>;
-+		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
-+
-+		mpcie_wake {
-+			gpio-hog;
-+			gpios = <0 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "mPCIe WAKE#";
-+		};
-+		mpcie_wdisable {
-+			gpio-hog;
-+			gpios = <1 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "mPCIe W_DISABLE";
-+		};
-+		mpcie_clreq {
-+			gpio-hog;
-+			gpios = <2 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "mPCIe CLKREQ#";
-+		};
-+		mpcie_ovc {
-+			gpio-hog;
-+			gpios = <3 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "mPCIe OVC";
-+		};
-+	};
-+};
-+
-+&i2cswitch4 {
-+	reg = <0x71>;
-+	reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
-+};
-+
-+&wlcore {
-+	interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
-new file mode 100644
-index 0000000..39eab1f
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
-@@ -0,0 +1,1238 @@
-+/*
-+ * Device Tree Source for the M3ULCB Kingfisher board on r8a7796
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7796-m3ulcb.dts"
-+
-+/ {
-+	model = "Renesas M3ULCB Kingfisher board based on r8a7796";
-+
-+	aliases {
-+		serial1 = &hscif4;
-+	};
-+
-+	snd_clk: snd_clk {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <24576000>;
-+		clock-output-names = "scki";
-+	};
-+
-+	wlan_en: regulator@4 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wlan-en-regulator";
-+
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vcc_sdhi3: regulator@41 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+	};
-+
-+	vccq_sdhi3: regulator@5 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 VccQ";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	codec_en_reg: regulator@6 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "codec-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 15 0>;
-+
-+		/* delay - CHECK */
-+		startup-delay-us = <70000>;
-+		enable-active-high;
-+	};
-+
-+	amp_en_reg: regulator@7 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "amp-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 0 0>;
-+
-+		startup-delay-us = <0>;
-+		enable-active-high;
-+	};
-+
-+	lvds_switch: regulator@8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "lvds_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio1 24 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	sdio_switch: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wifi_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_20 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	sound_switch: regulator@10 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "pcm3168a_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_21 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	radio_switch: regulator@11 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "radio_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	kim {
-+		compatible = "kim";
-+		nshutdown_gpio = <343>;  /* pca9535@i2c2.0x20 pin 3 */
-+		/* serial1 */
-+		dev_name = "/dev/ttySC1";
-+		flow_cntrl = <1>;
-+		/* int div 8 hscif@26.6666656MHz */
-+		baud_rate = <3333332>;
-+	};
-+
-+	btwilink {
-+		compatible = "btwilink";
-+	};
-+
-+	sound_ext: sound@0 {
-+		pinctrl-0 = <&sound_0_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "pcm3168a";
-+
-+		simple-audio-card,bitclock-master = <&sound_ext_master>;
-+		simple-audio-card,frame-master = <&sound_ext_master>;
-+		sound_ext_master: simple-audio-card,cpu@0 {
-+			sound-dai = <&rcar_sound 0>;
-+			dai-tdm-slot-num = <8>;
-+			dai-tdm-slot-width = <32>;
-+		};
-+
-+		simple-audio-card,codec@0 {
-+			sound-dai = <&pcm3168a>;
-+			dai-tdm-slot-num = <8>;
-+			dai-tdm-slot-width = <32>;
-+			system-clock-frequency = <24576000>;
-+		};
-+	};
-+
-+	/delete-node/sound;
-+
-+	rsnd_ak4613: sound@1 {
-+		pinctrl-0 = <&sound_1_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "ak4613";
-+
-+		simple-audio-card,bitclock-master = <&sndcpu>;
-+		simple-audio-card,frame-master = <&sndcpu>;
-+
-+		sndcpu: simple-audio-card,cpu@1 {
-+			sound-dai = <&rcar_sound 1>;
-+		};
-+
-+		sndcodec: simple-audio-card,codec@1 {
-+			sound-dai = <&ak4613>;
-+		};
-+	};
-+
-+	sound_radio: sound@2 {
-+		pinctrl-0 = <&sound_2_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "i2s";
-+		simple-audio-card,name = "radio";
-+
-+		simple-audio-card,bitclock-master = <&sound_radio_master>;
-+		simple-audio-card,frame-master = <&sound_radio_master>;
-+		simple-audio-card,cpu@2 {
-+			sound-dai = <&rcar_sound 2>;
-+		};
-+
-+		sound_radio_master: simple-audio-card,codec@2 {
-+			sound-dai = <&radio>;
-+			system-clock-frequency = <12288000>;
-+		};
-+	};
-+
-+	lvds-encoder {
-+		compatible = "thine,thc63lvdm83d";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			port@0 {
-+				reg = <0>;
-+				lvds_enc_in: endpoint {
-+					remote-endpoint = <&du_out_lvds0>;
-+				};
-+			};
-+			port@1 {
-+				reg = <1>;
-+				lvds_enc_out: endpoint {
-+					remote-endpoint = <&lvds_in>;
-+				};
-+			};
-+		};
-+	};
-+
-+	lvds {
-+		compatible = "lvds-connector";
-+
-+		width-mm = <210>;
-+		height-mm = <158>;
-+
-+		panel-timing {
-+			/* 1280x800 @60Hz */
-+			clock-frequency = <65000000>;
-+			hactive = <1280>;
-+			vactive = <800>;
-+			hsync-len = <40>;
-+			hfront-porch = <80>;
-+			hback-porch = <40>;
-+			vfront-porch = <14>;
-+			vback-porch = <14>;
-+			vsync-len = <4>;
-+		};
-+
-+		port {
-+			lvds_in: endpoint {
-+				remote-endpoint = <&lvds_enc_out>;
-+			};
-+		};
-+	};
-+
-+	radio: si468x@0 {
-+		compatible = "si,si468x-pcm";
-+		status = "okay";
-+
-+		#sound-dai-cells = <0>;
-+	};
-+};
-+
-+&pfc {
-+	hscif4_pins: hscif4 {
-+		groups = "hscif4_data_a", "hscif4_ctrl";
-+		function = "hscif4";
-+	};
-+
-+	sdhi3_pins_3v3: sd3_3v3 {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+		power-source = <3300>;
-+	};
-+
-+	sound_0_pins: sound0 {
-+		groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
-+		function = "ssi";
-+	};
-+
-+	sound_1_pins: sound1 {
-+		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
-+		function = "ssi";
-+	};
-+
-+	sound_2_pins: sound2 {
-+		groups = "ssi6_ctrl", "ssi6_data";
-+		function = "ssi";
-+	};
-+
-+	usb0_pins: usb0 {
-+		groups = "usb0";
-+		function = "usb0";
-+	};
-+
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+
-+	canfd0_pins: canfd0 {
-+		groups = "canfd0_data_a";
-+		function = "canfd0";
-+	};
-+
-+	canfd1_pins: canfd1 {
-+		groups = "canfd1_data";
-+		function = "canfd1";
-+	};
-+};
-+
-+&gpio0 {
-+	video_a_irq {
-+		gpio-hog;
-+		gpios = <13 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-A irq";
-+	};
-+
-+	video_b_irq {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-B irq";
-+	};
-+
-+	gpioext_2_20_irq {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x20@i2c2 irq";
-+	};
-+};
-+
-+&gpio1 {
-+	gpioext_2_21_irq {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x21@i2c2 irq";
-+	};
-+
-+	wifi_irq {
-+		gpio-hog;
-+		gpios = <25 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "wifi irq";
-+	};
-+};
-+
-+&gpio5 {
-+	touch_irq {
-+		gpio-hog;
-+		gpios = <6 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "touch irq";
-+	};
-+
-+	/* From TI forum */
-+	/* BT_AUD_OUT should be pulled low when WL_EN is activated. */
-+	/* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
-+	bt_strap {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		output-low;
-+		line-name = "BT strap pin";
-+	};
-+};
-+
-+&gpio7 {
-+	gpioext_2_21_irq {
-+		gpio-hog;
-+		gpios = <3 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x21@i2c4 irq";
-+	};
-+};
-+
-+&hscif4 {
-+	pinctrl-0 = <&hscif4_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	clock-frequency = <400000>;
-+
-+	gpio_ext_20: pca9535@20 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x20>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio0>;
-+		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
-+	};
-+
-+	gpio_ext_21: pca9535@21 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x21>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio1>;
-+		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
-+	};
-+
-+	i2cswitch2: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* BCM node(s) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* USB3.0 HUB node(s) */
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* Power amp node(s) */
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* Radio node(s) */
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+			/* A2B node(s) */
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* PCIe node(s) */
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* LVDS display node(s) */
-+
-+			polytouch: edt-ft5x06@38 {
-+				compatible = "edt,edt-ft5x06";
-+				reg = <0x38>;
-+				interrupt-parent = <&gpio5>;
-+				interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
-+			};
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Audio, GPS and Gyro node(s) */
-+
-+			pcm3168a: audio-codec@44 {
-+				#sound-dai-cells = <0>;
-+				compatible = "ti,pcm3168a";
-+				reg = <0x44>;
-+				clocks = <&snd_clk>;
-+				clock-names = "scki";
-+				tdm;
-+				VDD1-supply = <&codec_en_reg>;
-+				VDD2-supply = <&codec_en_reg>;
-+				VCCAD1-supply = <&codec_en_reg>;
-+				VCCAD2-supply = <&codec_en_reg>;
-+				VCCDA1-supply = <&amp_en_reg>;
-+				VCCDA2-supply = <&amp_en_reg>;
-+			};
-+
-+			lsm9ds0_acc_mag@1d {
-+				compatible = "st,lsm9ds0_acc_mag";
-+				reg = <0x1d>;
-+			};
-+
-+			lsm9ds0_gyr@6b {
-+				compatible = "st,lsm9ds0-gyro";
-+				reg = <0x6b>;
-+			};
-+
-+			/* GPS@ 0x42 */
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	gpio_ext_22: pca9535@21 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x22>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio7>;
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+		/* pin 12 - CAM_CLK */
-+		rpi_cam_io_1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO1";
-+		};
-+		/* pin 11 - CAM_GPIO - assume pwdn */
-+		rpi_cam_io_0 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO0";
-+		};
-+	};
-+
-+	i2cswitch4: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* SAM node(s) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* Slot A (CN10) */
-+
-+			ov106xx@0 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x60>;
-+
-+				port@0 {
-+					ov106xx_in0: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin0ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep0>;
-+					};
-+					ov106xx_ti964_des0ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep0>;
-+					};
-+					ov106xx_ti954_des0ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@1 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x61>;
-+
-+				port@0 {
-+					ov106xx_in1: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin1ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep1>;
-+					};
-+					ov106xx_ti964_des0ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep1>;
-+					};
-+					ov106xx_ti954_des0ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@2 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x62>;
-+
-+				port@0 {
-+					ov106xx_in2: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin2ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep2>;
-+					};
-+					ov106xx_ti964_des0ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@3 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x63>;
-+
-+				port@0 {
-+					ov106xx_in3: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin3ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep3>;
-+					};
-+					ov106xx_ti964_des0ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@0 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti964_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti964_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					ti964_des0ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					ti964_des0ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@0 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti954_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti954_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2a */
-+			max9286-max9271@0 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2a>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des0ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					max9286_des0ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					max9286_des0ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					max9286_des0ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi0ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* MOST node(s) */
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+
-+			rpi_camera: ov5647@36 {
-+				compatible = "ovti,ov5647";
-+				reg = <0x36>;
-+
-+				port@0 {
-+					rpi_camera_in: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2>;
-+						remote-endpoint = <&vin4ep0>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* CMOS camera node(s) */
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Slot A (CN10) */
-+
-+			video_a_ext0: pca9535@26 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x26>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR2";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+				video_a_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A DES_SHDN";
-+				};
-+				video_a_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A led";
-+				};
-+			};
-+
-+			video_a_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg2";
-+				};
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+			vin0_ti964_des0ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep0>;
-+			};
-+			vin0_ti954_des0ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+			vin1_ti964_des0ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep1>;
-+			};
-+			vin1_ti954_des0ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+			vin2_ti964_des0ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+			vin3_ti964_des0ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi20";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&rpi_camera_in>;
-+				data-lanes = <1 2>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_20_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_20 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "raw8";
-+			receive,vc = <0>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_20_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2>;
-+			csi-rate = <280>;
-+		};
-+	};
-+};
-+
-+&rcar_sound {
-+	pinctrl-0 = <&sound_clk_pins>;
-+
-+	/* Multi DAI */
-+	#sound-dai-cells = <1>;
-+
-+	rcar_sound,dai {
-+		dai0 {
-+			playback = <&ssi7>;
-+			capture  = <&ssi8>;
-+		};
-+
-+		dai1 {
-+			playback = <&ssi0 &src0 &dvc0>;
-+			capture  = <&ssi1 &src1 &dvc1>;
-+		};
-+
-+		dai2 {
-+			capture  = <&ssi6>;
-+		};
-+	};
-+};
-+
-+&sdhi3 {
-+	pinctrl-0 = <&sdhi3_pins_3v3>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&wlan_en>;
-+	vqmmc-supply = <&vccq_sdhi3>;
-+	keep-power-in-suspend;
-+	enable-sdio-wakeup;
-+	bus-width = <4>;
-+	no-1-8-v;
-+	non-removable;
-+	cap-power-off-card;
-+	max-frequency = <26000000>;
-+	status = "okay";
-+
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+	wlcore: wlcore@2 {
-+		compatible = "ti,wl1837";
-+		reg = <2>;
-+		interrupt-parent = <&gpio1>;
-+		interrupts = <25 IRQ_TYPE_EDGE_RISING>;
-+	};
-+};
-+
-+&usb2_phy0 {
-+	pinctrl-0 = <&usb0_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hsusb {
-+	status = "okay";
-+};
-+
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&xhci0 {
-+	status = "okay";
-+};
-+
-+&msiof1 {
-+	status = "disabled";
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&canfd {
-+	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+
-+	channel0 {
-+		status = "okay";
-+	};
-+
-+	channel1 {
-+		status = "okay";
-+	};
-+};
-+
-+/* uncomment to enable CN47: SD on SDHI3 */
-+//#include "ulcb-kf-sd3.dtsi"
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0038-arm64-dts-r8a7795-salvator-x-view-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0038-arm64-dts-r8a7795-salvator-x-view-add-ADAS-board.patch
deleted file mode 100644
index d78b009..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0038-arm64-dts-r8a7795-salvator-x-view-add-ADAS-board.patch
+++ /dev/null
@@ -1,587 +0,0 @@
-From c5d2ada2089db7db1a059af37f371f6e2df213f4 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7795-salvator-x-view: add ADAS board
-
-Salvator-X.View board on R8A7795 SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   3 +
- .../dts/renesas/r8a7795-salvator-x-view.dts    | 552 +++++++++++++++++++++
- 2 files changed, 555 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 32fb4d9..2a00759 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb r8a7796-m3ulcb-kf-v1.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
-new file mode 100644
-index 0000000..3f3d66a
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
-@@ -0,0 +1,552 @@
-+/*
-+ * Device Tree Source for the Salvator-X.View board
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2015-2017 Cogent Embedded, Inc
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-salvator-x.dts"
-+
-+/ {
-+	model = "Renesas Salvator-X.View board based on r8a7795";
-+};
-+
-+&pfc {
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+};
-+
-+&i2c4 {
-+	/delete-node/hdmi-in@34;
-+	/delete-node/composite-in@70;
-+
-+	ov106xx@0 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x60>;
-+
-+		port@0 {
-+			ov106xx_in0: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin0ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@1 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x61>;
-+
-+		port@0 {
-+			ov106xx_in1: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin1ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@2 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x62>;
-+
-+		port@0 {
-+			ov106xx_in2: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin2ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@3 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x63>;
-+
-+		port@0 {
-+			ov106xx_in3: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin3ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des0ep3: endpoint {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@4 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x64>;
-+
-+		port@0 {
-+			ov106xx_in4: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin4ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@5 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x65>;
-+
-+		port@0 {
-+			ov106xx_in5: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin5ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@6 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x66>;
-+
-+		port@0 {
-+			ov106xx_in6: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin6ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@7 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x67>;
-+
-+		port@0 {
-+			ov106xx_in7: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin7ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des1ep3: endpoint {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@0 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x4c>;
-+		gpios = <&gpio6 30 GPIO_ACTIVE_LOW>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+		maxim,i2c-quirk = <0x6c>;
-+
-+		port@0 {
-+			max9286_des0ep0: endpoint@0 {
-+				max9271-addr = <0x50>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+			max9286_des0ep1: endpoint@1 {
-+				max9271-addr = <0x51>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+			max9286_des0ep2: endpoint@2 {
-+				max9271-addr = <0x52>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+			max9286_des0ep3: endpoint@3 {
-+				max9271-addr = <0x53>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi0ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@1 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x6c>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+
-+		port@0 {
-+			max9286_des1ep0: endpoint@0 {
-+				max9271-addr = <0x54>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in4>;
-+			};
-+			max9286_des1ep1: endpoint@1 {
-+				max9271-addr = <0x55>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+			};
-+			max9286_des1ep2: endpoint@2 {
-+				max9271-addr = <0x56>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in6>;
-+			};
-+			max9286_des1ep3: endpoint@3 {
-+				max9271-addr = <0x57>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in7>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi2ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin0 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_20 {
-+	status = "disabled";
-+	/delete-node/ports;
-+};
-+
-+&csi2_40 {
-+	/delete-node/ports;
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0039-arm64-dts-r8a7795-h3ulcb-view-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0039-arm64-dts-r8a7795-h3ulcb-view-add-ADAS-board.patch
deleted file mode 100644
index 69cab3b..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0039-arm64-dts-r8a7795-h3ulcb-view-add-ADAS-board.patch
+++ /dev/null
@@ -1,581 +0,0 @@
-From 24d2ada2089db7db1a059af37f371f6e2df213f4 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7795-h3ulcb-view: add ADAS board
-
-H3ULCB.View board on R8A7795 SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   1 +
- .../boot/dts/renesas/r8a7795-h3ulcb-view.dts   | 546 +++++++++++++++++++++
- 2 files changed, 547 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 2a00759..43aa35d 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb r8a7796-m3ulcb-kf-v1.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
-new file mode 100644
-index 0000000..de56fa4
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
-@@ -0,0 +1,546 @@
-+/*
-+ * Device Tree Source for the H3ULCB.View board
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-h3ulcb.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB.View board based on r8a7795";
-+};
-+
-+&i2c4 {
-+	ov106xx@0 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x60>;
-+
-+		port@0 {
-+			ov106xx_in0: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin0ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@1 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x61>;
-+
-+		port@0 {
-+			ov106xx_in1: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin1ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@2 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x62>;
-+
-+		port@0 {
-+			ov106xx_in2: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin2ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@3 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x63>;
-+
-+		port@0 {
-+			ov106xx_in3: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin3ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des0ep3: endpoint {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@4 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x64>;
-+
-+		port@0 {
-+			ov106xx_in4: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin4ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@5 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x65>;
-+
-+		port@0 {
-+			ov106xx_in5: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin5ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@6 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x66>;
-+
-+		port@0 {
-+			ov106xx_in6: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin6ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+
-+	ov106xx@7 {
-+		compatible = "ovti,ov106xx";
-+		reg = <0x67>;
-+
-+		port@0 {
-+			ov106xx_in7: endpoint {
-+				clock-lanes = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&vin7ep0>;
-+			};
-+		};
-+		port@1 {
-+			ov106xx_des1ep3: endpoint {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@0 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x4c>;
-+		gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+		maxim,i2c-quirk = <0x6c>;
-+
-+		port@0 {
-+			max9286_des0ep0: endpoint@0 {
-+				max9271-addr = <0x50>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+			max9286_des0ep1: endpoint@1 {
-+				max9271-addr = <0x51>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+			max9286_des0ep2: endpoint@2 {
-+				max9271-addr = <0x52>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+			max9286_des0ep3: endpoint@3 {
-+				max9271-addr = <0x53>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi0ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+	};
-+
-+	max9286-max9271@1 {
-+		compatible = "maxim,max9286-max9271";
-+		reg = <0x6c>;
-+		gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
-+		maxim,sensor_delay = <0>;
-+		maxim,links = <4>;
-+		maxim,lanes = <4>;
-+		maxim,resetb-gpio = <1>;
-+		maxim,fsync-mode = "automatic";
-+		maxim,timeout = <100>;
-+
-+		port@0 {
-+			max9286_des1ep0: endpoint@0 {
-+				max9271-addr = <0x54>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in4>;
-+			};
-+			max9286_des1ep1: endpoint@1 {
-+				max9271-addr = <0x55>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+			};
-+			max9286_des1ep2: endpoint@2 {
-+				max9271-addr = <0x56>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in6>;
-+			};
-+			max9286_des1ep3: endpoint@3 {
-+				max9271-addr = <0x57>;
-+				dvp-order = <1>;
-+				remote-endpoint = <&ov106xx_in7>;
-+			};
-+		};
-+		port@1 {
-+			max9286_csi2ep0: endpoint {
-+				csi-rate = <700>;
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-r8a7795-h3ulcb-had-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-r8a7795-h3ulcb-had-add-ADAS-board.patch
deleted file mode 100644
index 861acb0..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-r8a7795-h3ulcb-had-add-ADAS-board.patch
+++ /dev/null
@@ -1,315 +0,0 @@
-From 30240b74fe0b5c851127996328504e86a9fc4407 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:41:48 +0300
-Subject: [PATCH] arm64: dts: r8a7795-h3ulcb-had: add ADAS board
-
-H3ULCB.HAD board on R8A7795 SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |   1 +
- .../boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts   |  22 +++
- .../boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts   |  23 +++
- .../arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi | 218 +++++++++++++++++++++
- 4 files changed, 264 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 387652e..9dad6dc 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -14,6 +14,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb
- dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb r8a7796-m3ulcb-kf-v1.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
-new file mode 100644
-index 0000000..ae115bd
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
-@@ -0,0 +1,22 @@
-+/*
-+ * Device Tree Source for the H3ULCB.HAD board Alfa side
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-h3ulcb-had.dtsi"
-+
-+/ {
-+	model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+
-+	/* Root complex */
-+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts
-new file mode 100644
-index 0000000..805067e
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts
-@@ -0,0 +1,23 @@
-+/*
-+ * Device Tree Source for the H3ULCB.HAD board Beta side
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-h3ulcb-had.dtsi"
-+
-+/ {
-+	model = "Renesas H3ULCB.HAD board Beta side based on r8a7795";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+
-+	/* Endpoint */
-+	endpoint;
-+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
-new file mode 100644
-index 0000000..d146938
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
-@@ -0,0 +1,219 @@
-+/*
-+ * Device Tree Source for the H3ULCB.HAD board on r8a7795
-+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/*
-+ * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides)
-+ * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0)
-+ */
-+
-+#include "r8a7795-h3ulcb-view.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB.HAD board based on r8a7795";
-+
-+	aliases {
-+		serial1 = &scif1;
-+		spi1 = &spi0_gpio;
-+		spi2 = &spi1_gpio;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial1:115200n8";
-+	};
-+
-+	spi0_gpio: spi_gpio@0 {
-+		compatible = "spi-gpio";
-+		num-chipselects = <1>;
-+		gpio-sck = <&gpio5 17 0>;
-+		gpio-mosi = <&gpio5 20 0>;
-+		gpio-miso = <&gpio5 22 0>;
-+		cs-gpios = <&gpio5 19 0>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		spidev@0 {
-+			compatible = "spi-gpio";
-+			reg = <0>;
-+			spi-max-frequency = <2000000>;
-+			spi-cpha;
-+			spi-cpol;
-+		};
-+	};
-+
-+	spi1_gpio: spi_gpio@1 {
-+		compatible = "spi-gpio";
-+		num-chipselects = <1>;
-+		gpio-sck = <&gpio6 8 0>;
-+		gpio-mosi = <&gpio6 7 0>;
-+		gpio-miso = <&gpio6 10 0>;
-+		cs-gpios = <&gpio6 5 0>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		spidev@0 {
-+			compatible = "spi-gpio";
-+			reg = <0>;
-+			spi-max-frequency = <2000000>;
-+			spi-cpha;
-+			spi-cpol;
-+		};
-+	};
-+
-+	hdmi1-out {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi1_con: endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_out>;
-+			};
-+		};
-+	};
-+};
-+
-+&du {
-+	ports {
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_in>;
-+			};
-+		};
-+		port@2 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_in>;
-+			};
-+		};
-+	};
-+};
-+
-+&hdmi1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		port@0 {
-+			reg = <0>;
-+				rcar_dw_hdmi1_in: endpoint {
-+				remote-endpoint = <&du_out_hdmi1>;
-+			};
-+		};
-+		port@1 {
-+			reg = <1>;
-+				rcar_dw_hdmi1_out: endpoint {
-+				remote-endpoint = <&hdmi1_con>;
-+			};
-+		};
-+	};
-+};
-+
-+&pfc {
-+	scif1_pins: scif1 {
-+		groups = "scif1_data_a";
-+		function = "scif1";
-+	};
-+
-+	msiof0_pins: spi1 {
-+		groups = "msiof0_clk", "msiof0_rxd",  "msiof0_txd",
-+			 "msiof0_ss1";
-+		function = "msiof0";
-+	};
-+
-+	msiof1_pins: spi2 {
-+		groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a",
-+			 "msiof1_ss1_a";
-+		function = "msiof1";
-+	};
-+
-+	sound_clk_pins: sound-clk {
-+		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
-+			 "audio_clkout_a" /*, "audio_clkout3_a"*/;
-+		function = "audio_clk";
-+	};
-+
-+	usb31_pins: usb31 {
-+		groups = "usb31";
-+		function = "usb31";
-+	};
-+
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	canfd0_pins: canfd0 {
-+		groups = "canfd0_data_a";
-+		function = "canfd0";
-+	};
-+};
-+
-+&scif1 {
-+	pinctrl-0 = <&scif1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&avb {
-+	/delete-property/phy-handle;
-+	/delete-property/phy-gpios;
-+	/delete-node/ethernet-phy@0;
-+
-+	fixed-link {
-+		speed = <1000>;
-+		full-duplex;
-+	};
-+};
-+
-+&msiof0 {
-+	pinctrl-0 = <&msiof0_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+	cs-gpios = <&gpio5 19 0>;
-+
-+	spidev@0 {
-+		compatible = "renesas,sh-msiof";
-+		reg = <0>;
-+		spi-max-frequency = <66666666>;
-+		spi-cpha;
-+		spi-cpol;
-+	};
-+};
-+
-+&msiof1 {
-+	status = "disabled";
-+	cs-gpios = <&gpio6 5 0>;
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+
-+	renesas,can-clock-select = <0x0>;
-+	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
-+		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
-+		>;
-+};
-+
-+&canfd {
-+	pinctrl-0 = <&canfd0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
-+		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
-+		>;
-+
-+	channel0 {
-+		status = "okay";
-+	};
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
new file mode 100644
index 0000000..6d7bb3b
--- /dev/null
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
@@ -0,0 +1,13640 @@
+From 51718d8f768ba719a8a295e013e3456e13b70a98 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 14 Jul 2017 15:05:42 +0300
+Subject: [PATCH] arm64: dts: renesas: add ADAS boards
+
+Salvator-X.View board on R8A7795 ES1.x SoC
+Salvator-X.View board on R8A7795 SoC
+Salvator-X.View board on R8A7796 SoC
+H3ULCB.View board on R8A7795 ES1.x SoC
+H3ULCB.View board on R8A7795 SoC
+M3ULCB.View board on R8A7796 SoC
+H3ULCB.HAD board on R8A7795 ES1.x SoC
+H3ULCB.HAD board on R8A7795 SoC
+Kingfisher board on R8A7795 ES1.x SoC
+Kingfisher board on R8A7795 SoC
+Kingfisher board on R8A7796 SoC
+Videobox board on R8A7795 ES1.x SoC
+Videobox board on R8A7795 SoC
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+---
+ arch/arm64/boot/dts/renesas/Makefile               |   14 +
+ .../dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts    |   22 +
+ .../dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts    |   23 +
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi   |  225 +++
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts  |  443 +++++
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts     | 1655 ++++++++++++++++++
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts     | 1787 ++++++++++++++++++++
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts   |  546 ++++++
+ .../dts/renesas/r8a7795-es1-salvator-x-view.dts    |  552 ++++++
+ .../boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts   |   22 +
+ .../boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts   |   23 +
+ .../arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi |  219 +++
+ .../boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts      |  443 +++++
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts  | 1651 ++++++++++++++++++
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts  | 1787 ++++++++++++++++++++
+ .../arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts |  546 ++++++
+ .../boot/dts/renesas/r8a7795-salvator-x-view.dts   |  552 ++++++
+ .../boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts      |  443 +++++
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts  | 1238 ++++++++++++++
+ .../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts |  287 ++++
+ .../boot/dts/renesas/r8a7796-salvator-x-view.dts   |  318 ++++
+ arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi       |   75 +
+ arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi       |   33 +
+ arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi      |  515 ++++++
+ 24 files changed, 13419 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
+ create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
+ create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 32fb4d9..c9b3e96 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -4,5 +4,19 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
+ 
++# ADAS boards
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x-view.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-view.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf-v1.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x-view.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb r8a7796-m3ulcb-kf-v1.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb r8a7795-h3ulcb-kf-v1.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vb.dtb r8a7795-es1-h3ulcb-vb.dtb
++
+ always		:= $(dtb-y)
+ clean-files	:= *.dtb
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
+new file mode 100644
+index 0000000..6b13f07
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
+@@ -0,0 +1,22 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board Alfa side on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb-had.dtsi"
++
++/ {
++	model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795";
++};
++
++&pciec0 {
++	status = "okay";
++
++	/* Root complex */
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
+new file mode 100644
+index 0000000..2f8b274
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
+@@ -0,0 +1,23 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board Beta side on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb-had.dtsi"
++
++/ {
++	model = "Renesas H3ULCB.HAD board Beta side based on r8a7795";
++};
++
++&pciec0 {
++	status = "okay";
++
++	/* Endpoint */
++	endpoint;
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
+new file mode 100644
+index 0000000..d50ff7a
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
+@@ -0,0 +1,225 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/*
++ * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides)
++ * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0)
++ */
++
++#include "r8a7795-es1-h3ulcb-view.dts"
++
++/ {
++	model = "Renesas H3ULCB.HAD board based on r8a7795";
++
++	aliases {
++		serial1 = &scif1;
++		spi1 = &spi0_gpio;
++		spi2 = &spi1_gpio;
++	};
++
++	chosen {
++		stdout-path = "serial1:115200n8";
++	};
++
++	spi0_gpio: spi_gpio@0 {
++		compatible = "spi-gpio";
++		num-chipselects = <1>;
++		gpio-sck = <&gpio5 17 0>;
++		gpio-mosi = <&gpio5 20 0>;
++		gpio-miso = <&gpio5 22 0>;
++		cs-gpios = <&gpio5 19 0>;
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		spidev@0 {
++			compatible = "spi-gpio";
++			reg = <0>;
++			spi-max-frequency = <2000000>;
++			spi-cpha;
++			spi-cpol;
++		};
++	};
++
++	spi1_gpio: spi_gpio@1 {
++		compatible = "spi-gpio";
++		num-chipselects = <1>;
++		gpio-sck = <&gpio6 8 0>;
++		gpio-mosi = <&gpio6 7 0>;
++		gpio-miso = <&gpio6 10 0>;
++		cs-gpios = <&gpio6 5 0>;
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		spidev@0 {
++			compatible = "spi-gpio";
++			reg = <0>;
++			spi-max-frequency = <2000000>;
++			spi-cpha;
++			spi-cpol;
++		};
++	};
++
++	hdmi1-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi1_con: endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_out>;
++			};
++		};
++	};
++};
++
++&du {
++	ports {
++		port@1 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi0_in>;
++			};
++		};
++		port@2 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_in>;
++			};
++		};
++	};
++};
++
++&hdmi1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		port@0 {
++			reg = <0>;
++				rcar_dw_hdmi1_in: endpoint {
++				remote-endpoint = <&du_out_hdmi1>;
++			};
++		};
++		port@1 {
++			reg = <1>;
++				rcar_dw_hdmi1_out: endpoint {
++				remote-endpoint = <&hdmi1_con>;
++			};
++		};
++	};
++};
++
++&pfc {
++	scif1_pins: scif1 {
++		groups = "scif1_data_a";
++		function = "scif1";
++	};
++
++	msiof0_pins: spi1 {
++		groups = "msiof0_clk", "msiof0_rxd",  "msiof0_txd",
++			 "msiof0_ss1";
++		function = "msiof0";
++	};
++
++	msiof1_pins: spi2 {
++		groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a",
++			 "msiof1_ss1_a";
++		function = "msiof1";
++	};
++
++	sound_clk_pins: sound-clk {
++		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
++			 "audio_clkout_a" /*, "audio_clkout3_a"*/;
++		function = "audio_clk";
++	};
++
++	usb31_pins: usb31 {
++		groups = "usb31";
++		function = "usb31";
++	};
++
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++};
++
++&scif1 {
++	pinctrl-0 = <&scif1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&avb {
++	/delete-property/phy-handle;
++	/delete-property/phy-gpios;
++	/delete-node/ethernet-phy@0;
++
++	fixed-link {
++		speed = <1000>;
++		full-duplex;
++	};
++};
++
++&msiof0 {
++	pinctrl-0 = <&msiof0_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++	cs-gpios = <&gpio5 19 0>;
++
++	spidev@0 {
++		compatible = "renesas,sh-msiof";
++		reg = <0>;
++		spi-max-frequency = <66666666>;
++		spi-cpha;
++		spi-cpol;
++	};
++};
++
++&msiof1 {
++	status = "disabled";
++	cs-gpios = <&gpio6 5 0>;
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++
++	renesas,can-clock-select = <0x0>;
++	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
++		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
++		>;
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
++		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
++		>;
++
++	channel0 {
++		status = "okay";
++	};
++};
++
++&xhci1 {
++	status = "okay";
++	pinctrl-0 = <&usb31_pins>;
++	pinctrl-names = "default";
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
+new file mode 100644
+index 0000000..d245bbe
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
+@@ -0,0 +1,443 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher V1 board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb-kf.dts"
++
++/ {
++	model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795";
++
++	aliases {
++		serial1 = &hscif0;
++		serial2 = &hscif1;
++		serial3 = &scif1;
++	};
++
++	wlan_en: regulator@4 {
++		compatible = "regulator-fixed";
++		regulator-name = "wlan-en-regulator";
++
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	codec_en_reg: regulator@6 {
++		compatible = "regulator-fixed";
++		regulator-name = "codec-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 15 0>;
++
++		/* delay - CHECK */
++		startup-delay-us = <70000>;
++		enable-active-high;
++	};
++
++	amp_en_reg: regulator@7 {
++		compatible = "regulator-fixed";
++		regulator-name = "amp-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 0 0>;
++
++		startup-delay-us = <0>;
++		enable-active-high;
++	};
++
++	/delete-node/regulator@8;
++
++	sdio_switch: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "wifi_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_74 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	/delete-node/regulator@10;
++
++	radio_switch: regulator@11 {
++		compatible = "regulator-fixed";
++		regulator-name = "radio_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	kim {
++		compatible = "kim";
++		nshutdown_gpio = <343>;  /* gpio_ext_74 pin 3 */
++		/* serial1 */
++		dev_name = "/dev/ttySC1";
++		flow_cntrl = <1>;
++		/* int div 8 hscif@26.6666656MHz */
++		baud_rate = <3333332>;
++	};
++
++	hdmi-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi_con: endpoint {
++				remote-endpoint = <&adv7513_out>;
++			};
++		};
++	};
++};
++
++&pfc {
++	/delete-node/hscif4;
++
++	scif1_pins: scif1 {
++		groups = "scif1_data_b";
++		function = "scif1";
++	};
++
++	hscif0_pins: hscif0 {
++		groups = "hscif0_data", "hscif0_ctrl";
++		function = "hscif0";
++	};
++
++	hscif1_pins: hscif1 {
++		groups = "hscif1_data_a", "hscif1_ctrl_a";
++		function = "hscif1";
++	};
++
++	du_pins: du {
++		groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++		function = "du";
++	};
++};
++
++&du {
++	pinctrl-0 = <&du_pins>;
++	pinctrl-names = "default";
++
++	ports {
++		port@0 {
++			endpoint {
++				remote-endpoint = <&adv7513_in>;
++			};
++		};
++		port@1 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi0_in>;
++			};
++		};
++	};
++};
++
++&gpio0 {
++	/delete-node/video_a_irq;
++	/delete-node/video_b_irq;
++	/delete-node/gpioext_2_20_irq;
++};
++
++&gpio1 {
++	/delete-node/gpioext_2_21_irq;
++	/delete-node/wifi_irq;
++};
++
++&gpio2 {
++	bl_pwm {
++		gpio-hog;
++		gpios = <3 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "BL PWM 100%";
++	};
++};
++
++&gpio5 {
++	/delete-node/touch_irq;
++	/delete-node/bt_strap;
++
++	/* V1 has h/w bug with swapped RTS and CTS on BT interface */
++	/* Ignore these pins */
++	hscif0_cts {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "hscif0 CTS";
++	};
++
++	hscif0_rts {
++		gpio-hog;
++		gpios = <16 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "hscif0 RTS";
++	};
++};
++
++&gpio7 {
++	/delete-node/gpioext_2_21_irq;
++};
++
++&scif1 {
++	pinctrl-0 = <&scif1_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hscif0 {
++	pinctrl-0 = <&hscif0_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&hscif1 {
++	pinctrl-0 = <&hscif1_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hscif4 {
++	/delete-property/pinctrl-0;
++	/delete-property/pinctrl-names;
++
++	status = "disabled";
++};
++
++&i2c2 {
++	/delete-node/pca9535@20;
++	/delete-node/pca9535@21;
++
++	gpio_ext_74: pca9539@74 {
++		compatible = "nxp,pca9539";
++		reg = <0x74>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio6>;
++		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++		hub_pwen {
++			gpio-hog;
++			gpios = <6 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "HUB pwen";
++		};
++		hub_rst {
++			gpio-hog;
++			gpios = <7 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "HUB rst";
++		};
++		otg_offvbus {
++			gpio-hog;
++			gpios = <8 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "OTG off VBUSn";
++		};
++		otg_extlpn {
++			gpio-hog;
++			gpios = <9 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "OTG EXTLPn";
++		};
++		otg_stat1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "OTG Stat1";
++		};
++		otg_stat2 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "OTG Stat2";
++		};
++	};
++
++	gpio_ext_75: pca9539@75 {
++		compatible = "nxp,pca9539";
++		reg = <0x75>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio6>;
++		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++		gps_rst {
++			gpio-hog;
++			gpios = <6 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "GPS rst";
++		};
++		fpdl_shdn {
++			gpio-hog;
++			gpios = <9 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "FPDLink shdn";
++		};
++	};
++};
++
++&i2cswitch2 {
++	reg = <0x71>;
++	reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
++
++	i2c@4 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <4>;
++
++		hdmi@3d {
++			compatible = "adi,adv7511w";
++			reg = <0x3d>;
++			interrupt-parent = <&gpio2>;
++			interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++			pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++			adi,input-depth = <8>;
++			adi,input-colorspace = "rgb";
++			adi,input-clock = "1x";
++			adi,input-style = <1>;
++			adi,input-justification = "evenly";
++			adi,clock-delay = <1200>;
++
++			ports {
++				#address-cells = <1>;
++				#size-cells = <0>;
++
++				port@0 {
++					reg = <0>;
++					adv7513_in: endpoint {
++						remote-endpoint = <&du_out_rgb>;
++					};
++				};
++
++				port@1 {
++					reg = <1>;
++					adv7513_out: endpoint {
++						remote-endpoint = <&hdmi_con>;
++					};
++				};
++			};
++		};
++	};
++};
++
++&i2c4 {
++	/delete-node/pca9535@21;
++
++	gpio_ext_76: pca9539@76 {
++		compatible = "nxp,pca9539";
++		reg = <0x76>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio7>;
++		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++		port_b_a0 {
++			gpio-hog;
++			gpios = <0 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "Video-B A0";
++		};
++		port_b_a1 {
++			gpio-hog;
++			gpios = <1 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "Video-B A1";
++		};
++		port_a_a0 {
++			gpio-hog;
++			gpios = <2 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "Video-A A0";
++		};
++		port_a_a1 {
++			gpio-hog;
++			gpios = <3 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "Video-A A1";
++		};
++		/* pin 12 - CAM_CLK */
++		rpi_cam_io_1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO1";
++		};
++		/* pin 11 - CAM_GPIO - assume pwdn */
++		rpi_cam_io_0 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO0";
++		};
++		/* 0 - FPDLink output, 1 - LVDS output */
++		lvds_vs_fpdl {
++			gpio-hog;
++			gpios = <14 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "LVDS switch";
++		};
++	};
++
++	gpio_ext_77: pca9539@77 {
++		compatible = "nxp,pca9539";
++		reg = <0x77>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio5>;
++		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++		mpcie_wake {
++			gpio-hog;
++			gpios = <0 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "mPCIe WAKE#";
++		};
++		mpcie_wdisable {
++			gpio-hog;
++			gpios = <1 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "mPCIe W_DISABLE";
++		};
++		mpcie_clreq {
++			gpio-hog;
++			gpios = <2 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "mPCIe CLKREQ#";
++		};
++		mpcie_ovc {
++			gpio-hog;
++			gpios = <3 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "mPCIe OVC";
++		};
++	};
++};
++
++&i2cswitch4 {
++	reg = <0x71>;
++	reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++};
++
++&wlcore {
++	interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+new file mode 100644
+index 0000000..075bf2c
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+@@ -0,0 +1,1655 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb.dts"
++
++/ {
++	model = "Renesas H3ULCB Kingfisher board based on r8a7795";
++
++	aliases {
++		serial1 = &hscif4;
++	};
++
++	snd_clk: snd_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <24576000>;
++		clock-output-names = "scki";
++	};
++
++	wlan_en: regulator@4 {
++		compatible = "regulator-fixed";
++		regulator-name = "wlan-en-regulator";
++
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	vcc_sdhi3: regulator@41 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 Vcc";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++	};
++
++	vccq_sdhi3: regulator@5 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 VccQ";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	codec_en_reg: regulator@6 {
++		compatible = "regulator-fixed";
++		regulator-name = "codec-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 15 0>;
++
++		/* delay - CHECK */
++		startup-delay-us = <70000>;
++		enable-active-high;
++	};
++
++	amp_en_reg: regulator@7 {
++		compatible = "regulator-fixed";
++		regulator-name = "amp-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 0 0>;
++
++		startup-delay-us = <0>;
++		enable-active-high;
++	};
++
++	lvds_switch: regulator@8 {
++		compatible = "regulator-fixed";
++		regulator-name = "lvds_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio1 24 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	sdio_switch: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "wifi_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_20 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	sound_switch: regulator@10 {
++		compatible = "regulator-fixed";
++		regulator-name = "pcm3168a_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_21 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	radio_switch: regulator@11 {
++		compatible = "regulator-fixed";
++		regulator-name = "radio_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	kim {
++		compatible = "kim";
++		nshutdown_gpio = <343>;  /* pca9535@i2c2.0x20 pin 3 */
++		/* serial1 */
++		dev_name = "/dev/ttySC1";
++		flow_cntrl = <1>;
++		/* int div 8 hscif@26.6666656MHz */
++		baud_rate = <3333332>;
++	};
++
++	btwilink {
++		compatible = "btwilink";
++	};
++
++	sound_ext: sound@0 {
++		pinctrl-0 = <&sound_0_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "pcm3168a";
++
++		simple-audio-card,bitclock-master = <&sound_ext_master>;
++		simple-audio-card,frame-master = <&sound_ext_master>;
++		sound_ext_master: simple-audio-card,cpu@0 {
++			sound-dai = <&rcar_sound 0>;
++			dai-tdm-slot-num = <8>;
++			dai-tdm-slot-width = <32>;
++		};
++
++		simple-audio-card,codec@0 {
++			sound-dai = <&pcm3168a>;
++			dai-tdm-slot-num = <8>;
++			dai-tdm-slot-width = <32>;
++			system-clock-frequency = <24576000>;
++		};
++	};
++
++	/delete-node/sound;
++
++	rsnd_ak4613: sound@1 {
++		pinctrl-0 = <&sound_1_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "ak4613";
++
++		simple-audio-card,bitclock-master = <&sndcpu>;
++		simple-audio-card,frame-master = <&sndcpu>;
++
++		sndcpu: simple-audio-card,cpu@1 {
++			sound-dai = <&rcar_sound 1>;
++		};
++
++		sndcodec: simple-audio-card,codec@1 {
++			sound-dai = <&ak4613>;
++		};
++	};
++
++	sound_radio: sound@2 {
++		pinctrl-0 = <&sound_2_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "i2s";
++		simple-audio-card,name = "radio";
++
++		simple-audio-card,bitclock-master = <&sound_radio_master>;
++		simple-audio-card,frame-master = <&sound_radio_master>;
++		simple-audio-card,cpu@2 {
++			sound-dai = <&rcar_sound 2>;
++		};
++
++		sound_radio_master: simple-audio-card,codec@2 {
++			sound-dai = <&radio>;
++			system-clock-frequency = <12288000>;
++		};
++	};
++
++	lvds-encoder {
++		compatible = "thine,thc63lvdm83d";
++
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			port@0 {
++				reg = <0>;
++				lvds_enc_in: endpoint {
++					remote-endpoint = <&du_out_lvds0>;
++				};
++			};
++			port@1 {
++				reg = <1>;
++				lvds_enc_out: endpoint {
++					remote-endpoint = <&lvds_in>;
++				};
++			};
++		};
++	};
++
++	lvds {
++		compatible = "lvds-connector";
++
++		width-mm = <210>;
++		height-mm = <158>;
++
++		panel-timing {
++			/* 1280x800 @60Hz */
++			clock-frequency = <65000000>;
++			hactive = <1280>;
++			vactive = <800>;
++			hsync-len = <40>;
++			hfront-porch = <80>;
++			hback-porch = <40>;
++			vfront-porch = <14>;
++			vback-porch = <14>;
++			vsync-len = <4>;
++		};
++
++		port {
++			lvds_in: endpoint {
++				remote-endpoint = <&lvds_enc_out>;
++			};
++		};
++	};
++
++	radio: si468x@0 {
++		compatible = "si,si468x-pcm";
++		status = "okay";
++
++		#sound-dai-cells = <0>;
++	};
++};
++
++&pfc {
++	hscif4_pins: hscif4 {
++		groups = "hscif4_data_a", "hscif4_ctrl";
++		function = "hscif4";
++	};
++
++	sdhi3_pins_3v3: sd3_3v3 {
++		groups = "sdhi3_data4", "sdhi3_ctrl";
++		function = "sdhi3";
++		power-source = <3300>;
++	};
++
++	sound_0_pins: sound0 {
++		groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++		function = "ssi";
++	};
++
++	sound_1_pins: sound1 {
++		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++		function = "ssi";
++	};
++
++	sound_2_pins: sound2 {
++		groups = "ssi6_ctrl", "ssi6_data";
++		function = "ssi";
++	};
++
++	usb0_pins: usb0 {
++		groups = "usb0";
++		function = "usb0";
++	};
++
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++
++	canfd1_pins: canfd1 {
++		groups = "canfd1_data";
++		function = "canfd1";
++	};
++};
++
++&gpio0 {
++	video_a_irq {
++		gpio-hog;
++		gpios = <13 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-A irq";
++	};
++
++	video_b_irq {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-B irq";
++	};
++
++	gpioext_2_20_irq {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x20@i2c2 irq";
++	};
++};
++
++&gpio1 {
++	gpioext_2_21_irq {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x21@i2c2 irq";
++	};
++
++	wifi_irq {
++		gpio-hog;
++		gpios = <25 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "wifi irq";
++	};
++};
++
++&gpio5 {
++	touch_irq {
++		gpio-hog;
++		gpios = <6 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "touch irq";
++	};
++
++	/* From TI forum */
++	/* BT_AUD_OUT should be pulled low when WL_EN is activated. */
++	/* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
++	bt_strap {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		output-low;
++		line-name = "BT strap pin";
++	};
++};
++
++&gpio7 {
++	gpioext_2_21_irq {
++		gpio-hog;
++		gpios = <3 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x21@i2c4 irq";
++	};
++};
++
++&hscif4 {
++	pinctrl-0 = <&hscif4_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++
++	gpio_ext_20: pca9535@20 {
++		compatible = "nxp,pca9535";
++		reg = <0x20>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio0>;
++		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++	};
++
++	gpio_ext_21: pca9535@21 {
++		compatible = "nxp,pca9535";
++		reg = <0x21>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio1>;
++		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++	};
++
++	i2cswitch2: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* BCM node(s) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* USB3.0 HUB node(s) */
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* Power amp node(s) */
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* Radio node(s) */
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			/* A2B node(s) */
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* PCIe node(s) */
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* LVDS display node(s) */
++
++			polytouch: edt-ft5x06@38 {
++				compatible = "edt,edt-ft5x06";
++				reg = <0x38>;
++				interrupt-parent = <&gpio5>;
++				interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
++			};
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Audio, GPS and Gyro node(s) */
++
++			pcm3168a: audio-codec@44 {
++				#sound-dai-cells = <0>;
++				compatible = "ti,pcm3168a";
++				reg = <0x44>;
++				clocks = <&snd_clk>;
++				clock-names = "scki";
++				tdm;
++				VDD1-supply = <&codec_en_reg>;
++				VDD2-supply = <&codec_en_reg>;
++				VCCAD1-supply = <&codec_en_reg>;
++				VCCAD2-supply = <&codec_en_reg>;
++				VCCDA1-supply = <&amp_en_reg>;
++				VCCDA2-supply = <&amp_en_reg>;
++			};
++
++			lsm9ds0_acc_mag@1d {
++				compatible = "st,lsm9ds0_acc_mag";
++				reg = <0x1d>;
++			};
++
++			lsm9ds0_gyr@6b {
++				compatible = "st,lsm9ds0-gyro";
++				reg = <0x6b>;
++			};
++
++			/* GPS@ 0x42 */
++		};
++	};
++};
++
++&i2c4 {
++	gpio_ext_22: pca9535@21 {
++		compatible = "nxp,pca9535";
++		reg = <0x22>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio7>;
++		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++		/* pin 12 - CAM_CLK */
++		rpi_cam_io_1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO1";
++		};
++		/* pin 11 - CAM_GPIO - assume pwdn */
++		rpi_cam_io_0 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO0";
++		};
++	};
++
++	i2cswitch4: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* SAM node(s) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* Slot A (CN10) */
++
++			ov106xx@0 {
++				compatible = "ovti,ov106xx";
++				reg = <0x60>;
++
++				port@0 {
++					ov106xx_in0: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin0ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep0>;
++					};
++					ov106xx_ti964_des0ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep0>;
++					};
++					ov106xx_ti954_des0ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep0>;
++					};
++				};
++			};
++
++			ov106xx@1 {
++				compatible = "ovti,ov106xx";
++				reg = <0x61>;
++
++				port@0 {
++					ov106xx_in1: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin1ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep1>;
++					};
++					ov106xx_ti964_des0ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep1>;
++					};
++					ov106xx_ti954_des0ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep1>;
++					};
++				};
++			};
++
++			ov106xx@2 {
++				compatible = "ovti,ov106xx";
++				reg = <0x62>;
++
++				port@0 {
++					ov106xx_in2: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin2ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep2>;
++					};
++					ov106xx_ti964_des0ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep2>;
++					};
++				};
++			};
++
++			ov106xx@3 {
++				compatible = "ovti,ov106xx";
++				reg = <0x63>;
++
++				port@0 {
++					ov106xx_in3: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin3ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep3>;
++					};
++					ov106xx_ti964_des0ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@0 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti964_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti964_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					ti964_des0ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					ti964_des0ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					ti964_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@0 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti954_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti954_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++				};
++				port@1 {
++					ti954_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2a */
++			max9286-max9271@0 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2a>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des0ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					max9286_des0ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					max9286_des0ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					max9286_des0ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					max9286_csi0ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* Slot B (CN11) */
++
++			ov106xx@4 {
++				compatible = "ovti,ov106xx";
++				reg = <0x64>;
++
++				port@0 {
++					ov106xx_in4: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin4ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep0>;
++					};
++					ov106xx_ti964_des1ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep0>;
++					};
++					ov106xx_ti954_des1ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep0>;
++					};
++				};
++			};
++
++			ov106xx@5 {
++				compatible = "ovti,ov106xx";
++				reg = <0x65>;
++
++				port@0 {
++					ov106xx_in5: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin5ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep1>;
++					};
++					ov106xx_ti964_des1ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep1>;
++					};
++					ov106xx_ti954_des1ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep1>;
++					};
++				};
++			};
++
++			ov106xx@6 {
++				compatible = "ovti,ov106xx";
++				reg = <0x66>;
++
++				port@0 {
++					ov106xx_in6: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin6ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep2>;
++					};
++					ov106xx_ti964_des1ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep2>;
++					};
++				};
++			};
++
++			ov106xx@7 {
++				compatible = "ovti,ov106xx";
++				reg = <0x67>;
++
++				port@0 {
++					ov106xx_in7: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin7ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep3>;
++					};
++					ov106xx_ti964_des1ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@1 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti964_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti964_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					ti964_des1ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					ti964_des1ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					ti964_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@1 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti954_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti954_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++				};
++				port@1 {
++					ti954_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2a */
++			max9286-max9271@1 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2a>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des1ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					max9286_des1ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					max9286_des1ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					max9286_des1ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					max9286_csi2ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* Slot B (CN11) */
++
++			video_b_ext0: pca9535@27 {
++				compatible = "nxp,pca9535";
++				reg = <0x27>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR2";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++				video_b_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B DES_SHDN";
++				};
++				video_b_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B led";
++				};
++			};
++
++			video_b_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B cfg2";
++				};
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++			};
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Slot A (CN10) */
++
++			video_a_ext0: pca9535@26 {
++				compatible = "nxp,pca9535";
++				reg = <0x26>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR2";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++				video_a_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A DES_SHDN";
++				};
++				video_a_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A led";
++				};
++			};
++
++			video_a_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg2";
++				};
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++			};
++		};
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec0 {
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++			vin0_ti964_des0ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep0>;
++			};
++			vin0_ti954_des0ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++			vin1_ti964_des0ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep1>;
++			};
++			vin1_ti954_des0ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++			vin2_ti964_des0ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++			vin3_ti964_des0ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++			vin4_ti964_des1ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep0>;
++			};
++			vin4_ti954_des1ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++			vin5_ti964_des1ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep1>;
++			};
++			vin5_ti954_des1ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++			vin6_ti964_des1ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++			vin7_ti964_des1ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&rcar_sound {
++	pinctrl-0 = <&sound_clk_pins>;
++
++	/* Multi DAI */
++	#sound-dai-cells = <1>;
++
++	rcar_sound,dai {
++		dai0 {
++			playback = <&ssi7>;
++			capture  = <&ssi8>;
++		};
++
++		dai1 {
++			playback = <&ssi0 &src0 &dvc0>;
++			capture  = <&ssi1 &src1 &dvc1>;
++		};
++
++		dai2 {
++			capture  = <&ssi6>;
++		};
++	};
++};
++
++&sdhi3 {
++	pinctrl-0 = <&sdhi3_pins_3v3>;
++	pinctrl-names = "default";
++
++	vmmc-supply = <&wlan_en>;
++	vqmmc-supply = <&vccq_sdhi3>;
++	keep-power-in-suspend;
++	enable-sdio-wakeup;
++	bus-width = <4>;
++	no-1-8-v;
++	non-removable;
++	cap-power-off-card;
++	max-frequency = <26000000>;
++	status = "okay";
++
++	#address-cells = <1>;
++	#size-cells = <0>;
++	wlcore: wlcore@2 {
++		compatible = "ti,wl1837";
++		reg = <2>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++	};
++};
++
++&usb2_phy0 {
++	pinctrl-0 = <&usb0_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hsusb {
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&xhci0 {
++	status = "okay";
++};
++
++&msiof1 {
++	status = "disabled";
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++
++	channel0 {
++		status = "okay";
++	};
++
++	channel1 {
++		status = "okay";
++	};
++};
++
++/* uncomment to enable CN48 on VIN4 */
++//#include "ulcb-kf-rpi.dtsi"
++/* uncomment to enable CN47: SD on SDHI3 */
++//#include "ulcb-kf-sd3.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
+new file mode 100644
+index 0000000..0e6ea57
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
+@@ -0,0 +1,1787 @@
++/*
++ * Device Tree Source for the H3ULCB Videobox board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb.dts"
++
++/ {
++	model = "Renesas H3ULCB Videobox board based on r8a7795";
++
++	leds {
++		compatible = "gpio-leds";
++
++		led5 {
++			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
++		};
++		led6 {
++			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
++		};
++		/* D13 - status 0 */
++		led_ext00 {
++			gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>;
++			linux,default-trigger = "heartbeat";
++		};
++		/* D14 - status 1 */
++		led_ext01 {
++			gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>;
++			linux,default-trigger = "mmc1";
++		};
++		/* D16 - HDMI1 */
++		led_ext02 {
++			gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>;
++		};
++		/* D18 - HDMI0 */
++		led_ext03 {
++			gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>;
++		};
++		/* D20 - USB3.0 - 0.1 */
++		led_ext04 {
++			gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>;
++		};
++		/* D21 - USB3.0 - 0.2 */
++		led_ext05 {
++			gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>;
++		};
++		/* D24 - USB3.0 - 1.1 */
++		led6_ext06 {
++			gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>;
++		};
++		/* D25 - USB3.0 - 1.2 */
++		led_ext07 {
++			gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	snd_clk: snd_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <24576000>;
++		clock-output-names = "scki";
++	};
++
++	vccq_sdhi3: regulator@5 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 VccQ";
++		/* external voltage translator to 1.8V */
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	fpdlink_switch: regulator@8 {
++		compatible = "regulator-fixed";
++		regulator-name = "fpdlink_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio1 20 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	hub_reset: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "hub_reset";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio5 5 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	hub_power: regulator@10 {
++		compatible = "regulator-fixed";
++		regulator-name = "hub_power";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		gpio = <&gpio6 28 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	/delete-node/sound;
++
++	rsnd_ak4613: sound@0 {
++		pinctrl-0 = <&sound_0_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "ak4613";
++
++		simple-audio-card,bitclock-master = <&sndcpu>;
++		simple-audio-card,frame-master = <&sndcpu>;
++
++		sndcpu: simple-audio-card,cpu@1 {
++			sound-dai = <&rcar_sound>;
++		};
++
++		sndcodec: simple-audio-card,codec@1 {
++			sound-dai = <&ak4613>;
++		};
++	};
++
++	lvds-encoder {
++		compatible = "thine,thc63lvdm83d";
++
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			port@0 {
++				reg = <0>;
++				lvds_enc_in: endpoint {
++					remote-endpoint = <&du_out_lvds0>;
++				};
++			};
++			port@1 {
++				reg = <1>;
++				lvds_enc_out: endpoint {
++					remote-endpoint = <&lvds_in>;
++				};
++			};
++		};
++	};
++
++	lvds {
++		compatible = "lvds-connector";
++
++		width-mm = <210>;
++		height-mm = <158>;
++
++		panel-timing {
++			/* 1280x800 @60Hz */
++			clock-frequency = <65000000>;
++			hactive = <1280>;
++			vactive = <800>;
++			hsync-len = <40>;
++			hfront-porch = <80>;
++			hback-porch = <40>;
++			vfront-porch = <14>;
++			vback-porch = <14>;
++			vsync-len = <4>;
++		};
++
++		port {
++			lvds_in: endpoint {
++				remote-endpoint = <&lvds_enc_out>;
++			};
++		};
++	};
++
++	hdmi1-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi1_con: endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_out>;
++			};
++		};
++	};
++
++	excan_ref_clk: excan-ref-clock {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <16000000>;
++	};
++
++	radio: si468x@0 {
++		compatible = "si,si468x-pcm";
++		status = "okay";
++
++		#sound-dai-cells = <0>;
++	};
++
++	spi_gpio_sw {
++		compatible = "spi-gpio";
++		#address-cells = <0x1>;
++		#size-cells = <0x0>;
++		gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>;
++		gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>;
++		gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>;
++		cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
++		num-chipselects = <1>;
++
++		spidev: spidev@0 {
++			compatible = "spidev", "spi-gpio";
++			reg = <0>;
++			spi-max-frequency = <25000000>;
++			spi-cpha;
++			spi-cpol;
++		};
++	};
++
++	spi_gpio_can {
++		compatible = "spi-gpio";
++		#address-cells = <0x1>;
++		#size-cells = <0x0>;
++		gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>;
++		gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>;
++		gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>;
++		cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
++			    &gpio1 4 GPIO_ACTIVE_HIGH>;
++		num-chipselects = <2>;
++
++		spican0: spidev@0 {
++			compatible = "microchip,mcp2515";
++			reg = <0>;
++			clocks = <&excan_ref_clk>;
++			interrupt-parent = <&gpio0>;
++			interrupts = <15 GPIO_ACTIVE_LOW>;
++			spi-max-frequency = <10000000>;
++		};
++		spican1: spidev@1 {
++			compatible = "microchip,mcp2515";
++			reg = <1>;
++			clocks = <&excan_ref_clk>;
++			interrupt-parent = <&gpio1>;
++			interrupts = <5 GPIO_ACTIVE_LOW>;
++			spi-max-frequency = <10000000>;
++		};
++	};
++};
++
++&du {
++	ports {
++		port@1 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi0_in>;
++			};
++		};
++		port@2 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_in>;
++			};
++		};
++		port@3 {
++			endpoint {
++				remote-endpoint = <&lvds_enc_in>;
++			};
++		};
++	};
++};
++
++&hdmi1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		port@0 {
++			reg = <0>;
++			rcar_dw_hdmi1_in: endpoint {
++				remote-endpoint = <&du_out_hdmi1>;
++			};
++		};
++		port@1 {
++			reg = <1>;
++			rcar_dw_hdmi1_out: endpoint {
++				remote-endpoint = <&hdmi1_con>;
++			};
++		};
++	};
++};
++
++&pfc {
++	hscif4_pins: hscif4 {
++		groups = "hscif4_data_a", "hscif4_ctrl";
++		function = "hscif4";
++	};
++
++	sdhi3_pins_3v3: sd3_3v3 {
++		groups = "sdhi3_data4", "sdhi3_ctrl";
++		function = "sdhi3";
++		power-source = <3300>;
++	};
++
++	/delete-node/sound;
++
++	sound_0_pins: sound1 {
++		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++		function = "ssi";
++	};
++
++	usb0_pins: usb0 {
++		groups = "usb0";
++		function = "usb0";
++	};
++
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++
++	canfd1_pins: canfd1 {
++		groups = "canfd1_data";
++		function = "canfd1";
++	};
++};
++
++&gpio0 {
++	video_a_irq {
++		gpio-hog;
++		gpios = <12 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-A irq";
++	};
++
++	video_b_irq {
++		gpio-hog;
++		gpios = <13 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-B irq";
++	};
++
++	video_c_irq {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-C irq";
++	};
++};
++
++&gpio1 {
++	gpioext_4_22_irq {
++		gpio-hog;
++		gpios = <25 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x22@i2c4 irq";
++	};
++	pcie_disable {
++		gpio-hog;
++		gpios = <11 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "mPCIe W_DISABLE";
++	};
++	m2_sleep {
++		gpio-hog;
++		gpios = <6 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 SLEEP#";
++	};
++	m2_pres {
++		gpio-hog;
++		gpios = <7 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 Present";
++	};
++	m2_pcie_det {
++		gpio-hog;
++		gpios = <18 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 PCIe detected";
++	};
++	m2_usb_det {
++		gpio-hog;
++		gpios = <19 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 USB30 detected";
++	};
++	m2_usb_det {
++		gpio-hog;
++		gpios = <27 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 SSD detected";
++	};
++	eth_phy_reset {
++		gpio-hog;
++		gpios = <16 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "BR phy reset";
++	};
++	eth_sw_reset {
++		gpio-hog;
++		gpios = <17 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "BR switch reset";
++	};
++};
++
++&gpio2 {
++	m2_wake {
++		gpio-hog;
++		gpios = <1 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 WAKE#";
++	};
++	m2_pcie_en {
++		gpio-hog;
++		gpios = <4 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 PCIe enable";
++	};
++};
++
++&gpio3 {
++	m2_power_off {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 FULL_CARD_POWER_OFF#";
++	};
++};
++
++&gpio6 {
++	pcie_wake {
++		gpio-hog;
++		gpios = <4 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "mPCIe WAKE#";
++	};
++	pcie_clkreq {
++		gpio-hog;
++		gpios = <10 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "mPCIe CLKREQ#";
++	};
++	m2_rst {
++		gpio-hog;
++		gpios = <21 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 RESET#";
++	};
++};
++
++&hscif4 {
++	pinctrl-0 = <&hscif4_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++
++	i2cswitch2: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* USB3.0 HUB node(s) */
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* PCIe node(s) */
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Slot A (CN10) */
++
++			ov106xx@0 {
++				compatible = "ovti,ov106xx";
++				reg = <0x60>;
++
++				port@0 {
++					ov106xx_in0: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin0ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep0>;
++					};
++					ov106xx_ti964_des0ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep0>;
++					};
++					ov106xx_ti954_des0ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep0>;
++					};
++				};
++			};
++
++			ov106xx@1 {
++				compatible = "ovti,ov106xx";
++				reg = <0x61>;
++
++				port@0 {
++					ov106xx_in1: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin1ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep1>;
++					};
++					ov106xx_ti964_des0ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep1>;
++					};
++					ov106xx_ti954_des0ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep1>;
++					};
++				};
++			};
++
++			ov106xx@2 {
++				compatible = "ovti,ov106xx";
++				reg = <0x62>;
++
++				port@0 {
++					ov106xx_in2: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin2ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep2>;
++					};
++					ov106xx_ti964_des0ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep2>;
++					};
++				};
++			};
++
++			ov106xx@3 {
++				compatible = "ovti,ov106xx";
++				reg = <0x63>;
++
++				port@0 {
++					ov106xx_in3: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin3ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep3>;
++					};
++					ov106xx_ti964_des0ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@0 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti964_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti964_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					ti964_des0ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					ti964_des0ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					ti964_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@0 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				/* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti954_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti954_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++				};
++				port@1 {
++					ti954_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2c */
++			max9286-max9271@0 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2c>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des0ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					max9286_des0ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					max9286_des0ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					max9286_des0ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					max9286_csi0ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* Slot B (CN11) */
++
++			ov106xx@4 {
++				compatible = "ovti,ov106xx";
++				reg = <0x64>;
++
++				port@0 {
++					ov106xx_in4: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin4ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep0>;
++					};
++					ov106xx_ti964_des1ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep0>;
++					};
++					ov106xx_ti954_des1ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep0>;
++					};
++				};
++			};
++
++			ov106xx@5 {
++				compatible = "ovti,ov106xx";
++				reg = <0x65>;
++
++				port@0 {
++					ov106xx_in5: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin5ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep1>;
++					};
++					ov106xx_ti964_des1ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep1>;
++					};
++					ov106xx_ti954_des1ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep1>;
++					};
++				};
++			};
++
++			ov106xx@6 {
++				compatible = "ovti,ov106xx";
++				reg = <0x66>;
++
++				port@0 {
++					ov106xx_in6: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin6ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep2>;
++					};
++					ov106xx_ti964_des1ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep2>;
++					};
++				};
++			};
++
++			ov106xx@7 {
++				compatible = "ovti,ov106xx";
++				reg = <0x67>;
++
++				port@0 {
++					ov106xx_in7: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin7ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep3>;
++					};
++					ov106xx_ti964_des1ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@1 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti964_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti964_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					ti964_des1ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					ti964_des1ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					ti964_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@1 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				/* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti954_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti954_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++				};
++				port@1 {
++					ti954_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2c */
++			max9286-max9271@1 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2c>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des1ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					max9286_des1ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					max9286_des1ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					max9286_des1ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					max9286_csi2ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* Slot C (CN12) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* Slot A (CN10) */
++
++			video_a_ext0: pca9535@26 {
++				compatible = "nxp,pca9535";
++				reg = <0x26>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR2";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++				video_a_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A DES_SHDN";
++				};
++				video_a_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A led";
++				};
++			};
++
++			video_a_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg2";
++				};
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr2 {
++					gpio-hog;
++					gpios = <10 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR2";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++				video_a_des_shdn {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A DES_SHDN";
++				};
++				video_a_led {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A LED";
++				};
++			};
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* Slot B (CN11) */
++
++			video_b_ext0: pca9535@26 {
++				compatible = "nxp,pca9535";
++				reg = <0x26>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR2";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++				video_b_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B DES_SHDN";
++				};
++				video_b_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B led";
++				};
++			};
++
++			video_b_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg2";
++				};
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr2 {
++					gpio-hog;
++					gpios = <10 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR2";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++				video_b_des_shdn {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B DES_SHDN";
++				};
++				video_b_led {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B LED";
++				};
++			};
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			/* Slot C (CN12) */
++		};
++	};
++};
++
++&i2c4 {
++	i2cswitch4: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* FAN node - EMC2103 */
++			fan_ctrl:ecm2103@2e {
++				compatible = "emc2103";
++				reg = <0x2e>;
++			};
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* Power nodes - 2 x TPS544x20 */
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* CAN and power board nodes */
++
++			gpio_ext_pwr: pca9535@22 {
++				compatible = "nxp,pca9535";
++				reg = <0x22>;
++				gpio-controller;
++				#gpio-cells = <2>;
++				interrupt-controller;
++				interrupt-parent = <&gpio1>;
++				interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++
++				/* enable input DCDC after wake-up signal released */
++				pwr_hold {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "pwr_hold";
++				};
++
++				/* CAN0 */
++				can0_stby {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can0_stby";
++				};
++				can0_load {
++					gpio-hog;
++					gpios = <0 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can0_120R_load";
++				};
++				/* CAN1 */
++				can1_stby {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can1_stby";
++				};
++				can1_load {
++					gpio-hog;
++					gpios = <1 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can1_120R_load";
++				};
++				/* CAN2 */
++				can2_stby {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can2_stby";
++				};
++				can2_load {
++					gpio-hog;
++					gpios = <2 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can2_120R_load";
++				};
++				can2_rst {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "can2_rst";
++				};
++				/* CAN3 */
++				can3_stby {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can3_stby";
++				};
++				can3_load {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can3_120R_load";
++				};
++				can3_rst {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "can3_rst";
++				};
++			};
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* FPDLink output node - DS90UH947 */
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			/* BCM switch node */
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* LED board node(s) */
++
++			gpio_ext_led: pca9535@22 {
++				compatible = "nxp,pca9535";
++				reg = <0x22>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				/* gpios 0..7 are used for indication LEDs, low-active */
++			};
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* M2 connector i2c node(s) */
++		};
++
++		/* port 7 is not used */
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec0 {
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++			vin0_ti964_des0ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep0>;
++			};
++			vin0_ti954_des0ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++			vin1_ti964_des0ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep1>;
++			};
++			vin1_ti954_des0ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++			vin2_ti964_des0ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++			vin3_ti964_des0ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++			vin4_ti964_des1ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep0>;
++			};
++			vin4_ti954_des1ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++			vin5_ti964_des1ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep1>;
++			};
++			vin5_ti954_des1ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++			vin6_ti964_des1ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++			vin7_ti964_des1ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&rcar_sound {
++	pinctrl-0 = <&sound_clk_pins>;
++
++	/* Multi DAI */
++	#sound-dai-cells = <1>;
++};
++
++&sata {
++	status = "okay";
++};
++
++&ssi1 {
++	/delete-property/shared-pin;
++};
++
++&avb {
++	/delete-property/phy-handle;
++	/delete-property/phy-gpios;
++	phy-mode = "rgmii";
++
++	/delete-node/ethernet-phy@0;
++
++	fixed-link {
++		speed = <100>;
++		full-duplex;
++	};
++};
++
++&msiof1 {
++	status = "disabled";
++};
++
++&usb2_phy0 {
++	pinctrl-0 = <&usb0_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&xhci0 {
++	status = "okay";
++};
++
++&hsusb {
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++
++	renesas,can-clock-select = <0x0>;
++
++	channel0 {
++		status = "okay";
++	};
++
++	channel1 {
++		status = "okay";
++	};
++};
++
++/* uncomment to enable CN12 on VIN4-7 */
++//#include "ulcb-vb-cn12.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
+new file mode 100644
+index 0000000..de56fa4
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
+@@ -0,0 +1,546 @@
++/*
++ * Device Tree Source for the H3ULCB.View board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb.dts"
++
++/ {
++	model = "Renesas H3ULCB.View board based on r8a7795";
++};
++
++&i2c4 {
++	ov106xx@0 {
++		compatible = "ovti,ov106xx";
++		reg = <0x60>;
++
++		port@0 {
++			ov106xx_in0: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin0ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++
++	ov106xx@1 {
++		compatible = "ovti,ov106xx";
++		reg = <0x61>;
++
++		port@0 {
++			ov106xx_in1: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin1ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++
++	ov106xx@2 {
++		compatible = "ovti,ov106xx";
++		reg = <0x62>;
++
++		port@0 {
++			ov106xx_in2: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin2ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++
++	ov106xx@3 {
++		compatible = "ovti,ov106xx";
++		reg = <0x63>;
++
++		port@0 {
++			ov106xx_in3: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin3ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des0ep3: endpoint {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++
++	ov106xx@4 {
++		compatible = "ovti,ov106xx";
++		reg = <0x64>;
++
++		port@0 {
++			ov106xx_in4: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin4ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++
++	ov106xx@5 {
++		compatible = "ovti,ov106xx";
++		reg = <0x65>;
++
++		port@0 {
++			ov106xx_in5: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin5ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++
++	ov106xx@6 {
++		compatible = "ovti,ov106xx";
++		reg = <0x66>;
++
++		port@0 {
++			ov106xx_in6: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin6ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++
++	ov106xx@7 {
++		compatible = "ovti,ov106xx";
++		reg = <0x67>;
++
++		port@0 {
++			ov106xx_in7: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin7ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des1ep3: endpoint {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++
++	max9286-max9271@0 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x4c>;
++		gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++		maxim,i2c-quirk = <0x6c>;
++
++		port@0 {
++			max9286_des0ep0: endpoint@0 {
++				max9271-addr = <0x50>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++			max9286_des0ep1: endpoint@1 {
++				max9271-addr = <0x51>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++			max9286_des0ep2: endpoint@2 {
++				max9271-addr = <0x52>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++			max9286_des0ep3: endpoint@3 {
++				max9271-addr = <0x53>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			max9286_csi0ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++	};
++
++	max9286-max9271@1 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x6c>;
++		gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++
++		port@0 {
++			max9286_des1ep0: endpoint@0 {
++				max9271-addr = <0x54>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in4>;
++			};
++			max9286_des1ep1: endpoint@1 {
++				max9271-addr = <0x55>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++			};
++			max9286_des1ep2: endpoint@2 {
++				max9271-addr = <0x56>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in6>;
++			};
++			max9286_des1ep3: endpoint@3 {
++				max9271-addr = <0x57>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in7>;
++			};
++		};
++		port@1 {
++			max9286_csi2ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts
+new file mode 100644
+index 0000000..3f3d66a
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts
+@@ -0,0 +1,552 @@
++/*
++ * Device Tree Source for the Salvator-X.View board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2015-2017 Cogent Embedded, Inc
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-salvator-x.dts"
++
++/ {
++	model = "Renesas Salvator-X.View board based on r8a7795";
++};
++
++&pfc {
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++};
++
++&i2c4 {
++	/delete-node/hdmi-in@34;
++	/delete-node/composite-in@70;
++
++	ov106xx@0 {
++		compatible = "ovti,ov106xx";
++		reg = <0x60>;
++
++		port@0 {
++			ov106xx_in0: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin0ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++
++	ov106xx@1 {
++		compatible = "ovti,ov106xx";
++		reg = <0x61>;
++
++		port@0 {
++			ov106xx_in1: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin1ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++
++	ov106xx@2 {
++		compatible = "ovti,ov106xx";
++		reg = <0x62>;
++
++		port@0 {
++			ov106xx_in2: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin2ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++
++	ov106xx@3 {
++		compatible = "ovti,ov106xx";
++		reg = <0x63>;
++
++		port@0 {
++			ov106xx_in3: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin3ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des0ep3: endpoint {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++
++	ov106xx@4 {
++		compatible = "ovti,ov106xx";
++		reg = <0x64>;
++
++		port@0 {
++			ov106xx_in4: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin4ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++
++	ov106xx@5 {
++		compatible = "ovti,ov106xx";
++		reg = <0x65>;
++
++		port@0 {
++			ov106xx_in5: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin5ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++
++	ov106xx@6 {
++		compatible = "ovti,ov106xx";
++		reg = <0x66>;
++
++		port@0 {
++			ov106xx_in6: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin6ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++
++	ov106xx@7 {
++		compatible = "ovti,ov106xx";
++		reg = <0x67>;
++
++		port@0 {
++			ov106xx_in7: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin7ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des1ep3: endpoint {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++
++	max9286-max9271@0 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x4c>;
++		gpios = <&gpio6 30 GPIO_ACTIVE_LOW>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++		maxim,i2c-quirk = <0x6c>;
++
++		port@0 {
++			max9286_des0ep0: endpoint@0 {
++				max9271-addr = <0x50>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++			max9286_des0ep1: endpoint@1 {
++				max9271-addr = <0x51>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++			max9286_des0ep2: endpoint@2 {
++				max9271-addr = <0x52>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++			max9286_des0ep3: endpoint@3 {
++				max9271-addr = <0x53>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			max9286_csi0ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++	};
++
++	max9286-max9271@1 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x6c>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++
++		port@0 {
++			max9286_des1ep0: endpoint@0 {
++				max9271-addr = <0x54>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in4>;
++			};
++			max9286_des1ep1: endpoint@1 {
++				max9271-addr = <0x55>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++			};
++			max9286_des1ep2: endpoint@2 {
++				max9271-addr = <0x56>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in6>;
++			};
++			max9286_des1ep3: endpoint@3 {
++				max9271-addr = <0x57>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in7>;
++			};
++		};
++		port@1 {
++			max9286_csi2ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++	};
++};
++
++&vin0 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_20 {
++	status = "disabled";
++	/delete-node/ports;
++};
++
++&csi2_40 {
++	/delete-node/ports;
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
+new file mode 100644
+index 0000000..ae115bd
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
+@@ -0,0 +1,22 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board Alfa side
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb-had.dtsi"
++
++/ {
++	model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795";
++};
++
++&pciec0 {
++	status = "okay";
++
++	/* Root complex */
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts
+new file mode 100644
+index 0000000..805067e
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts
+@@ -0,0 +1,23 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board Beta side
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb-had.dtsi"
++
++/ {
++	model = "Renesas H3ULCB.HAD board Beta side based on r8a7795";
++};
++
++&pciec0 {
++	status = "okay";
++
++	/* Endpoint */
++	endpoint;
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
+new file mode 100644
+index 0000000..4a00426
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
+@@ -0,0 +1,219 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board on r8a7795
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/*
++ * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides)
++ * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0)
++ */
++
++#include "r8a7795-h3ulcb-view.dts"
++
++/ {
++	model = "Renesas H3ULCB.HAD board based on r8a7795";
++
++	aliases {
++		serial1 = &scif1;
++		spi1 = &spi0_gpio;
++		spi2 = &spi1_gpio;
++	};
++
++	chosen {
++		stdout-path = "serial1:115200n8";
++	};
++
++	spi0_gpio: spi_gpio@0 {
++		compatible = "spi-gpio";
++		num-chipselects = <1>;
++		gpio-sck = <&gpio5 17 0>;
++		gpio-mosi = <&gpio5 20 0>;
++		gpio-miso = <&gpio5 22 0>;
++		cs-gpios = <&gpio5 19 0>;
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		spidev@0 {
++			compatible = "spi-gpio";
++			reg = <0>;
++			spi-max-frequency = <2000000>;
++			spi-cpha;
++			spi-cpol;
++		};
++	};
++
++	spi1_gpio: spi_gpio@1 {
++		compatible = "spi-gpio";
++		num-chipselects = <1>;
++		gpio-sck = <&gpio6 8 0>;
++		gpio-mosi = <&gpio6 7 0>;
++		gpio-miso = <&gpio6 10 0>;
++		cs-gpios = <&gpio6 5 0>;
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		spidev@0 {
++			compatible = "spi-gpio";
++			reg = <0>;
++			spi-max-frequency = <2000000>;
++			spi-cpha;
++			spi-cpol;
++		};
++	};
++
++	hdmi1-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi1_con: endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_out>;
++			};
++		};
++	};
++};
++
++&du {
++	ports {
++		port@1 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi0_in>;
++			};
++		};
++		port@2 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_in>;
++			};
++		};
++	};
++};
++
++&hdmi1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		port@0 {
++			reg = <0>;
++				rcar_dw_hdmi1_in: endpoint {
++				remote-endpoint = <&du_out_hdmi1>;
++			};
++		};
++		port@1 {
++			reg = <1>;
++				rcar_dw_hdmi1_out: endpoint {
++				remote-endpoint = <&hdmi1_con>;
++			};
++		};
++	};
++};
++
++&pfc {
++	scif1_pins: scif1 {
++		groups = "scif1_data_a";
++		function = "scif1";
++	};
++
++	msiof0_pins: spi1 {
++		groups = "msiof0_clk", "msiof0_rxd",  "msiof0_txd",
++			 "msiof0_ss1";
++		function = "msiof0";
++	};
++
++	msiof1_pins: spi2 {
++		groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a",
++			 "msiof1_ss1_a";
++		function = "msiof1";
++	};
++
++	sound_clk_pins: sound-clk {
++		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
++			 "audio_clkout_a" /*, "audio_clkout3_a"*/;
++		function = "audio_clk";
++	};
++
++	usb31_pins: usb31 {
++		groups = "usb31";
++		function = "usb31";
++	};
++
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++};
++
++&scif1 {
++	pinctrl-0 = <&scif1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&avb {
++	/delete-property/phy-handle;
++	/delete-property/phy-gpios;
++	/delete-node/ethernet-phy@0;
++
++	fixed-link {
++		speed = <1000>;
++		full-duplex;
++	};
++};
++
++&msiof0 {
++	pinctrl-0 = <&msiof0_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++	cs-gpios = <&gpio5 19 0>;
++
++	spidev@0 {
++		compatible = "renesas,sh-msiof";
++		reg = <0>;
++		spi-max-frequency = <66666666>;
++		spi-cpha;
++		spi-cpol;
++	};
++};
++
++&msiof1 {
++	status = "disabled";
++	cs-gpios = <&gpio6 5 0>;
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++
++	renesas,can-clock-select = <0x0>;
++	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
++		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
++		>;
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++	gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
++		 &gpio2 7 GPIO_ACTIVE_LOW /* standby */
++		>;
++
++	channel0 {
++		status = "okay";
++	};
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
+new file mode 100644
+index 0000000..4b10d31
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
+@@ -0,0 +1,443 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher V1 board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb-kf.dts"
++
++/ {
++	model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795";
++
++	aliases {
++		serial1 = &hscif0;
++		serial2 = &hscif1;
++		serial3 = &scif1;
++	};
++
++	wlan_en: regulator@4 {
++		compatible = "regulator-fixed";
++		regulator-name = "wlan-en-regulator";
++
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	codec_en_reg: regulator@6 {
++		compatible = "regulator-fixed";
++		regulator-name = "codec-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 15 0>;
++
++		/* delay - CHECK */
++		startup-delay-us = <70000>;
++		enable-active-high;
++	};
++
++	amp_en_reg: regulator@7 {
++		compatible = "regulator-fixed";
++		regulator-name = "amp-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 0 0>;
++
++		startup-delay-us = <0>;
++		enable-active-high;
++	};
++
++	/delete-node/regulator@8;
++
++	sdio_switch: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "wifi_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_74 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	/delete-node/regulator@10;
++
++	radio_switch: regulator@11 {
++		compatible = "regulator-fixed";
++		regulator-name = "radio_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	kim {
++		compatible = "kim";
++		nshutdown_gpio = <343>;  /* gpio_ext_74 pin 3 */
++		/* serial1 */
++		dev_name = "/dev/ttySC1";
++		flow_cntrl = <1>;
++		/* int div 8 hscif@26.6666656MHz */
++		baud_rate = <3333332>;
++	};
++
++	hdmi-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi_con: endpoint {
++				remote-endpoint = <&adv7513_out>;
++			};
++		};
++	};
++};
++
++&pfc {
++	/delete-node/hscif4;
++
++	scif1_pins: scif1 {
++		groups = "scif1_data_b";
++		function = "scif1";
++	};
++
++	hscif0_pins: hscif0 {
++		groups = "hscif0_data", "hscif0_ctrl";
++		function = "hscif0";
++	};
++
++	hscif1_pins: hscif1 {
++		groups = "hscif1_data_a", "hscif1_ctrl_a";
++		function = "hscif1";
++	};
++
++	du_pins: du {
++		groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++		function = "du";
++	};
++};
++
++&du {
++	pinctrl-0 = <&du_pins>;
++	pinctrl-names = "default";
++
++	ports {
++		port@0 {
++			endpoint {
++				remote-endpoint = <&adv7513_in>;
++			};
++		};
++		port@1 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi0_in>;
++			};
++		};
++	};
++};
++
++&gpio0 {
++	/delete-node/video_a_irq;
++	/delete-node/video_b_irq;
++	/delete-node/gpioext_2_20_irq;
++};
++
++&gpio1 {
++	/delete-node/gpioext_2_21_irq;
++	/delete-node/wifi_irq;
++};
++
++&gpio2 {
++	bl_pwm {
++		gpio-hog;
++		gpios = <3 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "BL PWM 100%";
++	};
++};
++
++&gpio5 {
++	/delete-node/touch_irq;
++	/delete-node/bt_strap;
++
++	/* V1 has h/w bug with swapped RTS and CTS on BT interface */
++	/* Ignore these pins */
++	hscif0_cts {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "hscif0 CTS";
++	};
++
++	hscif0_rts {
++		gpio-hog;
++		gpios = <16 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "hscif0 RTS";
++	};
++};
++
++&gpio7 {
++	/delete-node/gpioext_2_21_irq;
++};
++
++&scif1 {
++	pinctrl-0 = <&scif1_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hscif0 {
++	pinctrl-0 = <&hscif0_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&hscif1 {
++	pinctrl-0 = <&hscif1_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hscif4 {
++	/delete-property/pinctrl-0;
++	/delete-property/pinctrl-names;
++
++	status = "disabled";
++};
++
++&i2c2 {
++	/delete-node/pca9535@20;
++	/delete-node/pca9535@21;
++
++	gpio_ext_74: pca9539@74 {
++		compatible = "nxp,pca9539";
++		reg = <0x74>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio6>;
++		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++		hub_pwen {
++			gpio-hog;
++			gpios = <6 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "HUB pwen";
++		};
++		hub_rst {
++			gpio-hog;
++			gpios = <7 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "HUB rst";
++		};
++		otg_offvbus {
++			gpio-hog;
++			gpios = <8 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "OTG off VBUSn";
++		};
++		otg_extlpn {
++			gpio-hog;
++			gpios = <9 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "OTG EXTLPn";
++		};
++		otg_stat1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "OTG Stat1";
++		};
++		otg_stat2 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "OTG Stat2";
++		};
++	};
++
++	gpio_ext_75: pca9539@75 {
++		compatible = "nxp,pca9539";
++		reg = <0x75>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio6>;
++		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++		gps_rst {
++			gpio-hog;
++			gpios = <6 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "GPS rst";
++		};
++		fpdl_shdn {
++			gpio-hog;
++			gpios = <9 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "FPDLink shdn";
++		};
++	};
++};
++
++&i2cswitch2 {
++	reg = <0x71>;
++	reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
++
++	i2c@4 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <4>;
++
++		hdmi@3d {
++			compatible = "adi,adv7511w";
++			reg = <0x3d>;
++			interrupt-parent = <&gpio2>;
++			interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++			pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++			adi,input-depth = <8>;
++			adi,input-colorspace = "rgb";
++			adi,input-clock = "1x";
++			adi,input-style = <1>;
++			adi,input-justification = "evenly";
++			adi,clock-delay = <1200>;
++
++			ports {
++				#address-cells = <1>;
++				#size-cells = <0>;
++
++				port@0 {
++					reg = <0>;
++					adv7513_in: endpoint {
++						remote-endpoint = <&du_out_rgb>;
++					};
++				};
++
++				port@1 {
++					reg = <1>;
++					adv7513_out: endpoint {
++						remote-endpoint = <&hdmi_con>;
++					};
++				};
++			};
++		};
++	};
++};
++
++&i2c4 {
++	/delete-node/pca9535@21;
++
++	gpio_ext_76: pca9539@76 {
++		compatible = "nxp,pca9539";
++		reg = <0x76>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio7>;
++		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++		port_b_a0 {
++			gpio-hog;
++			gpios = <0 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "Video-B A0";
++		};
++		port_b_a1 {
++			gpio-hog;
++			gpios = <1 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "Video-B A1";
++		};
++		port_a_a0 {
++			gpio-hog;
++			gpios = <2 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "Video-A A0";
++		};
++		port_a_a1 {
++			gpio-hog;
++			gpios = <3 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "Video-A A1";
++		};
++		/* pin 12 - CAM_CLK */
++		rpi_cam_io_1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO1";
++		};
++		/* pin 11 - CAM_GPIO - assume pwdn */
++		rpi_cam_io_0 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO0";
++		};
++		/* 0 - FPDLink output, 1 - LVDS output */
++		lvds_vs_fpdl {
++			gpio-hog;
++			gpios = <14 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "LVDS switch";
++		};
++	};
++
++	gpio_ext_77: pca9539@77 {
++		compatible = "nxp,pca9539";
++		reg = <0x77>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio5>;
++		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++		mpcie_wake {
++			gpio-hog;
++			gpios = <0 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "mPCIe WAKE#";
++		};
++		mpcie_wdisable {
++			gpio-hog;
++			gpios = <1 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "mPCIe W_DISABLE";
++		};
++		mpcie_clreq {
++			gpio-hog;
++			gpios = <2 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "mPCIe CLKREQ#";
++		};
++		mpcie_ovc {
++			gpio-hog;
++			gpios = <3 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "mPCIe OVC";
++		};
++	};
++};
++
++&i2cswitch4 {
++	reg = <0x71>;
++	reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++};
++
++&wlcore {
++	interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+new file mode 100644
+index 0000000..2c50230
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+@@ -0,0 +1,1651 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board on r8a7795
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb.dts"
++
++/ {
++	model = "Renesas H3ULCB Kingfisher board based on r8a7795";
++
++	aliases {
++		serial1 = &hscif4;
++	};
++
++	snd_clk: snd_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <24576000>;
++		clock-output-names = "scki";
++	};
++
++	wlan_en: regulator@4 {
++		compatible = "regulator-fixed";
++		regulator-name = "wlan-en-regulator";
++
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	vcc_sdhi3: regulator@41 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 Vcc";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++	};
++
++	vccq_sdhi3: regulator@5 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 VccQ";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	codec_en_reg: regulator@6 {
++		compatible = "regulator-fixed";
++		regulator-name = "codec-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 15 0>;
++
++		/* delay - CHECK */
++		startup-delay-us = <70000>;
++		enable-active-high;
++	};
++
++	amp_en_reg: regulator@7 {
++		compatible = "regulator-fixed";
++		regulator-name = "amp-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 0 0>;
++
++		startup-delay-us = <0>;
++		enable-active-high;
++	};
++
++	lvds_switch: regulator@8 {
++		compatible = "regulator-fixed";
++		regulator-name = "lvds_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio1 24 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	sdio_switch: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "wifi_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_20 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	sound_switch: regulator@10 {
++		compatible = "regulator-fixed";
++		regulator-name = "pcm3168a_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_21 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	radio_switch: regulator@11 {
++		compatible = "regulator-fixed";
++		regulator-name = "radio_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	kim {
++		compatible = "kim";
++		nshutdown_gpio = <343>;  /* pca9535@i2c2.0x20 pin 3 */
++		/* serial1 */
++		dev_name = "/dev/ttySC1";
++		flow_cntrl = <1>;
++		/* int div 8 hscif@26.6666656MHz */
++		baud_rate = <3333332>;
++	};
++
++	btwilink {
++		compatible = "btwilink";
++	};
++
++	sound_ext: sound@0 {
++		pinctrl-0 = <&sound_0_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "pcm3168a";
++
++		simple-audio-card,bitclock-master = <&sound_ext_master>;
++		simple-audio-card,frame-master = <&sound_ext_master>;
++		sound_ext_master: simple-audio-card,cpu@0 {
++			sound-dai = <&rcar_sound 0>;
++			dai-tdm-slot-num = <8>;
++			dai-tdm-slot-width = <32>;
++		};
++
++		simple-audio-card,codec@0 {
++			sound-dai = <&pcm3168a>;
++			dai-tdm-slot-num = <8>;
++			dai-tdm-slot-width = <32>;
++			system-clock-frequency = <24576000>;
++		};
++	};
++
++	/delete-node/sound;
++
++	rsnd_ak4613: sound@1 {
++		pinctrl-0 = <&sound_1_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "ak4613";
++
++		simple-audio-card,bitclock-master = <&sndcpu>;
++		simple-audio-card,frame-master = <&sndcpu>;
++
++		sndcpu: simple-audio-card,cpu@1 {
++			sound-dai = <&rcar_sound 1>;
++		};
++
++		sndcodec: simple-audio-card,codec@1 {
++			sound-dai = <&ak4613>;
++		};
++	};
++
++	sound_radio: sound@2 {
++		pinctrl-0 = <&sound_2_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "i2s";
++		simple-audio-card,name = "radio";
++
++		simple-audio-card,bitclock-master = <&sound_radio_master>;
++		simple-audio-card,frame-master = <&sound_radio_master>;
++		simple-audio-card,cpu@2 {
++			sound-dai = <&rcar_sound 2>;
++		};
++
++		sound_radio_master: simple-audio-card,codec@2 {
++			sound-dai = <&radio>;
++			system-clock-frequency = <12288000>;
++		};
++	};
++
++	lvds-encoder {
++		compatible = "thine,thc63lvdm83d";
++
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			port@0 {
++				reg = <0>;
++				lvds_enc_in: endpoint {
++					remote-endpoint = <&du_out_lvds0>;
++				};
++			};
++			port@1 {
++				reg = <1>;
++				lvds_enc_out: endpoint {
++					remote-endpoint = <&lvds_in>;
++				};
++			};
++		};
++	};
++
++	lvds {
++		compatible = "lvds-connector";
++
++		width-mm = <210>;
++		height-mm = <158>;
++
++		panel-timing {
++			/* 1280x800 @60Hz */
++			clock-frequency = <65000000>;
++			hactive = <1280>;
++			vactive = <800>;
++			hsync-len = <40>;
++			hfront-porch = <80>;
++			hback-porch = <40>;
++			vfront-porch = <14>;
++			vback-porch = <14>;
++			vsync-len = <4>;
++		};
++
++		port {
++			lvds_in: endpoint {
++				remote-endpoint = <&lvds_enc_out>;
++			};
++		};
++	};
++
++	radio: si468x@0 {
++		compatible = "si,si468x-pcm";
++		status = "okay";
++
++		#sound-dai-cells = <0>;
++	};
++};
++
++&pfc {
++	hscif4_pins: hscif4 {
++		groups = "hscif4_data_a", "hscif4_ctrl";
++		function = "hscif4";
++	};
++
++	sdhi3_pins_3v3: sd3_3v3 {
++		groups = "sdhi3_data4", "sdhi3_ctrl";
++		function = "sdhi3";
++		power-source = <3300>;
++	};
++
++	sound_0_pins: sound0 {
++		groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++		function = "ssi";
++	};
++
++	sound_1_pins: sound1 {
++		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++		function = "ssi";
++	};
++
++	sound_2_pins: sound2 {
++		groups = "ssi6_ctrl", "ssi6_data";
++		function = "ssi";
++	};
++
++	usb0_pins: usb0 {
++		groups = "usb0";
++		function = "usb0";
++	};
++
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++
++	canfd1_pins: canfd1 {
++		groups = "canfd1_data";
++		function = "canfd1";
++	};
++};
++
++&gpio0 {
++	video_a_irq {
++		gpio-hog;
++		gpios = <13 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-A irq";
++	};
++
++	video_b_irq {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-B irq";
++	};
++
++	gpioext_2_20_irq {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x20@i2c2 irq";
++	};
++};
++
++&gpio1 {
++	gpioext_2_21_irq {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x21@i2c2 irq";
++	};
++
++	wifi_irq {
++		gpio-hog;
++		gpios = <25 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "wifi irq";
++	};
++};
++
++&gpio5 {
++	touch_irq {
++		gpio-hog;
++		gpios = <6 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "touch irq";
++	};
++
++	/* From TI forum */
++	/* BT_AUD_OUT should be pulled low when WL_EN is activated. */
++	/* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
++	bt_strap {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		output-low;
++		line-name = "BT strap pin";
++	};
++};
++
++&gpio7 {
++	gpioext_2_21_irq {
++		gpio-hog;
++		gpios = <3 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x21@i2c4 irq";
++	};
++};
++
++&hscif4 {
++	pinctrl-0 = <&hscif4_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++
++	gpio_ext_20: pca9535@20 {
++		compatible = "nxp,pca9535";
++		reg = <0x20>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio0>;
++		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++	};
++
++	gpio_ext_21: pca9535@21 {
++		compatible = "nxp,pca9535";
++		reg = <0x21>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio1>;
++		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++	};
++
++	i2cswitch2: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* BCM node(s) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* USB3.0 HUB node(s) */
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* Power amp node(s) */
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* Radio node(s) */
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			/* A2B node(s) */
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* PCIe node(s) */
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* LVDS display node(s) */
++
++			polytouch: edt-ft5x06@38 {
++				compatible = "edt,edt-ft5x06";
++				reg = <0x38>;
++				interrupt-parent = <&gpio5>;
++				interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
++			};
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Audio, GPS and Gyro node(s) */
++
++			pcm3168a: audio-codec@44 {
++				#sound-dai-cells = <0>;
++				compatible = "ti,pcm3168a";
++				reg = <0x44>;
++				clocks = <&snd_clk>;
++				clock-names = "scki";
++				tdm;
++				VDD1-supply = <&codec_en_reg>;
++				VDD2-supply = <&codec_en_reg>;
++				VCCAD1-supply = <&codec_en_reg>;
++				VCCAD2-supply = <&codec_en_reg>;
++				VCCDA1-supply = <&amp_en_reg>;
++				VCCDA2-supply = <&amp_en_reg>;
++			};
++
++			lsm9ds0_acc_mag@1d {
++				compatible = "st,lsm9ds0_acc_mag";
++				reg = <0x1d>;
++			};
++
++			lsm9ds0_gyr@6b {
++				compatible = "st,lsm9ds0-gyro";
++				reg = <0x6b>;
++			};
++
++			/* GPS@ 0x42 */
++		};
++	};
++};
++
++&i2c4 {
++	gpio_ext_22: pca9535@21 {
++		compatible = "nxp,pca9535";
++		reg = <0x22>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio7>;
++		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++		/* pin 12 - CAM_CLK */
++		rpi_cam_io_1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO1";
++		};
++		/* pin 11 - CAM_GPIO - assume pwdn */
++		rpi_cam_io_0 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO0";
++		};
++	};
++
++	i2cswitch4: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* SAM node(s) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* Slot A (CN10) */
++
++			ov106xx@0 {
++				compatible = "ovti,ov106xx";
++				reg = <0x60>;
++
++				port@0 {
++					ov106xx_in0: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin0ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep0>;
++					};
++					ov106xx_ti964_des0ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep0>;
++					};
++					ov106xx_ti954_des0ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep0>;
++					};
++				};
++			};
++
++			ov106xx@1 {
++				compatible = "ovti,ov106xx";
++				reg = <0x61>;
++
++				port@0 {
++					ov106xx_in1: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin1ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep1>;
++					};
++					ov106xx_ti964_des0ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep1>;
++					};
++					ov106xx_ti954_des0ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep1>;
++					};
++				};
++			};
++
++			ov106xx@2 {
++				compatible = "ovti,ov106xx";
++				reg = <0x62>;
++
++				port@0 {
++					ov106xx_in2: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin2ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep2>;
++					};
++					ov106xx_ti964_des0ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep2>;
++					};
++				};
++			};
++
++			ov106xx@3 {
++				compatible = "ovti,ov106xx";
++				reg = <0x63>;
++
++				port@0 {
++					ov106xx_in3: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin3ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep3>;
++					};
++					ov106xx_ti964_des0ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@0 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti964_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti964_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					ti964_des0ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					ti964_des0ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					ti964_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@0 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti954_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti954_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++				};
++				port@1 {
++					ti954_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2a */
++			max9286-max9271@0 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2a>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des0ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					max9286_des0ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					max9286_des0ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					max9286_des0ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					max9286_csi0ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* Slot B (CN11) */
++
++			ov106xx@4 {
++				compatible = "ovti,ov106xx";
++				reg = <0x64>;
++
++				port@0 {
++					ov106xx_in4: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin4ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep0>;
++					};
++					ov106xx_ti964_des1ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep0>;
++					};
++					ov106xx_ti954_des1ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep0>;
++					};
++				};
++			};
++
++			ov106xx@5 {
++				compatible = "ovti,ov106xx";
++				reg = <0x65>;
++
++				port@0 {
++					ov106xx_in5: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin5ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep1>;
++					};
++					ov106xx_ti964_des1ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep1>;
++					};
++					ov106xx_ti954_des1ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep1>;
++					};
++				};
++			};
++
++			ov106xx@6 {
++				compatible = "ovti,ov106xx";
++				reg = <0x66>;
++
++				port@0 {
++					ov106xx_in6: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin6ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep2>;
++					};
++					ov106xx_ti964_des1ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep2>;
++					};
++				};
++			};
++
++			ov106xx@7 {
++				compatible = "ovti,ov106xx";
++				reg = <0x67>;
++
++				port@0 {
++					ov106xx_in7: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin7ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep3>;
++					};
++					ov106xx_ti964_des1ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@1 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti964_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti964_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					ti964_des1ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					ti964_des1ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					ti964_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@1 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti954_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti954_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++				};
++				port@1 {
++					ti954_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2a */
++			max9286-max9271@1 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2a>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des1ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					max9286_des1ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					max9286_des1ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					max9286_des1ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					max9286_csi2ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* Slot B (CN11) */
++
++			video_b_ext0: pca9535@27 {
++				compatible = "nxp,pca9535";
++				reg = <0x27>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR2";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++				video_b_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B DES_SHDN";
++				};
++				video_b_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B led";
++				};
++			};
++
++			video_b_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B cfg2";
++				};
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++			};
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Slot A (CN10) */
++
++			video_a_ext0: pca9535@26 {
++				compatible = "nxp,pca9535";
++				reg = <0x26>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR2";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++				video_a_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A DES_SHDN";
++				};
++				video_a_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A led";
++				};
++			};
++
++			video_a_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg2";
++				};
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++			};
++		};
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec0 {
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++			vin0_ti964_des0ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep0>;
++			};
++			vin0_ti954_des0ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++			vin1_ti964_des0ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep1>;
++			};
++			vin1_ti954_des0ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++			vin2_ti964_des0ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++			vin3_ti964_des0ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++			vin4_ti964_des1ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep0>;
++			};
++			vin4_ti954_des1ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++			vin5_ti964_des1ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep1>;
++			};
++			vin5_ti954_des1ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++			vin6_ti964_des1ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++			vin7_ti964_des1ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&rcar_sound {
++	pinctrl-0 = <&sound_clk_pins>;
++
++	/* Multi DAI */
++	#sound-dai-cells = <1>;
++
++	rcar_sound,dai {
++		dai0 {
++			playback = <&ssi7>;
++			capture  = <&ssi8>;
++		};
++
++		dai1 {
++			playback = <&ssi0 &src0 &dvc0>;
++			capture  = <&ssi1 &src1 &dvc1>;
++		};
++
++		dai2 {
++			capture  = <&ssi6>;
++		};
++	};
++};
++
++&sdhi3 {
++	pinctrl-0 = <&sdhi3_pins_3v3>;
++	pinctrl-names = "default";
++
++	vmmc-supply = <&wlan_en>;
++	vqmmc-supply = <&vccq_sdhi3>;
++	keep-power-in-suspend;
++	enable-sdio-wakeup;
++	bus-width = <4>;
++	no-1-8-v;
++	non-removable;
++	cap-power-off-card;
++	max-frequency = <26000000>;
++	status = "okay";
++
++	#address-cells = <1>;
++	#size-cells = <0>;
++	wlcore: wlcore@2 {
++		compatible = "ti,wl1837";
++		reg = <2>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++	};
++};
++
++&usb2_phy0 {
++	pinctrl-0 = <&usb0_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&xhci0 {
++	status = "okay";
++};
++
++&msiof1 {
++	status = "disabled";
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++
++	channel0 {
++		status = "okay";
++	};
++
++	channel1 {
++		status = "okay";
++	};
++};
++
++/* uncomment to enable CN48 on VIN4 */
++//#include "ulcb-kf-rpi.dtsi"
++/* uncomment to enable CN47: SD on SDHI3 */
++//#include "ulcb-kf-sd3.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
+new file mode 100644
+index 0000000..a26689c
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
+@@ -0,0 +1,1787 @@
++/*
++ * Device Tree Source for the H3ULCB Videobox board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb.dts"
++
++/ {
++	model = "Renesas H3ULCB Videobox board based on r8a7795";
++
++	leds {
++		compatible = "gpio-leds";
++
++		led5 {
++			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
++		};
++		led6 {
++			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
++		};
++		/* D13 - status 0 */
++		led_ext00 {
++			gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>;
++			linux,default-trigger = "heartbeat";
++		};
++		/* D14 - status 1 */
++		led_ext01 {
++			gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>;
++			linux,default-trigger = "mmc1";
++		};
++		/* D16 - HDMI1 */
++		led_ext02 {
++			gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>;
++		};
++		/* D18 - HDMI0 */
++		led_ext03 {
++			gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>;
++		};
++		/* D20 - USB3.0 - 0.1 */
++		led_ext04 {
++			gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>;
++		};
++		/* D21 - USB3.0 - 0.2 */
++		led_ext05 {
++			gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>;
++		};
++		/* D24 - USB3.0 - 1.1 */
++		led6_ext06 {
++			gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>;
++		};
++		/* D25 - USB3.0 - 1.2 */
++		led_ext07 {
++			gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	snd_clk: snd_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <24576000>;
++		clock-output-names = "scki";
++	};
++
++	vccq_sdhi3: regulator@5 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 VccQ";
++		/* external voltage translator to 1.8V */
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	fpdlink_switch: regulator@8 {
++		compatible = "regulator-fixed";
++		regulator-name = "fpdlink_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio1 20 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	hub_reset: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "hub_reset";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio5 5 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	hub_power: regulator@10 {
++		compatible = "regulator-fixed";
++		regulator-name = "hub_power";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		gpio = <&gpio6 28 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	/delete-node/sound;
++
++	rsnd_ak4613: sound@0 {
++		pinctrl-0 = <&sound_0_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "ak4613";
++
++		simple-audio-card,bitclock-master = <&sndcpu>;
++		simple-audio-card,frame-master = <&sndcpu>;
++
++		sndcpu: simple-audio-card,cpu@1 {
++			sound-dai = <&rcar_sound>;
++		};
++
++		sndcodec: simple-audio-card,codec@1 {
++			sound-dai = <&ak4613>;
++		};
++	};
++
++	lvds-encoder {
++		compatible = "thine,thc63lvdm83d";
++
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			port@0 {
++				reg = <0>;
++				lvds_enc_in: endpoint {
++					remote-endpoint = <&du_out_lvds0>;
++				};
++			};
++			port@1 {
++				reg = <1>;
++				lvds_enc_out: endpoint {
++					remote-endpoint = <&lvds_in>;
++				};
++			};
++		};
++	};
++
++	lvds {
++		compatible = "lvds-connector";
++
++		width-mm = <210>;
++		height-mm = <158>;
++
++		panel-timing {
++			/* 1280x800 @60Hz */
++			clock-frequency = <65000000>;
++			hactive = <1280>;
++			vactive = <800>;
++			hsync-len = <40>;
++			hfront-porch = <80>;
++			hback-porch = <40>;
++			vfront-porch = <14>;
++			vback-porch = <14>;
++			vsync-len = <4>;
++		};
++
++		port {
++			lvds_in: endpoint {
++				remote-endpoint = <&lvds_enc_out>;
++			};
++		};
++	};
++
++	hdmi1-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi1_con: endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_out>;
++			};
++		};
++	};
++
++	excan_ref_clk: excan-ref-clock {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <16000000>;
++	};
++
++	radio: si468x@0 {
++		compatible = "si,si468x-pcm";
++		status = "okay";
++
++		#sound-dai-cells = <0>;
++	};
++
++	spi_gpio_sw {
++		compatible = "spi-gpio";
++		#address-cells = <0x1>;
++		#size-cells = <0x0>;
++		gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>;
++		gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>;
++		gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>;
++		cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
++		num-chipselects = <1>;
++
++		spidev: spidev@0 {
++			compatible = "spidev", "spi-gpio";
++			reg = <0>;
++			spi-max-frequency = <25000000>;
++			spi-cpha;
++			spi-cpol;
++		};
++	};
++
++	spi_gpio_can {
++		compatible = "spi-gpio";
++		#address-cells = <0x1>;
++		#size-cells = <0x0>;
++		gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>;
++		gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>;
++		gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>;
++		cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
++			    &gpio1 4 GPIO_ACTIVE_HIGH>;
++		num-chipselects = <2>;
++
++		spican0: spidev@0 {
++			compatible = "microchip,mcp2515";
++			reg = <0>;
++			clocks = <&excan_ref_clk>;
++			interrupt-parent = <&gpio0>;
++			interrupts = <15 GPIO_ACTIVE_LOW>;
++			spi-max-frequency = <10000000>;
++		};
++		spican1: spidev@1 {
++			compatible = "microchip,mcp2515";
++			reg = <1>;
++			clocks = <&excan_ref_clk>;
++			interrupt-parent = <&gpio1>;
++			interrupts = <5 GPIO_ACTIVE_LOW>;
++			spi-max-frequency = <10000000>;
++		};
++	};
++};
++
++&du {
++	ports {
++		port@1 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi0_in>;
++			};
++		};
++		port@2 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi1_in>;
++			};
++		};
++		port@3 {
++			endpoint {
++				remote-endpoint = <&lvds_enc_in>;
++			};
++		};
++	};
++};
++
++&hdmi1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		port@0 {
++			reg = <0>;
++			rcar_dw_hdmi1_in: endpoint {
++				remote-endpoint = <&du_out_hdmi1>;
++			};
++		};
++		port@1 {
++			reg = <1>;
++			rcar_dw_hdmi1_out: endpoint {
++				remote-endpoint = <&hdmi1_con>;
++			};
++		};
++	};
++};
++
++&pfc {
++	hscif4_pins: hscif4 {
++		groups = "hscif4_data_a", "hscif4_ctrl";
++		function = "hscif4";
++	};
++
++	sdhi3_pins_3v3: sd3_3v3 {
++		groups = "sdhi3_data4", "sdhi3_ctrl";
++		function = "sdhi3";
++		power-source = <3300>;
++	};
++
++	/delete-node/sound;
++
++	sound_0_pins: sound1 {
++		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++		function = "ssi";
++	};
++
++	usb0_pins: usb0 {
++		groups = "usb0";
++		function = "usb0";
++	};
++
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++
++	canfd1_pins: canfd1 {
++		groups = "canfd1_data";
++		function = "canfd1";
++	};
++};
++
++&gpio0 {
++	video_a_irq {
++		gpio-hog;
++		gpios = <12 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-A irq";
++	};
++
++	video_b_irq {
++		gpio-hog;
++		gpios = <13 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-B irq";
++	};
++
++	video_c_irq {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-C irq";
++	};
++};
++
++&gpio1 {
++	gpioext_4_22_irq {
++		gpio-hog;
++		gpios = <25 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x22@i2c4 irq";
++	};
++	pcie_disable {
++		gpio-hog;
++		gpios = <11 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "mPCIe W_DISABLE";
++	};
++	m2_sleep {
++		gpio-hog;
++		gpios = <6 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 SLEEP#";
++	};
++	m2_pres {
++		gpio-hog;
++		gpios = <7 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 Present";
++	};
++	m2_pcie_det {
++		gpio-hog;
++		gpios = <18 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 PCIe detected";
++	};
++	m2_usb_det {
++		gpio-hog;
++		gpios = <19 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 USB30 detected";
++	};
++	m2_usb_det {
++		gpio-hog;
++		gpios = <27 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 SSD detected";
++	};
++	eth_phy_reset {
++		gpio-hog;
++		gpios = <16 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "BR phy reset";
++	};
++	eth_sw_reset {
++		gpio-hog;
++		gpios = <17 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "BR switch reset";
++	};
++};
++
++&gpio2 {
++	m2_wake {
++		gpio-hog;
++		gpios = <1 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "M.2 WAKE#";
++	};
++	m2_pcie_en {
++		gpio-hog;
++		gpios = <4 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 PCIe enable";
++	};
++};
++
++&gpio3 {
++	m2_power_off {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 FULL_CARD_POWER_OFF#";
++	};
++};
++
++&gpio6 {
++	pcie_wake {
++		gpio-hog;
++		gpios = <4 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "mPCIe WAKE#";
++	};
++	pcie_clkreq {
++		gpio-hog;
++		gpios = <10 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "mPCIe CLKREQ#";
++	};
++	m2_rst {
++		gpio-hog;
++		gpios = <21 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "M.2 RESET#";
++	};
++};
++
++&hscif4 {
++	pinctrl-0 = <&hscif4_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++
++	i2cswitch2: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* USB3.0 HUB node(s) */
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* PCIe node(s) */
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Slot A (CN10) */
++
++			ov106xx@0 {
++				compatible = "ovti,ov106xx";
++				reg = <0x60>;
++
++				port@0 {
++					ov106xx_in0: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin0ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep0>;
++					};
++					ov106xx_ti964_des0ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep0>;
++					};
++					ov106xx_ti954_des0ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep0>;
++					};
++				};
++			};
++
++			ov106xx@1 {
++				compatible = "ovti,ov106xx";
++				reg = <0x61>;
++
++				port@0 {
++					ov106xx_in1: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin1ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep1>;
++					};
++					ov106xx_ti964_des0ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep1>;
++					};
++					ov106xx_ti954_des0ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep1>;
++					};
++				};
++			};
++
++			ov106xx@2 {
++				compatible = "ovti,ov106xx";
++				reg = <0x62>;
++
++				port@0 {
++					ov106xx_in2: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin2ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep2>;
++					};
++					ov106xx_ti964_des0ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep2>;
++					};
++				};
++			};
++
++			ov106xx@3 {
++				compatible = "ovti,ov106xx";
++				reg = <0x63>;
++
++				port@0 {
++					ov106xx_in3: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin3ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep3>;
++					};
++					ov106xx_ti964_des0ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@0 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti964_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti964_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					ti964_des0ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					ti964_des0ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					ti964_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@0 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				/* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti954_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti954_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++				};
++				port@1 {
++					ti954_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2c */
++			max9286-max9271@0 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2c>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des0ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					max9286_des0ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					max9286_des0ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					max9286_des0ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					max9286_csi0ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* Slot B (CN11) */
++
++			ov106xx@4 {
++				compatible = "ovti,ov106xx";
++				reg = <0x64>;
++
++				port@0 {
++					ov106xx_in4: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin4ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep0>;
++					};
++					ov106xx_ti964_des1ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep0>;
++					};
++					ov106xx_ti954_des1ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep0>;
++					};
++				};
++			};
++
++			ov106xx@5 {
++				compatible = "ovti,ov106xx";
++				reg = <0x65>;
++
++				port@0 {
++					ov106xx_in5: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin5ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep1>;
++					};
++					ov106xx_ti964_des1ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep1>;
++					};
++					ov106xx_ti954_des1ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des1ep1>;
++					};
++				};
++			};
++
++			ov106xx@6 {
++				compatible = "ovti,ov106xx";
++				reg = <0x66>;
++
++				port@0 {
++					ov106xx_in6: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin6ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep2>;
++					};
++					ov106xx_ti964_des1ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep2>;
++					};
++				};
++			};
++
++			ov106xx@7 {
++				compatible = "ovti,ov106xx";
++				reg = <0x67>;
++
++				port@0 {
++					ov106xx_in7: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin7ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des1ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des1ep3>;
++					};
++					ov106xx_ti964_des1ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des1ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@1 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti964_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti964_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					ti964_des1ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					ti964_des1ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					ti964_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@1 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				/* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "stp";
++
++				port@0 {
++					ti954_des1ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					ti954_des1ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++				};
++				port@1 {
++					ti954_csi2ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2c */
++			max9286-max9271@1 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2c>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des1ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in4>;
++					};
++					max9286_des1ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in5>;
++					};
++					max9286_des1ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in6>;
++					};
++					max9286_des1ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in7>;
++					};
++				};
++				port@1 {
++					max9286_csi2ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_41_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* Slot C (CN12) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* Slot A (CN10) */
++
++			video_a_ext0: pca9535@26 {
++				compatible = "nxp,pca9535";
++				reg = <0x26>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR2";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++				video_a_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A DES_SHDN";
++				};
++				video_a_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A led";
++				};
++			};
++
++			video_a_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg2";
++				};
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr2 {
++					gpio-hog;
++					gpios = <10 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR2";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++				video_a_des_shdn {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A DES_SHDN";
++				};
++				video_a_led {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A LED";
++				};
++			};
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* Slot B (CN11) */
++
++			video_b_ext0: pca9535@26 {
++				compatible = "nxp,pca9535";
++				reg = <0x26>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR2";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++				video_b_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B DES_SHDN";
++				};
++				video_b_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B led";
++				};
++			};
++
++			video_b_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_b_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg2";
++				};
++				video_b_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg1";
++				};
++				video_b_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					input;
++					line-name = "Video-B cfg0";
++				};
++				video_b_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR_SHDN";
++				};
++				video_b_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR0";
++				};
++				video_b_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR1";
++				};
++				video_b_cam_pwr2 {
++					gpio-hog;
++					gpios = <10 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR2";
++				};
++				video_b_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B PWR3";
++				};
++				video_b_des_shdn {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-B DES_SHDN";
++				};
++				video_b_led {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-B LED";
++				};
++			};
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			/* Slot C (CN12) */
++		};
++	};
++};
++
++&i2c4 {
++	i2cswitch4: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* FAN node - EMC2103 */
++			fan_ctrl:ecm2103@2e {
++				compatible = "emc2103";
++				reg = <0x2e>;
++			};
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* Power nodes - 2 x TPS544x20 */
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* CAN and power board nodes */
++
++			gpio_ext_pwr: pca9535@22 {
++				compatible = "nxp,pca9535";
++				reg = <0x22>;
++				gpio-controller;
++				#gpio-cells = <2>;
++				interrupt-controller;
++				interrupt-parent = <&gpio1>;
++				interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++
++				/* enable input DCDC after wake-up signal released */
++				pwr_hold {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "pwr_hold";
++				};
++
++				/* CAN0 */
++				can0_stby {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can0_stby";
++				};
++				can0_load {
++					gpio-hog;
++					gpios = <0 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can0_120R_load";
++				};
++				/* CAN1 */
++				can1_stby {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can1_stby";
++				};
++				can1_load {
++					gpio-hog;
++					gpios = <1 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can1_120R_load";
++				};
++				/* CAN2 */
++				can2_stby {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can2_stby";
++				};
++				can2_load {
++					gpio-hog;
++					gpios = <2 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can2_120R_load";
++				};
++				can2_rst {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "can2_rst";
++				};
++				/* CAN3 */
++				can3_stby {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can3_stby";
++				};
++				can3_load {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "can3_120R_load";
++				};
++				can3_rst {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "can3_rst";
++				};
++			};
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* FPDLink output node - DS90UH947 */
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			/* BCM switch node */
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* LED board node(s) */
++
++			gpio_ext_led: pca9535@22 {
++				compatible = "nxp,pca9535";
++				reg = <0x22>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				/* gpios 0..7 are used for indication LEDs, low-active */
++			};
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* M2 connector i2c node(s) */
++		};
++
++		/* port 7 is not used */
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec0 {
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++			vin0_ti964_des0ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep0>;
++			};
++			vin0_ti954_des0ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++			vin1_ti964_des0ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep1>;
++			};
++			vin1_ti954_des0ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++			vin2_ti964_des0ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++			vin3_ti964_des0ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++			vin4_ti964_des1ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep0>;
++			};
++			vin4_ti954_des1ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++			vin5_ti964_des1ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep1>;
++			};
++			vin5_ti954_des1ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++			vin6_ti964_des1ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++			vin7_ti964_des1ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&rcar_sound {
++	pinctrl-0 = <&sound_clk_pins>;
++
++	/* Multi DAI */
++	#sound-dai-cells = <1>;
++};
++
++&sata {
++	status = "okay";
++};
++
++&ssi1 {
++	/delete-property/shared-pin;
++};
++
++&avb {
++	/delete-property/phy-handle;
++	/delete-property/phy-gpios;
++	phy-mode = "rgmii";
++
++	/delete-node/ethernet-phy@0;
++
++	fixed-link {
++		speed = <100>;
++		full-duplex;
++	};
++};
++
++&msiof1 {
++	status = "disabled";
++};
++
++&usb2_phy0 {
++	pinctrl-0 = <&usb0_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&xhci0 {
++	status = "okay";
++};
++
++&hsusb0 {
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++
++	renesas,can-clock-select = <0x0>;
++
++	channel0 {
++		status = "okay";
++	};
++
++	channel1 {
++		status = "okay";
++	};
++};
++
++/* uncomment to enable CN12 on VIN4-7 */
++//#include "ulcb-vb-cn12.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
+new file mode 100644
+index 0000000..2c24b85
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
+@@ -0,0 +1,546 @@
++/*
++ * Device Tree Source for the H3ULCB.View board
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb.dts"
++
++/ {
++	model = "Renesas H3ULCB.View board based on r8a7795";
++};
++
++&i2c4 {
++	ov106xx@0 {
++		compatible = "ovti,ov106xx";
++		reg = <0x60>;
++
++		port@0 {
++			ov106xx_in0: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin0ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++
++	ov106xx@1 {
++		compatible = "ovti,ov106xx";
++		reg = <0x61>;
++
++		port@0 {
++			ov106xx_in1: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin1ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++
++	ov106xx@2 {
++		compatible = "ovti,ov106xx";
++		reg = <0x62>;
++
++		port@0 {
++			ov106xx_in2: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin2ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++
++	ov106xx@3 {
++		compatible = "ovti,ov106xx";
++		reg = <0x63>;
++
++		port@0 {
++			ov106xx_in3: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin3ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des0ep3: endpoint {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++
++	ov106xx@4 {
++		compatible = "ovti,ov106xx";
++		reg = <0x64>;
++
++		port@0 {
++			ov106xx_in4: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin4ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++
++	ov106xx@5 {
++		compatible = "ovti,ov106xx";
++		reg = <0x65>;
++
++		port@0 {
++			ov106xx_in5: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin5ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++
++	ov106xx@6 {
++		compatible = "ovti,ov106xx";
++		reg = <0x66>;
++
++		port@0 {
++			ov106xx_in6: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin6ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++
++	ov106xx@7 {
++		compatible = "ovti,ov106xx";
++		reg = <0x67>;
++
++		port@0 {
++			ov106xx_in7: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin7ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des1ep3: endpoint {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++
++	max9286-max9271@0 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x4c>;
++		gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++		maxim,i2c-quirk = <0x6c>;
++
++		port@0 {
++			max9286_des0ep0: endpoint@0 {
++				max9271-addr = <0x50>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++			max9286_des0ep1: endpoint@1 {
++				max9271-addr = <0x51>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++			max9286_des0ep2: endpoint@2 {
++				max9271-addr = <0x52>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++			max9286_des0ep3: endpoint@3 {
++				max9271-addr = <0x53>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			max9286_csi0ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++	};
++
++	max9286-max9271@1 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x6c>;
++		gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++
++		port@0 {
++			max9286_des1ep0: endpoint@0 {
++				max9271-addr = <0x54>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in4>;
++			};
++			max9286_des1ep1: endpoint@1 {
++				max9271-addr = <0x55>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++			};
++			max9286_des1ep2: endpoint@2 {
++				max9271-addr = <0x56>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in6>;
++			};
++			max9286_des1ep3: endpoint@3 {
++				max9271-addr = <0x57>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in7>;
++			};
++		};
++		port@1 {
++			max9286_csi2ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
+new file mode 100644
+index 0000000..fb12a39f3
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
+@@ -0,0 +1,552 @@
++/*
++ * Device Tree Source for the Salvator-X.View board
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2015-2017 Cogent Embedded, Inc
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-salvator-x.dts"
++
++/ {
++	model = "Renesas Salvator-X.View board based on r8a7795";
++};
++
++&pfc {
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++};
++
++&i2c4 {
++	/delete-node/hdmi-in@34;
++	/delete-node/composite-in@70;
++
++	ov106xx@0 {
++		compatible = "ovti,ov106xx";
++		reg = <0x60>;
++
++		port@0 {
++			ov106xx_in0: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin0ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++
++	ov106xx@1 {
++		compatible = "ovti,ov106xx";
++		reg = <0x61>;
++
++		port@0 {
++			ov106xx_in1: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin1ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++
++	ov106xx@2 {
++		compatible = "ovti,ov106xx";
++		reg = <0x62>;
++
++		port@0 {
++			ov106xx_in2: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin2ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++
++	ov106xx@3 {
++		compatible = "ovti,ov106xx";
++		reg = <0x63>;
++
++		port@0 {
++			ov106xx_in3: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin3ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des0ep3: endpoint {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++
++	ov106xx@4 {
++		compatible = "ovti,ov106xx";
++		reg = <0x64>;
++
++		port@0 {
++			ov106xx_in4: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin4ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++
++	ov106xx@5 {
++		compatible = "ovti,ov106xx";
++		reg = <0x65>;
++
++		port@0 {
++			ov106xx_in5: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin5ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++
++	ov106xx@6 {
++		compatible = "ovti,ov106xx";
++		reg = <0x66>;
++
++		port@0 {
++			ov106xx_in6: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin6ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++
++	ov106xx@7 {
++		compatible = "ovti,ov106xx";
++		reg = <0x67>;
++
++		port@0 {
++			ov106xx_in7: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin7ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des1ep3: endpoint {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++
++	max9286-max9271@0 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x4c>;
++		gpios = <&gpio6 30 GPIO_ACTIVE_LOW>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++		maxim,i2c-quirk = <0x6c>;
++
++		port@0 {
++			max9286_des0ep0: endpoint@0 {
++				max9271-addr = <0x50>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++			max9286_des0ep1: endpoint@1 {
++				max9271-addr = <0x51>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++			max9286_des0ep2: endpoint@2 {
++				max9271-addr = <0x52>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++			max9286_des0ep3: endpoint@3 {
++				max9271-addr = <0x53>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			max9286_csi0ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++	};
++
++	max9286-max9271@1 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x6c>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++
++		port@0 {
++			max9286_des1ep0: endpoint@0 {
++				max9271-addr = <0x54>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in4>;
++			};
++			max9286_des1ep1: endpoint@1 {
++				max9271-addr = <0x55>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++			};
++			max9286_des1ep2: endpoint@2 {
++				max9271-addr = <0x56>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in6>;
++			};
++			max9286_des1ep3: endpoint@3 {
++				max9271-addr = <0x57>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in7>;
++			};
++		};
++		port@1 {
++			max9286_csi2ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++	};
++};
++
++&vin0 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi41";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in4>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des1ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in5>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des1ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in6>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des1ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi41";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in7>;
++				data-lanes = <1 2 3 4>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_41_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des1ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des1ep3>;
++			};
++		};
++	};
++};
++
++&csi2_20 {
++	status = "disabled";
++	/delete-node/ports;
++};
++
++&csi2_40 {
++	/delete-node/ports;
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_41 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_41_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
+new file mode 100644
+index 0000000..ff0ec0f
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
+@@ -0,0 +1,443 @@
++/*
++ * Device Tree Source for the M3ULCB Kingfisher V1 board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7796-m3ulcb-kf.dts"
++
++/ {
++	model = "Renesas M3ULCB Kingfisher V1 board based on r8a7796";
++
++	aliases {
++		serial1 = &hscif0;
++		serial2 = &hscif1;
++		serial3 = &scif1;
++	};
++
++	wlan_en: regulator@4 {
++		compatible = "regulator-fixed";
++		regulator-name = "wlan-en-regulator";
++
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	codec_en_reg: regulator@6 {
++		compatible = "regulator-fixed";
++		regulator-name = "codec-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 15 0>;
++
++		/* delay - CHECK */
++		startup-delay-us = <70000>;
++		enable-active-high;
++	};
++
++	amp_en_reg: regulator@7 {
++		compatible = "regulator-fixed";
++		regulator-name = "amp-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_74 0 0>;
++
++		startup-delay-us = <0>;
++		enable-active-high;
++	};
++
++	/delete-node/regulator@8;
++
++	sdio_switch: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "wifi_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_74 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	/delete-node/regulator@10;
++
++	radio_switch: regulator@11 {
++		compatible = "regulator-fixed";
++		regulator-name = "radio_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	kim {
++		compatible = "kim";
++		nshutdown_gpio = <343>;  /* gpio_ext_74 pin 3 */
++		/* serial1 */
++		dev_name = "/dev/ttySC1";
++		flow_cntrl = <1>;
++		/* int div 8 hscif@26.6666656MHz */
++		baud_rate = <3333332>;
++	};
++
++	hdmi-out {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi_con: endpoint {
++				remote-endpoint = <&adv7513_out>;
++			};
++		};
++	};
++};
++
++&pfc {
++	/delete-node/hscif4;
++
++	scif1_pins: scif1 {
++		groups = "scif1_data_b";
++		function = "scif1";
++	};
++
++	hscif0_pins: hscif0 {
++		groups = "hscif0_data", "hscif0_ctrl";
++		function = "hscif0";
++	};
++
++	hscif1_pins: hscif1 {
++		groups = "hscif1_data_a", "hscif1_ctrl_a";
++		function = "hscif1";
++	};
++
++	du_pins: du {
++		groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++		function = "du";
++	};
++};
++
++&du {
++	pinctrl-0 = <&du_pins>;
++	pinctrl-names = "default";
++
++	ports {
++		port@0 {
++			endpoint {
++				remote-endpoint = <&adv7513_in>;
++			};
++		};
++		port@1 {
++			endpoint {
++				remote-endpoint = <&rcar_dw_hdmi0_in>;
++			};
++		};
++	};
++};
++
++&gpio0 {
++	/delete-node/video_a_irq;
++	/delete-node/video_b_irq;
++	/delete-node/gpioext_2_20_irq;
++};
++
++&gpio1 {
++	/delete-node/gpioext_2_21_irq;
++	/delete-node/wifi_irq;
++};
++
++&gpio2 {
++	bl_pwm {
++		gpio-hog;
++		gpios = <3 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "BL PWM 100%";
++	};
++};
++
++&gpio5 {
++	/delete-node/touch_irq;
++	/delete-node/bt_strap;
++
++	/* V1 has h/w bug with swapped RTS and CTS on BT interface */
++	/* Ignore these pins */
++	hscif0_cts {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "hscif0 CTS";
++	};
++
++	hscif0_rts {
++		gpio-hog;
++		gpios = <16 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "hscif0 RTS";
++	};
++};
++
++&gpio7 {
++	/delete-node/gpioext_2_21_irq;
++};
++
++&scif1 {
++	pinctrl-0 = <&scif1_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hscif0 {
++	pinctrl-0 = <&hscif0_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&hscif1 {
++	pinctrl-0 = <&hscif1_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hscif4 {
++	/delete-property/pinctrl-0;
++	/delete-property/pinctrl-names;
++
++	status = "disabled";
++};
++
++&i2c2 {
++	/delete-node/pca9535@20;
++	/delete-node/pca9535@21;
++
++	gpio_ext_74: pca9539@74 {
++		compatible = "nxp,pca9539";
++		reg = <0x74>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio6>;
++		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++		hub_pwen {
++			gpio-hog;
++			gpios = <6 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "HUB pwen";
++		};
++		hub_rst {
++			gpio-hog;
++			gpios = <7 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "HUB rst";
++		};
++		otg_offvbus {
++			gpio-hog;
++			gpios = <8 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "OTG off VBUSn";
++		};
++		otg_extlpn {
++			gpio-hog;
++			gpios = <9 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "OTG EXTLPn";
++		};
++		otg_stat1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "OTG Stat1";
++		};
++		otg_stat2 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "OTG Stat2";
++		};
++	};
++
++	gpio_ext_75: pca9539@75 {
++		compatible = "nxp,pca9539";
++		reg = <0x75>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio6>;
++		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++		gps_rst {
++			gpio-hog;
++			gpios = <6 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "GPS rst";
++		};
++		fpdl_shdn {
++			gpio-hog;
++			gpios = <9 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "FPDLink shdn";
++		};
++	};
++};
++
++&i2cswitch2 {
++	reg = <0x71>;
++	reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
++
++	i2c@4 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <4>;
++
++		hdmi@3d {
++			compatible = "adi,adv7511w";
++			reg = <0x3d>;
++			interrupt-parent = <&gpio2>;
++			interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++			pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++			adi,input-depth = <8>;
++			adi,input-colorspace = "rgb";
++			adi,input-clock = "1x";
++			adi,input-style = <1>;
++			adi,input-justification = "evenly";
++			adi,clock-delay = <1200>;
++
++			ports {
++				#address-cells = <1>;
++				#size-cells = <0>;
++
++				port@0 {
++					reg = <0>;
++					adv7513_in: endpoint {
++						remote-endpoint = <&du_out_rgb>;
++					};
++				};
++
++				port@1 {
++					reg = <1>;
++					adv7513_out: endpoint {
++						remote-endpoint = <&hdmi_con>;
++					};
++				};
++			};
++		};
++	};
++};
++
++&i2c4 {
++	/delete-node/pca9535@21;
++
++	gpio_ext_76: pca9539@76 {
++		compatible = "nxp,pca9539";
++		reg = <0x76>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio7>;
++		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++		port_b_a0 {
++			gpio-hog;
++			gpios = <0 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "Video-B A0";
++		};
++		port_b_a1 {
++			gpio-hog;
++			gpios = <1 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "Video-B A1";
++		};
++		port_a_a0 {
++			gpio-hog;
++			gpios = <2 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "Video-A A0";
++		};
++		port_a_a1 {
++			gpio-hog;
++			gpios = <3 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "Video-A A1";
++		};
++		/* pin 12 - CAM_CLK */
++		rpi_cam_io_1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO1";
++		};
++		/* pin 11 - CAM_GPIO - assume pwdn */
++		rpi_cam_io_0 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO0";
++		};
++		/* 0 - FPDLink output, 1 - LVDS output */
++		lvds_vs_fpdl {
++			gpio-hog;
++			gpios = <14 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "LVDS switch";
++		};
++	};
++
++	gpio_ext_77: pca9539@77 {
++		compatible = "nxp,pca9539";
++		reg = <0x77>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio5>;
++		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++		mpcie_wake {
++			gpio-hog;
++			gpios = <0 GPIO_ACTIVE_HIGH>;
++			output-low;
++			line-name = "mPCIe WAKE#";
++		};
++		mpcie_wdisable {
++			gpio-hog;
++			gpios = <1 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "mPCIe W_DISABLE";
++		};
++		mpcie_clreq {
++			gpio-hog;
++			gpios = <2 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "mPCIe CLKREQ#";
++		};
++		mpcie_ovc {
++			gpio-hog;
++			gpios = <3 GPIO_ACTIVE_HIGH>;
++			input;
++			line-name = "mPCIe OVC";
++		};
++	};
++};
++
++&i2cswitch4 {
++	reg = <0x71>;
++	reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++};
++
++&wlcore {
++	interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+new file mode 100644
+index 0000000..39eab1f
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+@@ -0,0 +1,1238 @@
++/*
++ * Device Tree Source for the M3ULCB Kingfisher board on r8a7796
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7796-m3ulcb.dts"
++
++/ {
++	model = "Renesas M3ULCB Kingfisher board based on r8a7796";
++
++	aliases {
++		serial1 = &hscif4;
++	};
++
++	snd_clk: snd_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <24576000>;
++		clock-output-names = "scki";
++	};
++
++	wlan_en: regulator@4 {
++		compatible = "regulator-fixed";
++		regulator-name = "wlan-en-regulator";
++
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	vcc_sdhi3: regulator@41 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 Vcc";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++	};
++
++	vccq_sdhi3: regulator@5 {
++		compatible = "regulator-fixed";
++
++		regulator-name = "SDHI3 VccQ";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	codec_en_reg: regulator@6 {
++		compatible = "regulator-fixed";
++		regulator-name = "codec-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 15 0>;
++
++		/* delay - CHECK */
++		startup-delay-us = <70000>;
++		enable-active-high;
++	};
++
++	amp_en_reg: regulator@7 {
++		compatible = "regulator-fixed";
++		regulator-name = "amp-en-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++
++		gpio = <&gpio_ext_20 0 0>;
++
++		startup-delay-us = <0>;
++		enable-active-high;
++	};
++
++	lvds_switch: regulator@8 {
++		compatible = "regulator-fixed";
++		regulator-name = "lvds_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio1 24 0>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	sdio_switch: regulator@9 {
++		compatible = "regulator-fixed";
++		regulator-name = "wifi_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_20 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	sound_switch: regulator@10 {
++		compatible = "regulator-fixed";
++		regulator-name = "pcm3168a_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_21 5 0>;
++		enable-active-low;
++		regulator-always-on;
++	};
++
++	radio_switch: regulator@11 {
++		compatible = "regulator-fixed";
++		regulator-name = "radio_on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
++	kim {
++		compatible = "kim";
++		nshutdown_gpio = <343>;  /* pca9535@i2c2.0x20 pin 3 */
++		/* serial1 */
++		dev_name = "/dev/ttySC1";
++		flow_cntrl = <1>;
++		/* int div 8 hscif@26.6666656MHz */
++		baud_rate = <3333332>;
++	};
++
++	btwilink {
++		compatible = "btwilink";
++	};
++
++	sound_ext: sound@0 {
++		pinctrl-0 = <&sound_0_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "pcm3168a";
++
++		simple-audio-card,bitclock-master = <&sound_ext_master>;
++		simple-audio-card,frame-master = <&sound_ext_master>;
++		sound_ext_master: simple-audio-card,cpu@0 {
++			sound-dai = <&rcar_sound 0>;
++			dai-tdm-slot-num = <8>;
++			dai-tdm-slot-width = <32>;
++		};
++
++		simple-audio-card,codec@0 {
++			sound-dai = <&pcm3168a>;
++			dai-tdm-slot-num = <8>;
++			dai-tdm-slot-width = <32>;
++			system-clock-frequency = <24576000>;
++		};
++	};
++
++	/delete-node/sound;
++
++	rsnd_ak4613: sound@1 {
++		pinctrl-0 = <&sound_1_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "left_j";
++		simple-audio-card,name = "ak4613";
++
++		simple-audio-card,bitclock-master = <&sndcpu>;
++		simple-audio-card,frame-master = <&sndcpu>;
++
++		sndcpu: simple-audio-card,cpu@1 {
++			sound-dai = <&rcar_sound 1>;
++		};
++
++		sndcodec: simple-audio-card,codec@1 {
++			sound-dai = <&ak4613>;
++		};
++	};
++
++	sound_radio: sound@2 {
++		pinctrl-0 = <&sound_2_pins>;
++		pinctrl-names = "default";
++		compatible = "simple-audio-card";
++
++		simple-audio-card,format = "i2s";
++		simple-audio-card,name = "radio";
++
++		simple-audio-card,bitclock-master = <&sound_radio_master>;
++		simple-audio-card,frame-master = <&sound_radio_master>;
++		simple-audio-card,cpu@2 {
++			sound-dai = <&rcar_sound 2>;
++		};
++
++		sound_radio_master: simple-audio-card,codec@2 {
++			sound-dai = <&radio>;
++			system-clock-frequency = <12288000>;
++		};
++	};
++
++	lvds-encoder {
++		compatible = "thine,thc63lvdm83d";
++
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			port@0 {
++				reg = <0>;
++				lvds_enc_in: endpoint {
++					remote-endpoint = <&du_out_lvds0>;
++				};
++			};
++			port@1 {
++				reg = <1>;
++				lvds_enc_out: endpoint {
++					remote-endpoint = <&lvds_in>;
++				};
++			};
++		};
++	};
++
++	lvds {
++		compatible = "lvds-connector";
++
++		width-mm = <210>;
++		height-mm = <158>;
++
++		panel-timing {
++			/* 1280x800 @60Hz */
++			clock-frequency = <65000000>;
++			hactive = <1280>;
++			vactive = <800>;
++			hsync-len = <40>;
++			hfront-porch = <80>;
++			hback-porch = <40>;
++			vfront-porch = <14>;
++			vback-porch = <14>;
++			vsync-len = <4>;
++		};
++
++		port {
++			lvds_in: endpoint {
++				remote-endpoint = <&lvds_enc_out>;
++			};
++		};
++	};
++
++	radio: si468x@0 {
++		compatible = "si,si468x-pcm";
++		status = "okay";
++
++		#sound-dai-cells = <0>;
++	};
++};
++
++&pfc {
++	hscif4_pins: hscif4 {
++		groups = "hscif4_data_a", "hscif4_ctrl";
++		function = "hscif4";
++	};
++
++	sdhi3_pins_3v3: sd3_3v3 {
++		groups = "sdhi3_data4", "sdhi3_ctrl";
++		function = "sdhi3";
++		power-source = <3300>;
++	};
++
++	sound_0_pins: sound0 {
++		groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++		function = "ssi";
++	};
++
++	sound_1_pins: sound1 {
++		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++		function = "ssi";
++	};
++
++	sound_2_pins: sound2 {
++		groups = "ssi6_ctrl", "ssi6_data";
++		function = "ssi";
++	};
++
++	usb0_pins: usb0 {
++		groups = "usb0";
++		function = "usb0";
++	};
++
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++
++	canfd0_pins: canfd0 {
++		groups = "canfd0_data_a";
++		function = "canfd0";
++	};
++
++	canfd1_pins: canfd1 {
++		groups = "canfd1_data";
++		function = "canfd1";
++	};
++};
++
++&gpio0 {
++	video_a_irq {
++		gpio-hog;
++		gpios = <13 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-A irq";
++	};
++
++	video_b_irq {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "Video-B irq";
++	};
++
++	gpioext_2_20_irq {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x20@i2c2 irq";
++	};
++};
++
++&gpio1 {
++	gpioext_2_21_irq {
++		gpio-hog;
++		gpios = <15 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x21@i2c2 irq";
++	};
++
++	wifi_irq {
++		gpio-hog;
++		gpios = <25 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "wifi irq";
++	};
++};
++
++&gpio5 {
++	touch_irq {
++		gpio-hog;
++		gpios = <6 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "touch irq";
++	};
++
++	/* From TI forum */
++	/* BT_AUD_OUT should be pulled low when WL_EN is activated. */
++	/* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
++	bt_strap {
++		gpio-hog;
++		gpios = <14 GPIO_ACTIVE_HIGH>;
++		output-low;
++		line-name = "BT strap pin";
++	};
++};
++
++&gpio7 {
++	gpioext_2_21_irq {
++		gpio-hog;
++		gpios = <3 GPIO_ACTIVE_HIGH>;
++		input;
++		line-name = "0x21@i2c4 irq";
++	};
++};
++
++&hscif4 {
++	pinctrl-0 = <&hscif4_pins>;
++	pinctrl-names = "default";
++	ctsrts;
++
++	status = "okay";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++
++	gpio_ext_20: pca9535@20 {
++		compatible = "nxp,pca9535";
++		reg = <0x20>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio0>;
++		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++	};
++
++	gpio_ext_21: pca9535@21 {
++		compatible = "nxp,pca9535";
++		reg = <0x21>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio1>;
++		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++	};
++
++	i2cswitch2: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* BCM node(s) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* USB3.0 HUB node(s) */
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			/* Power amp node(s) */
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* Radio node(s) */
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			/* A2B node(s) */
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* PCIe node(s) */
++		};
++
++		i2c@6 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <6>;
++			/* LVDS display node(s) */
++
++			polytouch: edt-ft5x06@38 {
++				compatible = "edt,edt-ft5x06";
++				reg = <0x38>;
++				interrupt-parent = <&gpio5>;
++				interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
++			};
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Audio, GPS and Gyro node(s) */
++
++			pcm3168a: audio-codec@44 {
++				#sound-dai-cells = <0>;
++				compatible = "ti,pcm3168a";
++				reg = <0x44>;
++				clocks = <&snd_clk>;
++				clock-names = "scki";
++				tdm;
++				VDD1-supply = <&codec_en_reg>;
++				VDD2-supply = <&codec_en_reg>;
++				VCCAD1-supply = <&codec_en_reg>;
++				VCCAD2-supply = <&codec_en_reg>;
++				VCCDA1-supply = <&amp_en_reg>;
++				VCCDA2-supply = <&amp_en_reg>;
++			};
++
++			lsm9ds0_acc_mag@1d {
++				compatible = "st,lsm9ds0_acc_mag";
++				reg = <0x1d>;
++			};
++
++			lsm9ds0_gyr@6b {
++				compatible = "st,lsm9ds0-gyro";
++				reg = <0x6b>;
++			};
++
++			/* GPS@ 0x42 */
++		};
++	};
++};
++
++&i2c4 {
++	gpio_ext_22: pca9535@21 {
++		compatible = "nxp,pca9535";
++		reg = <0x22>;
++		gpio-controller;
++		#gpio-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&gpio7>;
++		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++		/* pin 12 - CAM_CLK */
++		rpi_cam_io_1 {
++			gpio-hog;
++			gpios = <10 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO1";
++		};
++		/* pin 11 - CAM_GPIO - assume pwdn */
++		rpi_cam_io_0 {
++			gpio-hog;
++			gpios = <11 GPIO_ACTIVE_HIGH>;
++			output-high;
++			line-name = "RaspB_IO0";
++		};
++	};
++
++	i2cswitch4: pca9548@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++		reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			/* SAM node(s) */
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			/* Slot A (CN10) */
++
++			ov106xx@0 {
++				compatible = "ovti,ov106xx";
++				reg = <0x60>;
++
++				port@0 {
++					ov106xx_in0: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin0ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep0: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep0>;
++					};
++					ov106xx_ti964_des0ep0: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep0>;
++					};
++					ov106xx_ti954_des0ep0: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep0>;
++					};
++				};
++			};
++
++			ov106xx@1 {
++				compatible = "ovti,ov106xx";
++				reg = <0x61>;
++
++				port@0 {
++					ov106xx_in1: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin1ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep1: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep1>;
++					};
++					ov106xx_ti964_des0ep1: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep1>;
++					};
++					ov106xx_ti954_des0ep1: endpoint@2 {
++						remote-endpoint = <&ti954_des0ep1>;
++					};
++				};
++			};
++
++			ov106xx@2 {
++				compatible = "ovti,ov106xx";
++				reg = <0x62>;
++
++				port@0 {
++					ov106xx_in2: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin2ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep2: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep2>;
++					};
++					ov106xx_ti964_des0ep2: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep2>;
++					};
++				};
++			};
++
++			ov106xx@3 {
++				compatible = "ovti,ov106xx";
++				reg = <0x63>;
++
++				port@0 {
++					ov106xx_in3: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2 3 4>;
++						remote-endpoint = <&vin3ep0>;
++					};
++				};
++				port@1 {
++					ov106xx_max9286_des0ep3: endpoint@0 {
++						remote-endpoint = <&max9286_des0ep3>;
++					};
++					ov106xx_ti964_des0ep3: endpoint@1 {
++						remote-endpoint = <&ti964_des0ep3>;
++					};
++				};
++			};
++
++			/* DS90UB964 @ 0x3a */
++			ti964-ti9x3@0 {
++				compatible = "ti,ti964-ti9x3";
++				reg = <0x3a>;
++				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <4>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti964_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti964_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					ti964_des0ep2: endpoint@2 {
++						ti9x3-addr = <0x0e>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					ti964_des0ep3: endpoint@3 {
++						ti9x3-addr = <0x0f>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					ti964_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* DS90UB954 @ 0x38 */
++			ti954-ti9x3@0 {
++				compatible = "ti,ti954-ti9x3";
++				reg = <0x38>;
++				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
++				ti,sensor_delay = <350>;
++				ti,links = <2>;
++				ti,lanes = <4>;
++				ti,forwarding-mode = "round-robin";
++				ti,cable-mode = "coax";
++
++				port@0 {
++					ti954_des0ep0: endpoint@0 {
++						ti9x3-addr = <0x0c>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					ti954_des0ep1: endpoint@1 {
++						ti9x3-addr = <0x0d>;
++						dvp-order = <0>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++				};
++				port@1 {
++					ti954_csi0ep0: endpoint {
++						csi-rate = <1450>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++
++			/* MAX9286 @ 0x2a */
++			max9286-max9271@0 {
++				compatible = "maxim,max9286-max9271";
++				reg = <0x2a>;
++				maxim,sensor_delay = <350>;
++				maxim,links = <4>;
++				maxim,lanes = <4>;
++				maxim,resetb-gpio = <1>;
++				maxim,fsync-mode = "automatic";
++				maxim,timeout = <100>;
++
++				port@0 {
++					max9286_des0ep0: endpoint@0 {
++						max9271-addr = <0x50>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in0>;
++					};
++					max9286_des0ep1: endpoint@1 {
++						max9271-addr = <0x51>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in1>;
++					};
++					max9286_des0ep2: endpoint@2 {
++						max9271-addr = <0x52>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in2>;
++					};
++					max9286_des0ep3: endpoint@3 {
++						max9271-addr = <0x53>;
++						dvp-order = <1>;
++						remote-endpoint = <&ov106xx_in3>;
++					};
++				};
++				port@1 {
++					max9286_csi0ep0: endpoint {
++						csi-rate = <700>;
++						remote-endpoint = <&csi2_40_ep>;
++					};
++				};
++			};
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			/* MOST node(s) */
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++
++			rpi_camera: ov5647@36 {
++				compatible = "ovti,ov5647";
++				reg = <0x36>;
++
++				port@0 {
++					rpi_camera_in: endpoint {
++						clock-lanes = <0>;
++						data-lanes = <1 2>;
++						remote-endpoint = <&vin4ep0>;
++					};
++				};
++			};
++		};
++
++		i2c@5 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <5>;
++			/* CMOS camera node(s) */
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			/* Slot A (CN10) */
++
++			video_a_ext0: pca9535@26 {
++				compatible = "nxp,pca9535";
++				reg = <0x26>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <5 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <3 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <12 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <13 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr2 {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR2";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <15 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++				video_a_des_shdn {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A DES_SHDN";
++				};
++				video_a_des_led {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A led";
++				};
++			};
++
++			video_a_ext1: max7325@5c {
++				compatible = "maxim,max7325";
++				reg = <0x5c>;
++				gpio-controller;
++				#gpio-cells = <2>;
++
++				video_a_des_cfg2 {
++					gpio-hog;
++					gpios = <4 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg2";
++				};
++				video_a_des_cfg1 {
++					gpio-hog;
++					gpios = <6 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg1";
++				};
++				video_a_des_cfg0 {
++					gpio-hog;
++					gpios = <7 GPIO_ACTIVE_HIGH>;
++					output-low;
++					line-name = "Video-A cfg0";
++				};
++				video_a_pwr_shdn {
++					gpio-hog;
++					gpios = <14 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR_SHDN";
++				};
++				video_a_cam_pwr0 {
++					gpio-hog;
++					gpios = <8 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR0";
++				};
++				video_a_cam_pwr1 {
++					gpio-hog;
++					gpios = <9 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR1";
++				};
++				video_a_cam_pwr3 {
++					gpio-hog;
++					gpios = <11 GPIO_ACTIVE_HIGH>;
++					output-high;
++					line-name = "Video-A PWR3";
++				};
++			};
++		};
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec0 {
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++			vin0_ti964_des0ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep0>;
++			};
++			vin0_ti954_des0ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++			vin1_ti964_des0ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep1>;
++			};
++			vin1_ti954_des0ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++			vin2_ti964_des0ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++			vin3_ti964_des0ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi20";
++				virtual,channel = <0>;
++				remote-endpoint = <&rpi_camera_in>;
++				data-lanes = <1 2>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_20_ep>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&csi2_20 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "raw8";
++			receive,vc = <0>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_20_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2>;
++			csi-rate = <280>;
++		};
++	};
++};
++
++&rcar_sound {
++	pinctrl-0 = <&sound_clk_pins>;
++
++	/* Multi DAI */
++	#sound-dai-cells = <1>;
++
++	rcar_sound,dai {
++		dai0 {
++			playback = <&ssi7>;
++			capture  = <&ssi8>;
++		};
++
++		dai1 {
++			playback = <&ssi0 &src0 &dvc0>;
++			capture  = <&ssi1 &src1 &dvc1>;
++		};
++
++		dai2 {
++			capture  = <&ssi6>;
++		};
++	};
++};
++
++&sdhi3 {
++	pinctrl-0 = <&sdhi3_pins_3v3>;
++	pinctrl-names = "default";
++
++	vmmc-supply = <&wlan_en>;
++	vqmmc-supply = <&vccq_sdhi3>;
++	keep-power-in-suspend;
++	enable-sdio-wakeup;
++	bus-width = <4>;
++	no-1-8-v;
++	non-removable;
++	cap-power-off-card;
++	max-frequency = <26000000>;
++	status = "okay";
++
++	#address-cells = <1>;
++	#size-cells = <0>;
++	wlcore: wlcore@2 {
++		compatible = "ti,wl1837";
++		reg = <2>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++	};
++};
++
++&usb2_phy0 {
++	pinctrl-0 = <&usb0_pins>;
++	pinctrl-names = "default";
++
++	status = "okay";
++};
++
++&hsusb {
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&xhci0 {
++	status = "okay";
++};
++
++&msiof1 {
++	status = "disabled";
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++
++	renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++
++	channel0 {
++		status = "okay";
++	};
++
++	channel1 {
++		status = "okay";
++	};
++};
++
++/* uncomment to enable CN47: SD on SDHI3 */
++//#include "ulcb-kf-sd3.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts
+new file mode 100644
+index 0000000..1ac0041
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts
+@@ -0,0 +1,287 @@
++/*
++ * Device Tree Source for the M3ULCB.View board on r8a7796
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7796-m3ulcb.dts"
++
++/ {
++	model = "Renesas M3ULCB.View board based on r8a7796";
++};
++
++&i2c4 {
++	ov106xx@0 {
++		compatible = "ovti,ov106xx";
++		reg = <0x60>;
++
++		port@0 {
++			ov106xx_in0: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin0ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++
++	ov106xx@1 {
++		compatible = "ovti,ov106xx";
++		reg = <0x61>;
++
++		port@0 {
++			ov106xx_in1: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin1ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++
++	ov106xx@2 {
++		compatible = "ovti,ov106xx";
++		reg = <0x62>;
++
++		port@0 {
++			ov106xx_in2: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin2ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++
++	ov106xx@3 {
++		compatible = "ovti,ov106xx";
++		reg = <0x63>;
++
++		port@0 {
++			ov106xx_in3: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin3ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des0ep3: endpoint {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++
++	max9286-max9271@0 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x4c>;
++		gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++		maxim,i2c-quirk = <0x6c>;
++
++		port@0 {
++			max9286_des0ep0: endpoint@0 {
++				max9271-addr = <0x50>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++			max9286_des0ep1: endpoint@1 {
++				max9271-addr = <0x51>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++			max9286_des0ep2: endpoint@2 {
++				max9271-addr = <0x52>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++			max9286_des0ep3: endpoint@3 {
++				max9271-addr = <0x53>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			max9286_csi0ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++	};
++};
++
++&pcie_bus_clk {
++	clock-frequency = <100000000>;
++	status = "okay";
++};
++
++&pciec1 {
++	status = "okay";
++};
++
++&vin0 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	status = "okay";
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++};
++
++&csi2_40 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
+new file mode 100644
+index 0000000..cc6866c
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
+@@ -0,0 +1,318 @@
++/*
++ * Device Tree Source for the Salvator-X.View board
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2016-2017 Cogent Embedded, Inc
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7796-salvator-x.dts"
++
++/ {
++	model = "Renesas Salvator-X.View board based on r8a7796";
++};
++
++&pfc {
++	can0_pins: can0 {
++		groups = "can0_data_a";
++		function = "can0";
++	};
++
++	can1_pins: can1 {
++		groups = "can1_data";
++		function = "can1";
++	};
++};
++
++&i2c4 {
++	/delete-node/hdmi-in@34;
++	/delete-node/composite-in@70;
++
++	ov106xx@0 {
++		compatible = "ovti,ov106xx";
++		reg = <0x60>;
++
++		port@0 {
++			ov106xx_in0: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin0ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++
++	ov106xx@1 {
++		compatible = "ovti,ov106xx";
++		reg = <0x61>;
++
++		port@0 {
++			ov106xx_in1: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin1ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++
++	ov106xx@2 {
++		compatible = "ovti,ov106xx";
++		reg = <0x62>;
++
++		port@0 {
++			ov106xx_in2: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin2ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++
++	ov106xx@3 {
++		compatible = "ovti,ov106xx";
++		reg = <0x63>;
++
++		port@0 {
++			ov106xx_in3: endpoint {
++				clock-lanes = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&vin3ep0>;
++			};
++		};
++		port@1 {
++			ov106xx_des0ep3: endpoint {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++
++	max9286-max9271@0 {
++		compatible = "maxim,max9286-max9271";
++		reg = <0x4c>;
++		gpios = <&gpio6 30 GPIO_ACTIVE_LOW>;
++		maxim,sensor_delay = <0>;
++		maxim,links = <4>;
++		maxim,lanes = <4>;
++		maxim,resetb-gpio = <1>;
++		maxim,fsync-mode = "automatic";
++		maxim,timeout = <100>;
++		maxim,i2c-quirk = <0x6c>;
++
++		port@0 {
++			max9286_des0ep0: endpoint@0 {
++				max9271-addr = <0x50>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++			max9286_des0ep1: endpoint@1 {
++				max9271-addr = <0x51>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++			max9286_des0ep2: endpoint@2 {
++				max9271-addr = <0x52>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++			max9286_des0ep3: endpoint@3 {
++				max9271-addr = <0x53>;
++				dvp-order = <1>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			max9286_csi0ep0: endpoint {
++				csi-rate = <700>;
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++	};
++};
++
++&vin0 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin0ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <0>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in0>;
++			};
++		};
++		port@1 {
++			csi0ep0: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin0_max9286_des0ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep0>;
++			};
++		};
++	};
++};
++
++&vin1 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin1ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <1>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in1>;
++			};
++		};
++		port@1 {
++			csi0ep1: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin1_max9286_des0ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep1>;
++			};
++		};
++	};
++};
++
++&vin2 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin2ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <2>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in2>;
++			};
++		};
++		port@1 {
++			csi0ep2: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin2_max9286_des0ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep2>;
++			};
++		};
++	};
++};
++
++&vin3 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin3ep0: endpoint {
++				csi,select = "csi40";
++				virtual,channel = <3>;
++				data-lanes = <1 2 3 4>;
++				remote-endpoint = <&ov106xx_in3>;
++			};
++		};
++		port@1 {
++			csi0ep3: endpoint {
++				remote-endpoint = <&csi2_40_ep>;
++			};
++		};
++		port@2 {
++			vin3_max9286_des0ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des0ep3>;
++			};
++		};
++	};
++};
++
++&vin4 {
++	status = "disabled";
++};
++
++&vin5 {
++	status = "disabled";
++};
++
++&vin6 {
++	status = "disabled";
++};
++
++&vin7 {
++	status = "disabled";
++};
++
++&csi2_20 {
++	status = "disabled";
++	/delete-node/ports;
++};
++
++&csi2_40 {
++	/delete-node/ports;
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_40_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2 3 4>;
++			csi-rate = <300>;
++		};
++	};
++};
++
++&can0 {
++	pinctrl-0 = <&can0_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&can1 {
++	pinctrl-0 = <&can1_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
+new file mode 100644
+index 0000000..d3b4ece
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
+@@ -0,0 +1,75 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board:
++ * this adding conflicting resource on VIN4 for Raspberry Pi camera
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++&i2cswitch4 {
++	i2c@4 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <4>;
++
++		rpi_camera: ov5647@36 {
++			compatible = "ovti,ov5647";
++			reg = <0x36>;
++
++			port@0 {
++				rpi_camera_in: endpoint {
++					clock-lanes = <0>;
++					data-lanes = <1 2>;
++					remote-endpoint = <&vin4ep0>;
++				};
++			};
++		};
++	};
++};
++
++&vin4 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi20";
++				virtual,channel = <0>;
++				remote-endpoint = <&rpi_camera_in>;
++				data-lanes = <1 2>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_20_ep>;
++			};
++		};
++	};
++};
++
++&csi2_20 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "raw8";
++			receive,vc = <0>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_20_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2>;
++			csi-rate = <280>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
+new file mode 100644
+index 0000000..ef481d3
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
+@@ -0,0 +1,33 @@
++/*
++ * Device Tree Source for the H3/M3ULCB Kingfisher board:
++ *  this overrides WIFI in favour SD on SDHI3
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++&sdio_switch {
++	regulator-name = "sd_on";
++	enable-active-high;
++};
++
++&sdhi3 {
++	/delete-property/non-removable;
++	/delete-property/cap-power-off-card;
++	/delete-property/keep-power-in-suspend;
++	/delete-property/enable-sdio-wakeup;
++	/delete-property/sd-uhs-sdr104;
++
++	vmmc-supply = <&vcc_sdhi3>;
++	max-frequency = <46000000>;
++	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
++	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
++};
++
++&wlcore {
++	status = "disabled";
++};
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
+new file mode 100644
+index 0000000..92ed4a4
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
+@@ -0,0 +1,515 @@
++/*
++ * Device Tree Source for the H3ULCB Videobox board:
++ *  this adding conflicting resource on VIN4/VIN5/VIN6/VIN7 for CN12
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2.  This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++&i2cswitch2 {
++	i2c@3 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <3>;
++		/* Slot C (CN12) */
++
++		ov106xx@8 {
++			compatible = "ovti,ov106xx";
++			reg = <0x68>;
++
++			port@0 {
++				ov106xx_in8: endpoint {
++					clock-lanes = <0>;
++					data-lanes = <1 2>;
++					remote-endpoint = <&vin4ep0>;
++				};
++			};
++			port@1 {
++				ov106xx_max9286_des2ep0: endpoint@0 {
++					remote-endpoint = <&max9286_des2ep0>;
++				};
++				ov106xx_ti964_des2ep0: endpoint@1 {
++					remote-endpoint = <&ti964_des2ep0>;
++				};
++				ov106xx_ti954_des2ep0: endpoint@2 {
++					remote-endpoint = <&ti954_des2ep0>;
++				};
++			};
++		};
++
++		ov106xx@9 {
++			compatible = "ovti,ov106xx";
++			reg = <0x69>;
++
++			port@0 {
++				ov106xx_in9: endpoint {
++					clock-lanes = <0>;
++					data-lanes = <1 2>;
++					remote-endpoint = <&vin5ep0>;
++				};
++			};
++			port@1 {
++				ov106xx_max9286_des2ep1: endpoint@0 {
++					remote-endpoint = <&max9286_des2ep1>;
++				};
++				ov106xx_ti964_des2ep1: endpoint@1 {
++					remote-endpoint = <&ti964_des2ep1>;
++				};
++				ov106xx_ti954_des2ep1: endpoint@2 {
++					remote-endpoint = <&ti954_des2ep1>;
++				};
++			};
++		};
++
++		ov106xx@10 {
++			compatible = "ovti,ov106xx";
++			reg = <0x6a>;
++
++			port@0 {
++				ov106xx_in10: endpoint {
++					clock-lanes = <0>;
++					data-lanes = <1 2>;
++					remote-endpoint = <&vin6ep0>;
++				};
++			};
++			port@1 {
++				ov106xx_max9286_des2ep2: endpoint@0 {
++					remote-endpoint = <&max9286_des2ep2>;
++				};
++				ov106xx_ti964_des2ep2: endpoint@1 {
++					remote-endpoint = <&ti964_des2ep2>;
++				};
++			};
++		};
++
++		ov106xx@11 {
++			compatible = "ovti,ov106xx";
++			reg = <0x6b>;
++
++			port@0 {
++				ov106xx_in11: endpoint {
++					clock-lanes = <0>;
++					data-lanes = <1 2>;
++					remote-endpoint = <&vin7ep0>;
++				};
++			};
++			port@1 {
++				ov106xx_max9286_des2ep3: endpoint@0 {
++					remote-endpoint = <&max9286_des2ep3>;
++				};
++				ov106xx_ti964_des2ep3: endpoint@1 {
++					remote-endpoint = <&ti964_des2ep3>;
++				};
++			};
++		};
++
++		/* DS90UB964 @ 0x3a */
++		ti964-ti9x3@2 {
++			compatible = "ti,ti964-ti9x3";
++			reg = <0x3a>;
++			ti,sensor_delay = <350>;
++			ti,links = <4>;
++			ti,lanes = <2>;
++			ti,forwarding-mode = "round-robin";
++			ti,cable-mode = "coax";
++
++			port@0 {
++				ti964_des2ep0: endpoint@0 {
++					ti9x3-addr = <0x0c>;
++					dvp-order = <0>;
++					remote-endpoint = <&ov106xx_in8>;
++				};
++				ti964_des2ep1: endpoint@1 {
++					ti9x3-addr = <0x0d>;
++					dvp-order = <0>;
++					remote-endpoint = <&ov106xx_in9>;
++				};
++				ti964_des2ep2: endpoint@2 {
++					ti9x3-addr = <0x0e>;
++					dvp-order = <0>;
++					remote-endpoint = <&ov106xx_in10>;
++				};
++				ti964_des2ep3: endpoint@3 {
++					ti9x3-addr = <0x0f>;
++					dvp-order = <0>;
++					remote-endpoint = <&ov106xx_in11>;
++				};
++			};
++			port@1 {
++				ti964_csi1ep0: endpoint {
++					csi-rate = <1450>;
++					remote-endpoint = <&csi2_20_ep>;
++				};
++			};
++		};
++
++		/* DS90UB954 @ 0x38 */
++		ti954-ti9x3@2 {
++			compatible = "ti,ti954-ti9x3";
++			reg = <0x38>;
++			/* gpios = <&video_c_ext1 10 GPIO_ACTIVE_HIGH>; */
++			ti,sensor_delay = <350>;
++			ti,links = <2>;
++			ti,lanes = <2>;
++			ti,forwarding-mode = "round-robin";
++			ti,cable-mode = "coax";
++
++			port@0 {
++				ti954_des2ep0: endpoint@0 {
++					ti9x3-addr = <0x0c>;
++					dvp-order = <0>;
++					remote-endpoint = <&ov106xx_in8>;
++				};
++				ti954_des2ep1: endpoint@1 {
++					ti9x3-addr = <0x0d>;
++					dvp-order = <0>;
++					remote-endpoint = <&ov106xx_in9>;
++				};
++			};
++			port@1 {
++				ti954_csi1ep0: endpoint {
++					csi-rate = <1450>;
++					remote-endpoint = <&csi2_20_ep>;
++				};
++			};
++		};
++
++		/* MAX9286 @ 0x2c */
++		max9286-max9271@2 {
++			compatible = "maxim,max9286-max9271";
++			reg = <0x2c>;
++			maxim,sensor_delay = <350>;
++			maxim,links = <4>;
++			maxim,lanes = <2>;
++			maxim,resetb-gpio = <1>;
++			maxim,fsync-mode = "automatic";
++			maxim,timeout = <100>;
++
++			port@0 {
++				max9286_des2ep0: endpoint@0 {
++					max9271-addr = <0x50>;
++					dvp-order = <1>;
++					remote-endpoint = <&ov106xx_in8>;
++				};
++				max9286_des2ep1: endpoint@1 {
++					max9271-addr = <0x51>;
++					dvp-order = <1>;
++					remote-endpoint = <&ov106xx_in9>;
++				};
++				max9286_des2ep2: endpoint@2 {
++					max9271-addr = <0x52>;
++					dvp-order = <1>;
++					remote-endpoint = <&ov106xx_in10>;
++				};
++				max9286_des2ep3: endpoint@3 {
++					max9271-addr = <0x53>;
++					dvp-order = <1>;
++					remote-endpoint = <&ov106xx_in11>;
++				};
++			};
++			port@1 {
++				max9286_csi1ep0: endpoint {
++					csi-rate = <700>;
++					remote-endpoint = <&csi2_20_ep>;
++				};
++			};
++		};
++	};
++
++	i2c@4 {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <4>;
++		/* Slot C (CN12) */
++
++		video_c_ext0: pca9535@26 {
++			compatible = "nxp,pca9535";
++			reg = <0x26>;
++			gpio-controller;
++			#gpio-cells = <2>;
++
++			video_c_des_cfg1 {
++				gpio-hog;
++				gpios = <5 GPIO_ACTIVE_HIGH>;
++				input;
++				line-name = "Video-C cfg1";
++			};
++			video_c_des_cfg0 {
++				gpio-hog;
++				gpios = <6 GPIO_ACTIVE_HIGH>;
++				input;
++				line-name = "Video-C cfg0";
++			};
++			video_c_pwr_shdn {
++				gpio-hog;
++				gpios = <3 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR_SHDN";
++			};
++			video_c_cam_pwr0 {
++				gpio-hog;
++				gpios = <12 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR0";
++			};
++			video_c_cam_pwr1 {
++				gpio-hog;
++				gpios = <13 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR1";
++			};
++			video_c_cam_pwr2 {
++				gpio-hog;
++				gpios = <14 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR2";
++			};
++			video_c_cam_pwr3 {
++				gpio-hog;
++				gpios = <15 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR3";
++			};
++			video_c_des_shdn {
++				gpio-hog;
++				gpios = <4 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C DES_SHDN";
++			};
++			video_c_des_led {
++				gpio-hog;
++				gpios = <7 GPIO_ACTIVE_HIGH>;
++				output-low;
++				line-name = "Video-C led";
++			};
++		};
++
++		video_c_ext1: max7325@5c {
++			compatible = "maxim,max7325";
++			reg = <0x5c>;
++			gpio-controller;
++			#gpio-cells = <2>;
++
++			video_c_des_cfg2 {
++				gpio-hog;
++				gpios = <4 GPIO_ACTIVE_HIGH>;
++				input;
++				line-name = "Video-C cfg2";
++			};
++			video_c_des_cfg1 {
++				gpio-hog;
++				gpios = <6 GPIO_ACTIVE_HIGH>;
++				input;
++				line-name = "Video-C cfg1";
++			};
++			video_c_des_cfg0 {
++				gpio-hog;
++				gpios = <7 GPIO_ACTIVE_HIGH>;
++				input;
++				line-name = "Video-C cfg0";
++			};
++			video_c_pwr_shdn {
++				gpio-hog;
++				gpios = <14 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR_SHDN";
++			};
++			video_c_cam_pwr0 {
++				gpio-hog;
++				gpios = <8 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR0";
++			};
++			video_c_cam_pwr1 {
++				gpio-hog;
++				gpios = <9 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR1";
++			};
++			video_c_cam_pwr2 {
++				gpio-hog;
++				gpios = <10 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR2";
++			};
++			video_c_cam_pwr3 {
++				gpio-hog;
++				gpios = <11 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C PWR3";
++			};
++			video_c_des_shdn {
++				gpio-hog;
++				gpios = <13 GPIO_ACTIVE_HIGH>;
++				output-high;
++				line-name = "Video-C DES_SHDN";
++			};
++			video_c_led {
++				gpio-hog;
++				gpios = <12 GPIO_ACTIVE_HIGH>;
++				output-low;
++				line-name = "Video-C LED";
++			};
++		};
++	};
++};
++
++&vin4 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin4ep0: endpoint {
++				csi,select = "csi20";
++				virtual,channel = <0>;
++				remote-endpoint = <&ov106xx_in8>;
++				data-lanes = <1 2>;
++			};
++		};
++		port@1 {
++			csi2ep0: endpoint {
++				remote-endpoint = <&csi2_20_ep>;
++			};
++		};
++		port@2 {
++			vin4_max9286_des2ep0: endpoint@0 {
++				remote-endpoint = <&max9286_des2ep0>;
++			};
++			vin4_ti964_des2ep0: endpoint@1 {
++				remote-endpoint = <&ti964_des2ep0>;
++			};
++			vin4_ti954_des2ep0: endpoint@2 {
++				remote-endpoint = <&ti954_des2ep0>;
++			};
++		};
++	};
++};
++
++&vin5 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin5ep0: endpoint@0 {
++				csi,select = "csi20";
++				virtual,channel = <1>;
++				remote-endpoint = <&ov106xx_in9>;
++				data-lanes = <1 2>;
++			};
++		};
++		port@1 {
++			csi2ep1: endpoint {
++				remote-endpoint = <&csi2_20_ep>;
++			};
++		};
++		port@2 {
++			vin5_max9286_des2ep1: endpoint@0 {
++				remote-endpoint = <&max9286_des2ep1>;
++			};
++			vin5_ti964_des2ep1: endpoint@1 {
++				remote-endpoint = <&ti964_des2ep1>;
++			};
++			vin5_ti954_des2ep1: endpoint@2 {
++				remote-endpoint = <&ti954_des2ep1>;
++			};
++		};
++	};
++};
++
++&vin6 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin6ep0: endpoint@0 {
++				csi,select = "csi20";
++				virtual,channel = <2>;
++				remote-endpoint = <&ov106xx_in10>;
++				data-lanes = <1 2>;
++			};
++		};
++		port@1 {
++			csi2ep2: endpoint {
++				remote-endpoint = <&csi2_20_ep>;
++			};
++		};
++		port@2 {
++			vin6_max9286_des2ep2: endpoint@0 {
++				remote-endpoint = <&max9286_des2ep2>;
++			};
++			vin6_ti964_des2ep2: endpoint@1 {
++				remote-endpoint = <&ti964_des2ep2>;
++			};
++		};
++	};
++};
++
++&vin7 {
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		port@0 {
++			vin7ep0: endpoint@0 {
++				csi,select = "csi20";
++				virtual,channel = <3>;
++				remote-endpoint = <&ov106xx_in11>;
++				data-lanes = <1 2>;
++			};
++		};
++		port@1 {
++			csi2ep3: endpoint {
++				remote-endpoint = <&csi2_20_ep>;
++			};
++		};
++		port@2 {
++			vin7_max9286_des2ep3: endpoint@0 {
++				remote-endpoint = <&max9286_des2ep3>;
++			};
++			vin7_ti964_des2ep3: endpoint@1 {
++				remote-endpoint = <&ti964_des2ep3>;
++			};
++		};
++	};
++};
++
++&csi2_20 {
++	status = "okay";
++
++	virtual,channel {
++		csi2_vc0 {
++			data,type = "ycbcr422";
++			receive,vc = <0>;
++		};
++		csi2_vc1 {
++			data,type = "ycbcr422";
++			receive,vc = <1>;
++		};
++		csi2_vc2 {
++			data,type = "ycbcr422";
++			receive,vc = <2>;
++		};
++		csi2_vc3 {
++			data,type = "ycbcr422";
++			receive,vc = <3>;
++		};
++	};
++
++	port {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		csi2_20_ep: endpoint {
++			clock-lanes = <0>;
++			data-lanes = <1 2>;
++			csi-rate = <300>;
++		};
++	};
++};
+-- 
+1.9.1
+
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0041-arm64-dts-r8a7795-h3ulcb-kf-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0041-arm64-dts-r8a7795-h3ulcb-kf-add-ADAS-board.patch
deleted file mode 100644
index 1a50c81..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0041-arm64-dts-r8a7795-h3ulcb-kf-add-ADAS-board.patch
+++ /dev/null
@@ -1,2137 +0,0 @@
-From f1f043eab3dd06552b3600af1caf50e535f766f1 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 10:37:23 +0300
-Subject: [PATCH] arm64: dts: r8a7795-h3ulcb-kf: add ADAS board
-
-Kingfisher board on R8A7795 SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |    1 +
- .../boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts      |  443 ++++++
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts  | 1651 ++++++++++++++++++++
- 3 files changed, 2095 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index d163df7..86a08db 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb r8a7796-m3ulcb-kf-v1.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb r8a7795-h3ulcb-kf-v1.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
-new file mode 100644
-index 0000000..4b10d31
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
-@@ -0,0 +1,443 @@
-+/*
-+ * Device Tree Source for the H3ULCB Kingfisher V1 board
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-h3ulcb-kf.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795";
-+
-+	aliases {
-+		serial1 = &hscif0;
-+		serial2 = &hscif1;
-+		serial3 = &scif1;
-+	};
-+
-+	wlan_en: regulator@4 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wlan-en-regulator";
-+
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	codec_en_reg: regulator@6 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "codec-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 15 0>;
-+
-+		/* delay - CHECK */
-+		startup-delay-us = <70000>;
-+		enable-active-high;
-+	};
-+
-+	amp_en_reg: regulator@7 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "amp-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_74 0 0>;
-+
-+		startup-delay-us = <0>;
-+		enable-active-high;
-+	};
-+
-+	/delete-node/regulator@8;
-+
-+	sdio_switch: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wifi_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_74 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	/delete-node/regulator@10;
-+
-+	radio_switch: regulator@11 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "radio_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	kim {
-+		compatible = "kim";
-+		nshutdown_gpio = <343>;  /* gpio_ext_74 pin 3 */
-+		/* serial1 */
-+		dev_name = "/dev/ttySC1";
-+		flow_cntrl = <1>;
-+		/* int div 8 hscif@26.6666656MHz */
-+		baud_rate = <3333332>;
-+	};
-+
-+	hdmi-out {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con: endpoint {
-+				remote-endpoint = <&adv7513_out>;
-+			};
-+		};
-+	};
-+};
-+
-+&pfc {
-+	/delete-node/hscif4;
-+
-+	scif1_pins: scif1 {
-+		groups = "scif1_data_b";
-+		function = "scif1";
-+	};
-+
-+	hscif0_pins: hscif0 {
-+		groups = "hscif0_data", "hscif0_ctrl";
-+		function = "hscif0";
-+	};
-+
-+	hscif1_pins: hscif1 {
-+		groups = "hscif1_data_a", "hscif1_ctrl_a";
-+		function = "hscif1";
-+	};
-+
-+	du_pins: du {
-+		groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
-+		function = "du";
-+	};
-+};
-+
-+&du {
-+	pinctrl-0 = <&du_pins>;
-+	pinctrl-names = "default";
-+
-+	ports {
-+		port@0 {
-+			endpoint {
-+				remote-endpoint = <&adv7513_in>;
-+			};
-+		};
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_in>;
-+			};
-+		};
-+	};
-+};
-+
-+&gpio0 {
-+	/delete-node/video_a_irq;
-+	/delete-node/video_b_irq;
-+	/delete-node/gpioext_2_20_irq;
-+};
-+
-+&gpio1 {
-+	/delete-node/gpioext_2_21_irq;
-+	/delete-node/wifi_irq;
-+};
-+
-+&gpio2 {
-+	bl_pwm {
-+		gpio-hog;
-+		gpios = <3 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "BL PWM 100%";
-+	};
-+};
-+
-+&gpio5 {
-+	/delete-node/touch_irq;
-+	/delete-node/bt_strap;
-+
-+	/* V1 has h/w bug with swapped RTS and CTS on BT interface */
-+	/* Ignore these pins */
-+	hscif0_cts {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "hscif0 CTS";
-+	};
-+
-+	hscif0_rts {
-+		gpio-hog;
-+		gpios = <16 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "hscif0 RTS";
-+	};
-+};
-+
-+&gpio7 {
-+	/delete-node/gpioext_2_21_irq;
-+};
-+
-+&scif1 {
-+	pinctrl-0 = <&scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hscif0 {
-+	pinctrl-0 = <&hscif0_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&hscif1 {
-+	pinctrl-0 = <&hscif1_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&hscif4 {
-+	/delete-property/pinctrl-0;
-+	/delete-property/pinctrl-names;
-+
-+	status = "disabled";
-+};
-+
-+&i2c2 {
-+	/delete-node/pca9535@20;
-+	/delete-node/pca9535@21;
-+
-+	gpio_ext_74: pca9539@74 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x74>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio6>;
-+		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
-+
-+		hub_pwen {
-+			gpio-hog;
-+			gpios = <6 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "HUB pwen";
-+		};
-+		hub_rst {
-+			gpio-hog;
-+			gpios = <7 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "HUB rst";
-+		};
-+		otg_offvbus {
-+			gpio-hog;
-+			gpios = <8 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "OTG off VBUSn";
-+		};
-+		otg_extlpn {
-+			gpio-hog;
-+			gpios = <9 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "OTG EXTLPn";
-+		};
-+		otg_stat1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "OTG Stat1";
-+		};
-+		otg_stat2 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "OTG Stat2";
-+		};
-+	};
-+
-+	gpio_ext_75: pca9539@75 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x75>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio6>;
-+		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
-+
-+		gps_rst {
-+			gpio-hog;
-+			gpios = <6 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "GPS rst";
-+		};
-+		fpdl_shdn {
-+			gpio-hog;
-+			gpios = <9 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "FPDLink shdn";
-+		};
-+	};
-+};
-+
-+&i2cswitch2 {
-+	reg = <0x71>;
-+	reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
-+
-+	i2c@4 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <4>;
-+
-+		hdmi@3d {
-+			compatible = "adi,adv7511w";
-+			reg = <0x3d>;
-+			interrupt-parent = <&gpio2>;
-+			interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
-+			pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
-+
-+			adi,input-depth = <8>;
-+			adi,input-colorspace = "rgb";
-+			adi,input-clock = "1x";
-+			adi,input-style = <1>;
-+			adi,input-justification = "evenly";
-+			adi,clock-delay = <1200>;
-+
-+			ports {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+
-+				port@0 {
-+					reg = <0>;
-+					adv7513_in: endpoint {
-+						remote-endpoint = <&du_out_rgb>;
-+					};
-+				};
-+
-+				port@1 {
-+					reg = <1>;
-+					adv7513_out: endpoint {
-+						remote-endpoint = <&hdmi_con>;
-+					};
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	/delete-node/pca9535@21;
-+
-+	gpio_ext_76: pca9539@76 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x76>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio7>;
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+		port_b_a0 {
-+			gpio-hog;
-+			gpios = <0 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "Video-B A0";
-+		};
-+		port_b_a1 {
-+			gpio-hog;
-+			gpios = <1 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "Video-B A1";
-+		};
-+		port_a_a0 {
-+			gpio-hog;
-+			gpios = <2 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "Video-A A0";
-+		};
-+		port_a_a1 {
-+			gpio-hog;
-+			gpios = <3 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "Video-A A1";
-+		};
-+		/* pin 12 - CAM_CLK */
-+		rpi_cam_io_1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO1";
-+		};
-+		/* pin 11 - CAM_GPIO - assume pwdn */
-+		rpi_cam_io_0 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO0";
-+		};
-+		/* 0 - FPDLink output, 1 - LVDS output */
-+		lvds_vs_fpdl {
-+			gpio-hog;
-+			gpios = <14 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "LVDS switch";
-+		};
-+	};
-+
-+	gpio_ext_77: pca9539@77 {
-+		compatible = "nxp,pca9539";
-+		reg = <0x77>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio5>;
-+		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
-+
-+		mpcie_wake {
-+			gpio-hog;
-+			gpios = <0 GPIO_ACTIVE_HIGH>;
-+			output-low;
-+			line-name = "mPCIe WAKE#";
-+		};
-+		mpcie_wdisable {
-+			gpio-hog;
-+			gpios = <1 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "mPCIe W_DISABLE";
-+		};
-+		mpcie_clreq {
-+			gpio-hog;
-+			gpios = <2 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "mPCIe CLKREQ#";
-+		};
-+		mpcie_ovc {
-+			gpio-hog;
-+			gpios = <3 GPIO_ACTIVE_HIGH>;
-+			input;
-+			line-name = "mPCIe OVC";
-+		};
-+	};
-+};
-+
-+&i2cswitch4 {
-+	reg = <0x71>;
-+	reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
-+};
-+
-+&wlcore {
-+	interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
-new file mode 100644
-index 0000000..2c50230
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
-@@ -0,0 +1,1651 @@
-+/*
-+ * Device Tree Source for the H3ULCB Kingfisher board on r8a7795
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-h3ulcb.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB Kingfisher board based on r8a7795";
-+
-+	aliases {
-+		serial1 = &hscif4;
-+	};
-+
-+	snd_clk: snd_clk {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <24576000>;
-+		clock-output-names = "scki";
-+	};
-+
-+	wlan_en: regulator@4 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wlan-en-regulator";
-+
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vcc_sdhi3: regulator@41 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+	};
-+
-+	vccq_sdhi3: regulator@5 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 VccQ";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	codec_en_reg: regulator@6 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "codec-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 15 0>;
-+
-+		/* delay - CHECK */
-+		startup-delay-us = <70000>;
-+		enable-active-high;
-+	};
-+
-+	amp_en_reg: regulator@7 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "amp-en-regulator";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio_ext_20 0 0>;
-+
-+		startup-delay-us = <0>;
-+		enable-active-high;
-+	};
-+
-+	lvds_switch: regulator@8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "lvds_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio1 24 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	sdio_switch: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "wifi_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_20 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	sound_switch: regulator@10 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "pcm3168a_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_21 5 0>;
-+		enable-active-low;
-+		regulator-always-on;
-+	};
-+
-+	radio_switch: regulator@11 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "radio_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	kim {
-+		compatible = "kim";
-+		nshutdown_gpio = <343>;  /* pca9535@i2c2.0x20 pin 3 */
-+		/* serial1 */
-+		dev_name = "/dev/ttySC1";
-+		flow_cntrl = <1>;
-+		/* int div 8 hscif@26.6666656MHz */
-+		baud_rate = <3333332>;
-+	};
-+
-+	btwilink {
-+		compatible = "btwilink";
-+	};
-+
-+	sound_ext: sound@0 {
-+		pinctrl-0 = <&sound_0_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "pcm3168a";
-+
-+		simple-audio-card,bitclock-master = <&sound_ext_master>;
-+		simple-audio-card,frame-master = <&sound_ext_master>;
-+		sound_ext_master: simple-audio-card,cpu@0 {
-+			sound-dai = <&rcar_sound 0>;
-+			dai-tdm-slot-num = <8>;
-+			dai-tdm-slot-width = <32>;
-+		};
-+
-+		simple-audio-card,codec@0 {
-+			sound-dai = <&pcm3168a>;
-+			dai-tdm-slot-num = <8>;
-+			dai-tdm-slot-width = <32>;
-+			system-clock-frequency = <24576000>;
-+		};
-+	};
-+
-+	/delete-node/sound;
-+
-+	rsnd_ak4613: sound@1 {
-+		pinctrl-0 = <&sound_1_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "ak4613";
-+
-+		simple-audio-card,bitclock-master = <&sndcpu>;
-+		simple-audio-card,frame-master = <&sndcpu>;
-+
-+		sndcpu: simple-audio-card,cpu@1 {
-+			sound-dai = <&rcar_sound 1>;
-+		};
-+
-+		sndcodec: simple-audio-card,codec@1 {
-+			sound-dai = <&ak4613>;
-+		};
-+	};
-+
-+	sound_radio: sound@2 {
-+		pinctrl-0 = <&sound_2_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "i2s";
-+		simple-audio-card,name = "radio";
-+
-+		simple-audio-card,bitclock-master = <&sound_radio_master>;
-+		simple-audio-card,frame-master = <&sound_radio_master>;
-+		simple-audio-card,cpu@2 {
-+			sound-dai = <&rcar_sound 2>;
-+		};
-+
-+		sound_radio_master: simple-audio-card,codec@2 {
-+			sound-dai = <&radio>;
-+			system-clock-frequency = <12288000>;
-+		};
-+	};
-+
-+	lvds-encoder {
-+		compatible = "thine,thc63lvdm83d";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			port@0 {
-+				reg = <0>;
-+				lvds_enc_in: endpoint {
-+					remote-endpoint = <&du_out_lvds0>;
-+				};
-+			};
-+			port@1 {
-+				reg = <1>;
-+				lvds_enc_out: endpoint {
-+					remote-endpoint = <&lvds_in>;
-+				};
-+			};
-+		};
-+	};
-+
-+	lvds {
-+		compatible = "lvds-connector";
-+
-+		width-mm = <210>;
-+		height-mm = <158>;
-+
-+		panel-timing {
-+			/* 1280x800 @60Hz */
-+			clock-frequency = <65000000>;
-+			hactive = <1280>;
-+			vactive = <800>;
-+			hsync-len = <40>;
-+			hfront-porch = <80>;
-+			hback-porch = <40>;
-+			vfront-porch = <14>;
-+			vback-porch = <14>;
-+			vsync-len = <4>;
-+		};
-+
-+		port {
-+			lvds_in: endpoint {
-+				remote-endpoint = <&lvds_enc_out>;
-+			};
-+		};
-+	};
-+
-+	radio: si468x@0 {
-+		compatible = "si,si468x-pcm";
-+		status = "okay";
-+
-+		#sound-dai-cells = <0>;
-+	};
-+};
-+
-+&pfc {
-+	hscif4_pins: hscif4 {
-+		groups = "hscif4_data_a", "hscif4_ctrl";
-+		function = "hscif4";
-+	};
-+
-+	sdhi3_pins_3v3: sd3_3v3 {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+		power-source = <3300>;
-+	};
-+
-+	sound_0_pins: sound0 {
-+		groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
-+		function = "ssi";
-+	};
-+
-+	sound_1_pins: sound1 {
-+		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
-+		function = "ssi";
-+	};
-+
-+	sound_2_pins: sound2 {
-+		groups = "ssi6_ctrl", "ssi6_data";
-+		function = "ssi";
-+	};
-+
-+	usb0_pins: usb0 {
-+		groups = "usb0";
-+		function = "usb0";
-+	};
-+
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+
-+	canfd0_pins: canfd0 {
-+		groups = "canfd0_data_a";
-+		function = "canfd0";
-+	};
-+
-+	canfd1_pins: canfd1 {
-+		groups = "canfd1_data";
-+		function = "canfd1";
-+	};
-+};
-+
-+&gpio0 {
-+	video_a_irq {
-+		gpio-hog;
-+		gpios = <13 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-A irq";
-+	};
-+
-+	video_b_irq {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-B irq";
-+	};
-+
-+	gpioext_2_20_irq {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x20@i2c2 irq";
-+	};
-+};
-+
-+&gpio1 {
-+	gpioext_2_21_irq {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x21@i2c2 irq";
-+	};
-+
-+	wifi_irq {
-+		gpio-hog;
-+		gpios = <25 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "wifi irq";
-+	};
-+};
-+
-+&gpio5 {
-+	touch_irq {
-+		gpio-hog;
-+		gpios = <6 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "touch irq";
-+	};
-+
-+	/* From TI forum */
-+	/* BT_AUD_OUT should be pulled low when WL_EN is activated. */
-+	/* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
-+	bt_strap {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		output-low;
-+		line-name = "BT strap pin";
-+	};
-+};
-+
-+&gpio7 {
-+	gpioext_2_21_irq {
-+		gpio-hog;
-+		gpios = <3 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x21@i2c4 irq";
-+	};
-+};
-+
-+&hscif4 {
-+	pinctrl-0 = <&hscif4_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	clock-frequency = <400000>;
-+
-+	gpio_ext_20: pca9535@20 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x20>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio0>;
-+		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
-+	};
-+
-+	gpio_ext_21: pca9535@21 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x21>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio1>;
-+		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
-+	};
-+
-+	i2cswitch2: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* BCM node(s) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* USB3.0 HUB node(s) */
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* Power amp node(s) */
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* Radio node(s) */
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+			/* A2B node(s) */
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* PCIe node(s) */
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* LVDS display node(s) */
-+
-+			polytouch: edt-ft5x06@38 {
-+				compatible = "edt,edt-ft5x06";
-+				reg = <0x38>;
-+				interrupt-parent = <&gpio5>;
-+				interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
-+			};
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Audio, GPS and Gyro node(s) */
-+
-+			pcm3168a: audio-codec@44 {
-+				#sound-dai-cells = <0>;
-+				compatible = "ti,pcm3168a";
-+				reg = <0x44>;
-+				clocks = <&snd_clk>;
-+				clock-names = "scki";
-+				tdm;
-+				VDD1-supply = <&codec_en_reg>;
-+				VDD2-supply = <&codec_en_reg>;
-+				VCCAD1-supply = <&codec_en_reg>;
-+				VCCAD2-supply = <&codec_en_reg>;
-+				VCCDA1-supply = <&amp_en_reg>;
-+				VCCDA2-supply = <&amp_en_reg>;
-+			};
-+
-+			lsm9ds0_acc_mag@1d {
-+				compatible = "st,lsm9ds0_acc_mag";
-+				reg = <0x1d>;
-+			};
-+
-+			lsm9ds0_gyr@6b {
-+				compatible = "st,lsm9ds0-gyro";
-+				reg = <0x6b>;
-+			};
-+
-+			/* GPS@ 0x42 */
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	gpio_ext_22: pca9535@21 {
-+		compatible = "nxp,pca9535";
-+		reg = <0x22>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		interrupt-parent = <&gpio7>;
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+		/* pin 12 - CAM_CLK */
-+		rpi_cam_io_1 {
-+			gpio-hog;
-+			gpios = <10 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO1";
-+		};
-+		/* pin 11 - CAM_GPIO - assume pwdn */
-+		rpi_cam_io_0 {
-+			gpio-hog;
-+			gpios = <11 GPIO_ACTIVE_HIGH>;
-+			output-high;
-+			line-name = "RaspB_IO0";
-+		};
-+	};
-+
-+	i2cswitch4: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* SAM node(s) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* Slot A (CN10) */
-+
-+			ov106xx@0 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x60>;
-+
-+				port@0 {
-+					ov106xx_in0: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin0ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep0>;
-+					};
-+					ov106xx_ti964_des0ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep0>;
-+					};
-+					ov106xx_ti954_des0ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@1 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x61>;
-+
-+				port@0 {
-+					ov106xx_in1: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin1ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep1>;
-+					};
-+					ov106xx_ti964_des0ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep1>;
-+					};
-+					ov106xx_ti954_des0ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@2 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x62>;
-+
-+				port@0 {
-+					ov106xx_in2: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin2ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep2>;
-+					};
-+					ov106xx_ti964_des0ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@3 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x63>;
-+
-+				port@0 {
-+					ov106xx_in3: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin3ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep3>;
-+					};
-+					ov106xx_ti964_des0ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@0 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti964_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti964_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					ti964_des0ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					ti964_des0ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@0 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti954_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti954_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2a */
-+			max9286-max9271@0 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2a>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des0ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					max9286_des0ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					max9286_des0ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					max9286_des0ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi0ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* Slot B (CN11) */
-+
-+			ov106xx@4 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x64>;
-+
-+				port@0 {
-+					ov106xx_in4: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin4ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep0>;
-+					};
-+					ov106xx_ti964_des1ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep0>;
-+					};
-+					ov106xx_ti954_des1ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@5 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x65>;
-+
-+				port@0 {
-+					ov106xx_in5: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin5ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep1>;
-+					};
-+					ov106xx_ti964_des1ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep1>;
-+					};
-+					ov106xx_ti954_des1ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@6 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x66>;
-+
-+				port@0 {
-+					ov106xx_in6: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin6ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep2>;
-+					};
-+					ov106xx_ti964_des1ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@7 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x67>;
-+
-+				port@0 {
-+					ov106xx_in7: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin7ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep3>;
-+					};
-+					ov106xx_ti964_des1ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@1 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti964_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti964_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					ti964_des1ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					ti964_des1ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@1 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "coax";
-+
-+				port@0 {
-+					ti954_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti954_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2a */
-+			max9286-max9271@1 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2a>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des1ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					max9286_des1ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					max9286_des1ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					max9286_des1ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi2ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* Slot B (CN11) */
-+
-+			video_b_ext0: pca9535@27 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x27>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR2";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+				video_b_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B DES_SHDN";
-+				};
-+				video_b_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B led";
-+				};
-+			};
-+
-+			video_b_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B cfg2";
-+				};
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+			};
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Slot A (CN10) */
-+
-+			video_a_ext0: pca9535@26 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x26>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR2";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+				video_a_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A DES_SHDN";
-+				};
-+				video_a_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A led";
-+				};
-+			};
-+
-+			video_a_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg2";
-+				};
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+			vin0_ti964_des0ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep0>;
-+			};
-+			vin0_ti954_des0ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+			vin1_ti964_des0ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep1>;
-+			};
-+			vin1_ti954_des0ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+			vin2_ti964_des0ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+			vin3_ti964_des0ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+			vin4_ti964_des1ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep0>;
-+			};
-+			vin4_ti954_des1ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+			vin5_ti964_des1ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep1>;
-+			};
-+			vin5_ti954_des1ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+			vin6_ti964_des1ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+			vin7_ti964_des1ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&rcar_sound {
-+	pinctrl-0 = <&sound_clk_pins>;
-+
-+	/* Multi DAI */
-+	#sound-dai-cells = <1>;
-+
-+	rcar_sound,dai {
-+		dai0 {
-+			playback = <&ssi7>;
-+			capture  = <&ssi8>;
-+		};
-+
-+		dai1 {
-+			playback = <&ssi0 &src0 &dvc0>;
-+			capture  = <&ssi1 &src1 &dvc1>;
-+		};
-+
-+		dai2 {
-+			capture  = <&ssi6>;
-+		};
-+	};
-+};
-+
-+&sdhi3 {
-+	pinctrl-0 = <&sdhi3_pins_3v3>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&wlan_en>;
-+	vqmmc-supply = <&vccq_sdhi3>;
-+	keep-power-in-suspend;
-+	enable-sdio-wakeup;
-+	bus-width = <4>;
-+	no-1-8-v;
-+	non-removable;
-+	cap-power-off-card;
-+	max-frequency = <26000000>;
-+	status = "okay";
-+
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+	wlcore: wlcore@2 {
-+		compatible = "ti,wl1837";
-+		reg = <2>;
-+		interrupt-parent = <&gpio1>;
-+		interrupts = <25 IRQ_TYPE_EDGE_RISING>;
-+	};
-+};
-+
-+&usb2_phy0 {
-+	pinctrl-0 = <&usb0_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&xhci0 {
-+	status = "okay";
-+};
-+
-+&msiof1 {
-+	status = "disabled";
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&canfd {
-+	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+
-+	channel0 {
-+		status = "okay";
-+	};
-+
-+	channel1 {
-+		status = "okay";
-+	};
-+};
-+
-+/* uncomment to enable CN48 on VIN4 */
-+//#include "ulcb-kf-rpi.dtsi"
-+/* uncomment to enable CN47: SD on SDHI3 */
-+//#include "ulcb-kf-sd3.dtsi"
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0042-arm64-dts-r8a7795-h3ulcb-vb-add-ADAS-board.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0042-arm64-dts-r8a7795-h3ulcb-vb-add-ADAS-board.patch
deleted file mode 100644
index c2099f9..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0042-arm64-dts-r8a7795-h3ulcb-vb-add-ADAS-board.patch
+++ /dev/null
@@ -1,4140 +0,0 @@
-From b7d0e4d918d57ed3c015558a11c3aa8487b7e729 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 13 Jul 2017 06:17:32 +0300
-Subject: [PATCH] arm64: dts: r8a7795-h3ulcb-vb: add ADAS board
-
-Videobox board on R8A7795 SoC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
----
- arch/arm64/boot/dts/renesas/Makefile               |    1 +
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts     | 1787 ++++++++++++++++++++
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts  | 1787 ++++++++++++++++++++
- arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi      |  507 ++++++
- 4 files changed, 4082 insertions(+)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
- create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
-
-diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 86a08db..c9b3e96 100644
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb r8a7795-h3ulcb-kf-v1.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vb.dtb r8a7795-es1-h3ulcb-vb.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
-new file mode 100644
-index 0000000..77ad679
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
-@@ -0,0 +1,1787 @@
-+/*
-+ * Device Tree Source for the H3ULCB Videobox board on r8a7795 ES1.x
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-es1-h3ulcb.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB Videobox board based on r8a7795";
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led5 {
-+			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
-+		};
-+		led6 {
-+			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
-+		};
-+		/* D13 - status 0 */
-+		led_ext00 {
-+			gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "heartbeat";
-+		};
-+		/* D14 - status 1 */
-+		led_ext01 {
-+			gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "mmc1";
-+		};
-+		/* D16 - HDMI1 */
-+		led_ext02 {
-+			gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D18 - HDMI0 */
-+		led_ext03 {
-+			gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D20 - USB3.0 - 0.1 */
-+		led_ext04 {
-+			gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D21 - USB3.0 - 0.2 */
-+		led_ext05 {
-+			gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D24 - USB3.0 - 1.1 */
-+		led6_ext06 {
-+			gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D25 - USB3.0 - 1.2 */
-+		led_ext07 {
-+			gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
-+	snd_clk: snd_clk {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <24576000>;
-+		clock-output-names = "scki";
-+	};
-+
-+	vccq_sdhi3: regulator@5 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 VccQ";
-+		/* external voltage translator to 1.8V */
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	fpdlink_switch: regulator@8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fpdlink_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio1 20 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	hub_reset: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "hub_reset";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio5 5 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	hub_power: regulator@10 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "hub_power";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		gpio = <&gpio6 28 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	/delete-node/sound;
-+
-+	rsnd_ak4613: sound@0 {
-+		pinctrl-0 = <&sound_0_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "ak4613";
-+
-+		simple-audio-card,bitclock-master = <&sndcpu>;
-+		simple-audio-card,frame-master = <&sndcpu>;
-+
-+		sndcpu: simple-audio-card,cpu@1 {
-+			sound-dai = <&rcar_sound>;
-+		};
-+
-+		sndcodec: simple-audio-card,codec@1 {
-+			sound-dai = <&ak4613>;
-+		};
-+	};
-+
-+	lvds-encoder {
-+		compatible = "thine,thc63lvdm83d";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			port@0 {
-+				reg = <0>;
-+				lvds_enc_in: endpoint {
-+					remote-endpoint = <&du_out_lvds0>;
-+				};
-+			};
-+			port@1 {
-+				reg = <1>;
-+				lvds_enc_out: endpoint {
-+					remote-endpoint = <&lvds_in>;
-+				};
-+			};
-+		};
-+	};
-+
-+	lvds {
-+		compatible = "lvds-connector";
-+
-+		width-mm = <210>;
-+		height-mm = <158>;
-+
-+		panel-timing {
-+			/* 1280x800 @60Hz */
-+			clock-frequency = <65000000>;
-+			hactive = <1280>;
-+			vactive = <800>;
-+			hsync-len = <40>;
-+			hfront-porch = <80>;
-+			hback-porch = <40>;
-+			vfront-porch = <14>;
-+			vback-porch = <14>;
-+			vsync-len = <4>;
-+		};
-+
-+		port {
-+			lvds_in: endpoint {
-+				remote-endpoint = <&lvds_enc_out>;
-+			};
-+		};
-+	};
-+
-+	hdmi1-out {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi1_con: endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_out>;
-+			};
-+		};
-+	};
-+
-+	excan_ref_clk: excan-ref-clock {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <16000000>;
-+	};
-+
-+	radio: si468x@0 {
-+		compatible = "si,si468x-pcm";
-+		status = "okay";
-+
-+		#sound-dai-cells = <0>;
-+	};
-+
-+	spi_gpio_sw {
-+		compatible = "spi-gpio";
-+		#address-cells = <0x1>;
-+		#size-cells = <0x0>;
-+		gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-+		gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>;
-+		gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>;
-+		cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-+		num-chipselects = <1>;
-+
-+		spidev: spidev@0 {
-+			compatible = "spidev", "spi-gpio";
-+			reg = <0>;
-+			spi-max-frequency = <25000000>;
-+			spi-cpha;
-+			spi-cpol;
-+		};
-+	};
-+
-+	spi_gpio_can {
-+		compatible = "spi-gpio";
-+		#address-cells = <0x1>;
-+		#size-cells = <0x0>;
-+		gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-+		gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>;
-+		gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>;
-+		cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
-+			    &gpio1 4 GPIO_ACTIVE_HIGH>;
-+		num-chipselects = <2>;
-+
-+		spican0: spidev@0 {
-+			compatible = "microchip,mcp2515";
-+			reg = <0>;
-+			clocks = <&excan_ref_clk>;
-+			interrupt-parent = <&gpio0>;
-+			interrupts = <15 GPIO_ACTIVE_LOW>;
-+			spi-max-frequency = <10000000>;
-+		};
-+		spican1: spidev@1 {
-+			compatible = "microchip,mcp2515";
-+			reg = <1>;
-+			clocks = <&excan_ref_clk>;
-+			interrupt-parent = <&gpio1>;
-+			interrupts = <5 GPIO_ACTIVE_LOW>;
-+			spi-max-frequency = <10000000>;
-+		};
-+	};
-+};
-+
-+&du {
-+	ports {
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_in>;
-+			};
-+		};
-+		port@2 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_in>;
-+			};
-+		};
-+		port@3 {
-+			endpoint {
-+				remote-endpoint = <&lvds_enc_in>;
-+			};
-+		};
-+	};
-+};
-+
-+&hdmi1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		port@0 {
-+			reg = <0>;
-+			rcar_dw_hdmi1_in: endpoint {
-+				remote-endpoint = <&du_out_hdmi1>;
-+			};
-+		};
-+		port@1 {
-+			reg = <1>;
-+			rcar_dw_hdmi1_out: endpoint {
-+				remote-endpoint = <&hdmi1_con>;
-+			};
-+		};
-+	};
-+};
-+
-+&pfc {
-+	hscif4_pins: hscif4 {
-+		groups = "hscif4_data_a", "hscif4_ctrl";
-+		function = "hscif4";
-+	};
-+
-+	sdhi3_pins_3v3: sd3_3v3 {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+		power-source = <3300>;
-+	};
-+
-+	/delete-node/sound;
-+
-+	sound_0_pins: sound1 {
-+		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
-+		function = "ssi";
-+	};
-+
-+	usb0_pins: usb0 {
-+		groups = "usb0";
-+		function = "usb0";
-+	};
-+
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+
-+	canfd0_pins: canfd0 {
-+		groups = "canfd0_data_a";
-+		function = "canfd0";
-+	};
-+
-+	canfd1_pins: canfd1 {
-+		groups = "canfd1_data";
-+		function = "canfd1";
-+	};
-+};
-+
-+&gpio0 {
-+	video_a_irq {
-+		gpio-hog;
-+		gpios = <12 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-A irq";
-+	};
-+
-+	video_b_irq {
-+		gpio-hog;
-+		gpios = <13 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-B irq";
-+	};
-+
-+	video_c_irq {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-C irq";
-+	};
-+};
-+
-+&gpio1 {
-+	gpioext_4_22_irq {
-+		gpio-hog;
-+		gpios = <25 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x22@i2c4 irq";
-+	};
-+	pcie_disable {
-+		gpio-hog;
-+		gpios = <11 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "mPCIe W_DISABLE";
-+	};
-+	m2_sleep {
-+		gpio-hog;
-+		gpios = <6 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 SLEEP#";
-+	};
-+	m2_pres {
-+		gpio-hog;
-+		gpios = <7 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 Present";
-+	};
-+	m2_pcie_det {
-+		gpio-hog;
-+		gpios = <18 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 PCIe detected";
-+	};
-+	m2_usb_det {
-+		gpio-hog;
-+		gpios = <19 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 USB30 detected";
-+	};
-+	m2_usb_det {
-+		gpio-hog;
-+		gpios = <27 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 SSD detected";
-+	};
-+	eth_phy_reset {
-+		gpio-hog;
-+		gpios = <16 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "BR phy reset";
-+	};
-+	eth_sw_reset {
-+		gpio-hog;
-+		gpios = <17 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "BR switch reset";
-+	};
-+};
-+
-+&gpio2 {
-+	m2_wake {
-+		gpio-hog;
-+		gpios = <1 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 WAKE#";
-+	};
-+	m2_pcie_en {
-+		gpio-hog;
-+		gpios = <4 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 PCIe enable";
-+	};
-+};
-+
-+&gpio3 {
-+	m2_power_off {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 FULL_CARD_POWER_OFF#";
-+	};
-+};
-+
-+&gpio6 {
-+	pcie_wake {
-+		gpio-hog;
-+		gpios = <4 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "mPCIe WAKE#";
-+	};
-+	pcie_clkreq {
-+		gpio-hog;
-+		gpios = <10 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "mPCIe CLKREQ#";
-+	};
-+	m2_rst {
-+		gpio-hog;
-+		gpios = <21 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 RESET#";
-+	};
-+};
-+
-+&hscif4 {
-+	pinctrl-0 = <&hscif4_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	clock-frequency = <400000>;
-+
-+	i2cswitch2: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* USB3.0 HUB node(s) */
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* PCIe node(s) */
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Slot A (CN10) */
-+
-+			ov106xx@0 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x60>;
-+
-+				port@0 {
-+					ov106xx_in0: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin0ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep0>;
-+					};
-+					ov106xx_ti964_des0ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep0>;
-+					};
-+					ov106xx_ti954_des0ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@1 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x61>;
-+
-+				port@0 {
-+					ov106xx_in1: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin1ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep1>;
-+					};
-+					ov106xx_ti964_des0ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep1>;
-+					};
-+					ov106xx_ti954_des0ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@2 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x62>;
-+
-+				port@0 {
-+					ov106xx_in2: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin2ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep2>;
-+					};
-+					ov106xx_ti964_des0ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@3 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x63>;
-+
-+				port@0 {
-+					ov106xx_in3: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin3ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep3>;
-+					};
-+					ov106xx_ti964_des0ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@0 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti964_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti964_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					ti964_des0ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					ti964_des0ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@0 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				/* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti954_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti954_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2c */
-+			max9286-max9271@0 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2c>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des0ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					max9286_des0ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					max9286_des0ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					max9286_des0ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi0ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* Slot B (CN11) */
-+
-+			ov106xx@4 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x64>;
-+
-+				port@0 {
-+					ov106xx_in4: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin4ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep0>;
-+					};
-+					ov106xx_ti964_des1ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep0>;
-+					};
-+					ov106xx_ti954_des1ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@5 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x65>;
-+
-+				port@0 {
-+					ov106xx_in5: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin5ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep1>;
-+					};
-+					ov106xx_ti964_des1ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep1>;
-+					};
-+					ov106xx_ti954_des1ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@6 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x66>;
-+
-+				port@0 {
-+					ov106xx_in6: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin6ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep2>;
-+					};
-+					ov106xx_ti964_des1ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@7 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x67>;
-+
-+				port@0 {
-+					ov106xx_in7: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin7ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep3>;
-+					};
-+					ov106xx_ti964_des1ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@1 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti964_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti964_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					ti964_des1ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					ti964_des1ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@1 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				/* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti954_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti954_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2c */
-+			max9286-max9271@1 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2c>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des1ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					max9286_des1ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					max9286_des1ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					max9286_des1ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi2ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* Slot C (CN12) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* Slot A (CN10) */
-+
-+			video_a_ext0: pca9535@26 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x26>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR2";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+				video_a_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A DES_SHDN";
-+				};
-+				video_a_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A led";
-+				};
-+			};
-+
-+			video_a_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg2";
-+				};
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <10 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR2";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+				video_a_des_shdn {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A DES_SHDN";
-+				};
-+				video_a_led {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A LED";
-+				};
-+			};
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* Slot B (CN11) */
-+
-+			video_b_ext0: pca9535@26 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x26>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR2";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+				video_b_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B DES_SHDN";
-+				};
-+				video_b_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B led";
-+				};
-+			};
-+
-+			video_b_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg2";
-+				};
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <10 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR2";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+				video_b_des_shdn {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B DES_SHDN";
-+				};
-+				video_b_led {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B LED";
-+				};
-+			};
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+			/* Slot C (CN12) */
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	i2cswitch4: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* FAN node - EMC2103 */
-+			fan_ctrl:ecm2103@2e {
-+				compatible = "emc2103";
-+				reg = <0x2e>;
-+			};
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* Power nodes - 2 x TPS544x20 */
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* CAN and power board nodes */
-+
-+			gpio_ext_pwr: pca9535@22 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x22>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+				interrupt-controller;
-+				interrupt-parent = <&gpio1>;
-+				interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+
-+				/* enable input DCDC after wake-up signal released */
-+				pwr_hold {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "pwr_hold";
-+				};
-+
-+				/* CAN0 */
-+				can0_stby {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can0_stby";
-+				};
-+				can0_load {
-+					gpio-hog;
-+					gpios = <0 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can0_120R_load";
-+				};
-+				/* CAN1 */
-+				can1_stby {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can1_stby";
-+				};
-+				can1_load {
-+					gpio-hog;
-+					gpios = <1 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can1_120R_load";
-+				};
-+				/* CAN2 */
-+				can2_stby {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can2_stby";
-+				};
-+				can2_load {
-+					gpio-hog;
-+					gpios = <2 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can2_120R_load";
-+				};
-+				can2_rst {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "can2_rst";
-+				};
-+				/* CAN3 */
-+				can3_stby {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can3_stby";
-+				};
-+				can3_load {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can3_120R_load";
-+				};
-+				can3_rst {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "can3_rst";
-+				};
-+			};
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* FPDLink output node - DS90UH947 */
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+			/* BCM switch node */
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* LED board node(s) */
-+
-+			gpio_ext_led: pca9535@22 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x22>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				/* gpios 0..7 are used for indication LEDs, low-active */
-+			};
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* M2 connector i2c node(s) */
-+		};
-+
-+		/* port 7 is not used */
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+			vin0_ti964_des0ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep0>;
-+			};
-+			vin0_ti954_des0ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+			vin1_ti964_des0ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep1>;
-+			};
-+			vin1_ti954_des0ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+			vin2_ti964_des0ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+			vin3_ti964_des0ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+			vin4_ti964_des1ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep0>;
-+			};
-+			vin4_ti954_des1ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+			vin5_ti964_des1ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep1>;
-+			};
-+			vin5_ti954_des1ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+			vin6_ti964_des1ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+			vin7_ti964_des1ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&rcar_sound {
-+	pinctrl-0 = <&sound_clk_pins>;
-+
-+	/* Multi DAI */
-+	#sound-dai-cells = <1>;
-+};
-+
-+&sata {
-+	status = "okay";
-+};
-+
-+&ssi1 {
-+	/delete-property/shared-pin;
-+};
-+
-+&avb {
-+	/delete-property/phy-handle;
-+	/delete-property/phy-gpios;
-+	phy-mode = "rgmii";
-+
-+	/delete-node/ethernet-phy@0;
-+
-+	fixed-link {
-+		speed = <100>;
-+		full-duplex;
-+	};
-+};
-+
-+&msiof1 {
-+	status = "disabled";
-+};
-+
-+&usb2_phy0 {
-+	pinctrl-0 = <&usb0_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&xhci0 {
-+	status = "okay";
-+};
-+
-+&hsusb {
-+	status = "okay";
-+};
-+
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&canfd {
-+	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+
-+	renesas,can-clock-select = <0x0>;
-+
-+	channel0 {
-+		status = "okay";
-+	};
-+
-+	channel1 {
-+		status = "okay";
-+	};
-+};
-+
-+/* uncomment to enable CN12 on VIN4-7 */
-+//#include "ulcb-vb-cn12.dtsi"
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
-new file mode 100644
-index 0000000..1263637
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
-@@ -0,0 +1,1787 @@
-+/*
-+ * Device Tree Source for the H3ULCB Videobox board
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-h3ulcb.dts"
-+
-+/ {
-+	model = "Renesas H3ULCB Videobox board based on r8a7795";
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led5 {
-+			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
-+		};
-+		led6 {
-+			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
-+		};
-+		/* D13 - status 0 */
-+		led_ext00 {
-+			gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "heartbeat";
-+		};
-+		/* D14 - status 1 */
-+		led_ext01 {
-+			gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "mmc1";
-+		};
-+		/* D16 - HDMI1 */
-+		led_ext02 {
-+			gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D18 - HDMI0 */
-+		led_ext03 {
-+			gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D20 - USB3.0 - 0.1 */
-+		led_ext04 {
-+			gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D21 - USB3.0 - 0.2 */
-+		led_ext05 {
-+			gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D24 - USB3.0 - 1.1 */
-+		led6_ext06 {
-+			gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>;
-+		};
-+		/* D25 - USB3.0 - 1.2 */
-+		led_ext07 {
-+			gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
-+	snd_clk: snd_clk {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <24576000>;
-+		clock-output-names = "scki";
-+	};
-+
-+	vccq_sdhi3: regulator@5 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 VccQ";
-+		/* external voltage translator to 1.8V */
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	fpdlink_switch: regulator@8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fpdlink_on";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio1 20 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	hub_reset: regulator@9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "hub_reset";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&gpio5 5 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	hub_power: regulator@10 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "hub_power";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		gpio = <&gpio6 28 0>;
-+		enable-active-high;
-+		regulator-always-on;
-+	};
-+
-+	/delete-node/sound;
-+
-+	rsnd_ak4613: sound@0 {
-+		pinctrl-0 = <&sound_0_pins>;
-+		pinctrl-names = "default";
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,name = "ak4613";
-+
-+		simple-audio-card,bitclock-master = <&sndcpu>;
-+		simple-audio-card,frame-master = <&sndcpu>;
-+
-+		sndcpu: simple-audio-card,cpu@1 {
-+			sound-dai = <&rcar_sound>;
-+		};
-+
-+		sndcodec: simple-audio-card,codec@1 {
-+			sound-dai = <&ak4613>;
-+		};
-+	};
-+
-+	lvds-encoder {
-+		compatible = "thine,thc63lvdm83d";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			port@0 {
-+				reg = <0>;
-+				lvds_enc_in: endpoint {
-+					remote-endpoint = <&du_out_lvds0>;
-+				};
-+			};
-+			port@1 {
-+				reg = <1>;
-+				lvds_enc_out: endpoint {
-+					remote-endpoint = <&lvds_in>;
-+				};
-+			};
-+		};
-+	};
-+
-+	lvds {
-+		compatible = "lvds-connector";
-+
-+		width-mm = <210>;
-+		height-mm = <158>;
-+
-+		panel-timing {
-+			/* 1280x800 @60Hz */
-+			clock-frequency = <65000000>;
-+			hactive = <1280>;
-+			vactive = <800>;
-+			hsync-len = <40>;
-+			hfront-porch = <80>;
-+			hback-porch = <40>;
-+			vfront-porch = <14>;
-+			vback-porch = <14>;
-+			vsync-len = <4>;
-+		};
-+
-+		port {
-+			lvds_in: endpoint {
-+				remote-endpoint = <&lvds_enc_out>;
-+			};
-+		};
-+	};
-+
-+	hdmi1-out {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi1_con: endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_out>;
-+			};
-+		};
-+	};
-+
-+	excan_ref_clk: excan-ref-clock {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <16000000>;
-+	};
-+
-+	radio: si468x@0 {
-+		compatible = "si,si468x-pcm";
-+		status = "okay";
-+
-+		#sound-dai-cells = <0>;
-+	};
-+
-+	spi_gpio_sw {
-+		compatible = "spi-gpio";
-+		#address-cells = <0x1>;
-+		#size-cells = <0x0>;
-+		gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-+		gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>;
-+		gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>;
-+		cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-+		num-chipselects = <1>;
-+
-+		spidev: spidev@0 {
-+			compatible = "spidev", "spi-gpio";
-+			reg = <0>;
-+			spi-max-frequency = <25000000>;
-+			spi-cpha;
-+			spi-cpol;
-+		};
-+	};
-+
-+	spi_gpio_can {
-+		compatible = "spi-gpio";
-+		#address-cells = <0x1>;
-+		#size-cells = <0x0>;
-+		gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-+		gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>;
-+		gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>;
-+		cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
-+			    &gpio1 4 GPIO_ACTIVE_HIGH>;
-+		num-chipselects = <2>;
-+
-+		spican0: spidev@0 {
-+			compatible = "microchip,mcp2515";
-+			reg = <0>;
-+			clocks = <&excan_ref_clk>;
-+			interrupt-parent = <&gpio0>;
-+			interrupts = <15 GPIO_ACTIVE_LOW>;
-+			spi-max-frequency = <10000000>;
-+		};
-+		spican1: spidev@1 {
-+			compatible = "microchip,mcp2515";
-+			reg = <1>;
-+			clocks = <&excan_ref_clk>;
-+			interrupt-parent = <&gpio1>;
-+			interrupts = <5 GPIO_ACTIVE_LOW>;
-+			spi-max-frequency = <10000000>;
-+		};
-+	};
-+};
-+
-+&du {
-+	ports {
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_in>;
-+			};
-+		};
-+		port@2 {
-+			endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi1_in>;
-+			};
-+		};
-+		port@3 {
-+			endpoint {
-+				remote-endpoint = <&lvds_enc_in>;
-+			};
-+		};
-+	};
-+};
-+
-+&hdmi1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		port@0 {
-+			reg = <0>;
-+			rcar_dw_hdmi1_in: endpoint {
-+				remote-endpoint = <&du_out_hdmi1>;
-+			};
-+		};
-+		port@1 {
-+			reg = <1>;
-+			rcar_dw_hdmi1_out: endpoint {
-+				remote-endpoint = <&hdmi1_con>;
-+			};
-+		};
-+	};
-+};
-+
-+&pfc {
-+	hscif4_pins: hscif4 {
-+		groups = "hscif4_data_a", "hscif4_ctrl";
-+		function = "hscif4";
-+	};
-+
-+	sdhi3_pins_3v3: sd3_3v3 {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+		power-source = <3300>;
-+	};
-+
-+	/delete-node/sound;
-+
-+	sound_0_pins: sound1 {
-+		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
-+		function = "ssi";
-+	};
-+
-+	usb0_pins: usb0 {
-+		groups = "usb0";
-+		function = "usb0";
-+	};
-+
-+	can0_pins: can0 {
-+		groups = "can0_data_a";
-+		function = "can0";
-+	};
-+
-+	can1_pins: can1 {
-+		groups = "can1_data";
-+		function = "can1";
-+	};
-+
-+	canfd0_pins: canfd0 {
-+		groups = "canfd0_data_a";
-+		function = "canfd0";
-+	};
-+
-+	canfd1_pins: canfd1 {
-+		groups = "canfd1_data";
-+		function = "canfd1";
-+	};
-+};
-+
-+&gpio0 {
-+	video_a_irq {
-+		gpio-hog;
-+		gpios = <12 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-A irq";
-+	};
-+
-+	video_b_irq {
-+		gpio-hog;
-+		gpios = <13 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-B irq";
-+	};
-+
-+	video_c_irq {
-+		gpio-hog;
-+		gpios = <14 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "Video-C irq";
-+	};
-+};
-+
-+&gpio1 {
-+	gpioext_4_22_irq {
-+		gpio-hog;
-+		gpios = <25 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "0x22@i2c4 irq";
-+	};
-+	pcie_disable {
-+		gpio-hog;
-+		gpios = <11 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "mPCIe W_DISABLE";
-+	};
-+	m2_sleep {
-+		gpio-hog;
-+		gpios = <6 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 SLEEP#";
-+	};
-+	m2_pres {
-+		gpio-hog;
-+		gpios = <7 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 Present";
-+	};
-+	m2_pcie_det {
-+		gpio-hog;
-+		gpios = <18 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 PCIe detected";
-+	};
-+	m2_usb_det {
-+		gpio-hog;
-+		gpios = <19 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 USB30 detected";
-+	};
-+	m2_usb_det {
-+		gpio-hog;
-+		gpios = <27 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 SSD detected";
-+	};
-+	eth_phy_reset {
-+		gpio-hog;
-+		gpios = <16 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "BR phy reset";
-+	};
-+	eth_sw_reset {
-+		gpio-hog;
-+		gpios = <17 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "BR switch reset";
-+	};
-+};
-+
-+&gpio2 {
-+	m2_wake {
-+		gpio-hog;
-+		gpios = <1 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "M.2 WAKE#";
-+	};
-+	m2_pcie_en {
-+		gpio-hog;
-+		gpios = <4 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 PCIe enable";
-+	};
-+};
-+
-+&gpio3 {
-+	m2_power_off {
-+		gpio-hog;
-+		gpios = <15 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 FULL_CARD_POWER_OFF#";
-+	};
-+};
-+
-+&gpio6 {
-+	pcie_wake {
-+		gpio-hog;
-+		gpios = <4 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "mPCIe WAKE#";
-+	};
-+	pcie_clkreq {
-+		gpio-hog;
-+		gpios = <10 GPIO_ACTIVE_HIGH>;
-+		input;
-+		line-name = "mPCIe CLKREQ#";
-+	};
-+	m2_rst {
-+		gpio-hog;
-+		gpios = <21 GPIO_ACTIVE_HIGH>;
-+		output-high;
-+		line-name = "M.2 RESET#";
-+	};
-+};
-+
-+&hscif4 {
-+	pinctrl-0 = <&hscif4_pins>;
-+	pinctrl-names = "default";
-+	ctsrts;
-+
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	clock-frequency = <400000>;
-+
-+	i2cswitch2: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* USB3.0 HUB node(s) */
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* PCIe node(s) */
-+		};
-+
-+		i2c@7 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <7>;
-+			/* Slot A (CN10) */
-+
-+			ov106xx@0 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x60>;
-+
-+				port@0 {
-+					ov106xx_in0: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin0ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep0>;
-+					};
-+					ov106xx_ti964_des0ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep0>;
-+					};
-+					ov106xx_ti954_des0ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@1 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x61>;
-+
-+				port@0 {
-+					ov106xx_in1: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin1ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep1>;
-+					};
-+					ov106xx_ti964_des0ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep1>;
-+					};
-+					ov106xx_ti954_des0ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des0ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@2 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x62>;
-+
-+				port@0 {
-+					ov106xx_in2: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin2ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep2>;
-+					};
-+					ov106xx_ti964_des0ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@3 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x63>;
-+
-+				port@0 {
-+					ov106xx_in3: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin3ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des0ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des0ep3>;
-+					};
-+					ov106xx_ti964_des0ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des0ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@0 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti964_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti964_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					ti964_des0ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					ti964_des0ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@0 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				/* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti954_des0ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					ti954_des0ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi0ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2c */
-+			max9286-max9271@0 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2c>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des0ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in0>;
-+					};
-+					max9286_des0ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in1>;
-+					};
-+					max9286_des0ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in2>;
-+					};
-+					max9286_des0ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in3>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi0ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_40_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* Slot B (CN11) */
-+
-+			ov106xx@4 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x64>;
-+
-+				port@0 {
-+					ov106xx_in4: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin4ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep0: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep0>;
-+					};
-+					ov106xx_ti964_des1ep0: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep0>;
-+					};
-+					ov106xx_ti954_des1ep0: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep0>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@5 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x65>;
-+
-+				port@0 {
-+					ov106xx_in5: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin5ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep1: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep1>;
-+					};
-+					ov106xx_ti964_des1ep1: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep1>;
-+					};
-+					ov106xx_ti954_des1ep1: endpoint@2 {
-+						remote-endpoint = <&ti954_des1ep1>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@6 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x66>;
-+
-+				port@0 {
-+					ov106xx_in6: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin6ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep2: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep2>;
-+					};
-+					ov106xx_ti964_des1ep2: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep2>;
-+					};
-+				};
-+			};
-+
-+			ov106xx@7 {
-+				compatible = "ovti,ov106xx";
-+				reg = <0x67>;
-+
-+				port@0 {
-+					ov106xx_in7: endpoint {
-+						clock-lanes = <0>;
-+						data-lanes = <1 2 3 4>;
-+						remote-endpoint = <&vin7ep0>;
-+					};
-+				};
-+				port@1 {
-+					ov106xx_max9286_des1ep3: endpoint@0 {
-+						remote-endpoint = <&max9286_des1ep3>;
-+					};
-+					ov106xx_ti964_des1ep3: endpoint@1 {
-+						remote-endpoint = <&ti964_des1ep3>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB964 @ 0x3a */
-+			ti964-ti9x3@1 {
-+				compatible = "ti,ti964-ti9x3";
-+				reg = <0x3a>;
-+				ti,sensor_delay = <350>;
-+				ti,links = <4>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti964_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti964_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					ti964_des1ep2: endpoint@2 {
-+						ti9x3-addr = <0x0e>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					ti964_des1ep3: endpoint@3 {
-+						ti9x3-addr = <0x0f>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					ti964_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* DS90UB954 @ 0x38 */
-+			ti954-ti9x3@1 {
-+				compatible = "ti,ti954-ti9x3";
-+				reg = <0x38>;
-+				/* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
-+				ti,sensor_delay = <350>;
-+				ti,links = <2>;
-+				ti,lanes = <4>;
-+				ti,forwarding-mode = "round-robin";
-+				ti,cable-mode = "stp";
-+
-+				port@0 {
-+					ti954_des1ep0: endpoint@0 {
-+						ti9x3-addr = <0x0c>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					ti954_des1ep1: endpoint@1 {
-+						ti9x3-addr = <0x0d>;
-+						dvp-order = <0>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+				};
-+				port@1 {
-+					ti954_csi2ep0: endpoint {
-+						csi-rate = <1450>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+
-+			/* MAX9286 @ 0x2c */
-+			max9286-max9271@1 {
-+				compatible = "maxim,max9286-max9271";
-+				reg = <0x2c>;
-+				maxim,sensor_delay = <350>;
-+				maxim,links = <4>;
-+				maxim,lanes = <4>;
-+				maxim,resetb-gpio = <1>;
-+				maxim,fsync-mode = "automatic";
-+				maxim,timeout = <100>;
-+
-+				port@0 {
-+					max9286_des1ep0: endpoint@0 {
-+						max9271-addr = <0x50>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in4>;
-+					};
-+					max9286_des1ep1: endpoint@1 {
-+						max9271-addr = <0x51>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in5>;
-+					};
-+					max9286_des1ep2: endpoint@2 {
-+						max9271-addr = <0x52>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in6>;
-+					};
-+					max9286_des1ep3: endpoint@3 {
-+						max9271-addr = <0x53>;
-+						dvp-order = <1>;
-+						remote-endpoint = <&ov106xx_in7>;
-+					};
-+				};
-+				port@1 {
-+					max9286_csi2ep0: endpoint {
-+						csi-rate = <700>;
-+						remote-endpoint = <&csi2_41_ep>;
-+					};
-+				};
-+			};
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* Slot C (CN12) */
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* Slot A (CN10) */
-+
-+			video_a_ext0: pca9535@26 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x26>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR2";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+				video_a_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A DES_SHDN";
-+				};
-+				video_a_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A led";
-+				};
-+			};
-+
-+			video_a_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_a_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg2";
-+				};
-+				video_a_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg1";
-+				};
-+				video_a_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-A cfg0";
-+				};
-+				video_a_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR_SHDN";
-+				};
-+				video_a_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR0";
-+				};
-+				video_a_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR1";
-+				};
-+				video_a_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <10 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR2";
-+				};
-+				video_a_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A PWR3";
-+				};
-+				video_a_des_shdn {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-A DES_SHDN";
-+				};
-+				video_a_led {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-A LED";
-+				};
-+			};
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* Slot B (CN11) */
-+
-+			video_b_ext0: pca9535@26 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x26>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR2";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <15 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+				video_b_des_shdn {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B DES_SHDN";
-+				};
-+				video_b_des_led {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B led";
-+				};
-+			};
-+
-+			video_b_ext1: max7325@5c {
-+				compatible = "maxim,max7325";
-+				reg = <0x5c>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				video_b_des_cfg2 {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg2";
-+				};
-+				video_b_des_cfg1 {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg1";
-+				};
-+				video_b_des_cfg0 {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					input;
-+					line-name = "Video-B cfg0";
-+				};
-+				video_b_pwr_shdn {
-+					gpio-hog;
-+					gpios = <14 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR_SHDN";
-+				};
-+				video_b_cam_pwr0 {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR0";
-+				};
-+				video_b_cam_pwr1 {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR1";
-+				};
-+				video_b_cam_pwr2 {
-+					gpio-hog;
-+					gpios = <10 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR2";
-+				};
-+				video_b_cam_pwr3 {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B PWR3";
-+				};
-+				video_b_des_shdn {
-+					gpio-hog;
-+					gpios = <13 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "Video-B DES_SHDN";
-+				};
-+				video_b_led {
-+					gpio-hog;
-+					gpios = <12 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "Video-B LED";
-+				};
-+			};
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+			/* Slot C (CN12) */
-+		};
-+	};
-+};
-+
-+&i2c4 {
-+	i2cswitch4: pca9548@74 {
-+		compatible = "nxp,pca9548";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x74>;
-+		reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>;
-+
-+		i2c@0 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0>;
-+			/* FAN node - EMC2103 */
-+			fan_ctrl:ecm2103@2e {
-+				compatible = "emc2103";
-+				reg = <0x2e>;
-+			};
-+		};
-+
-+		i2c@1 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <1>;
-+			/* Power nodes - 2 x TPS544x20 */
-+		};
-+
-+		i2c@2 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <2>;
-+			/* CAN and power board nodes */
-+
-+			gpio_ext_pwr: pca9535@22 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x22>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+				interrupt-controller;
-+				interrupt-parent = <&gpio1>;
-+				interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+
-+				/* enable input DCDC after wake-up signal released */
-+				pwr_hold {
-+					gpio-hog;
-+					gpios = <11 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "pwr_hold";
-+				};
-+
-+				/* CAN0 */
-+				can0_stby {
-+					gpio-hog;
-+					gpios = <4 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can0_stby";
-+				};
-+				can0_load {
-+					gpio-hog;
-+					gpios = <0 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can0_120R_load";
-+				};
-+				/* CAN1 */
-+				can1_stby {
-+					gpio-hog;
-+					gpios = <5 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can1_stby";
-+				};
-+				can1_load {
-+					gpio-hog;
-+					gpios = <1 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can1_120R_load";
-+				};
-+				/* CAN2 */
-+				can2_stby {
-+					gpio-hog;
-+					gpios = <6 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can2_stby";
-+				};
-+				can2_load {
-+					gpio-hog;
-+					gpios = <2 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can2_120R_load";
-+				};
-+				can2_rst {
-+					gpio-hog;
-+					gpios = <8 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "can2_rst";
-+				};
-+				/* CAN3 */
-+				can3_stby {
-+					gpio-hog;
-+					gpios = <7 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can3_stby";
-+				};
-+				can3_load {
-+					gpio-hog;
-+					gpios = <3 GPIO_ACTIVE_HIGH>;
-+					output-low;
-+					line-name = "can3_120R_load";
-+				};
-+				can3_rst {
-+					gpio-hog;
-+					gpios = <9 GPIO_ACTIVE_HIGH>;
-+					output-high;
-+					line-name = "can3_rst";
-+				};
-+			};
-+		};
-+
-+		i2c@3 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <3>;
-+			/* FPDLink output node - DS90UH947 */
-+		};
-+
-+		i2c@4 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <4>;
-+			/* BCM switch node */
-+		};
-+
-+		i2c@5 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <5>;
-+			/* LED board node(s) */
-+
-+			gpio_ext_led: pca9535@22 {
-+				compatible = "nxp,pca9535";
-+				reg = <0x22>;
-+				gpio-controller;
-+				#gpio-cells = <2>;
-+
-+				/* gpios 0..7 are used for indication LEDs, low-active */
-+			};
-+		};
-+
-+		i2c@6 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <6>;
-+			/* M2 connector i2c node(s) */
-+		};
-+
-+		/* port 7 is not used */
-+	};
-+};
-+
-+&pcie_bus_clk {
-+	clock-frequency = <100000000>;
-+	status = "okay";
-+};
-+
-+&pciec0 {
-+	status = "okay";
-+};
-+
-+&pciec1 {
-+	status = "okay";
-+};
-+
-+&vin0 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin0ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <0>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in0>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep0: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin0_max9286_des0ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep0>;
-+			};
-+			vin0_ti964_des0ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep0>;
-+			};
-+			vin0_ti954_des0ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin1 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin1ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <1>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in1>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep1: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin1_max9286_des0ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep1>;
-+			};
-+			vin1_ti964_des0ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep1>;
-+			};
-+			vin1_ti954_des0ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des0ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin2 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin2ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <2>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in2>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep2: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin2_max9286_des0ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep2>;
-+			};
-+			vin2_ti964_des0ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin3 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin3ep0: endpoint {
-+				csi,select = "csi40";
-+				virtual,channel = <3>;
-+				data-lanes = <1 2 3 4>;
-+				remote-endpoint = <&ov106xx_in3>;
-+			};
-+		};
-+		port@1 {
-+			csi0ep3: endpoint {
-+				remote-endpoint = <&csi2_40_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin3_max9286_des0ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des0ep3>;
-+			};
-+			vin3_ti964_des0ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des0ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi41";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in4>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des1ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep0>;
-+			};
-+			vin4_ti964_des1ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep0>;
-+			};
-+			vin4_ti954_des1ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in5>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des1ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep1>;
-+			};
-+			vin5_ti964_des1ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep1>;
-+			};
-+			vin5_ti954_des1ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des1ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in6>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des1ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep2>;
-+			};
-+			vin6_ti964_des1ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	status = "okay";
-+
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi41";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in7>;
-+				data-lanes = <1 2 3 4>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_41_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des1ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des1ep3>;
-+			};
-+			vin7_ti964_des1ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des1ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_40 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_40_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&csi2_41 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_41_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2 3 4>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
-+
-+&rcar_sound {
-+	pinctrl-0 = <&sound_clk_pins>;
-+
-+	/* Multi DAI */
-+	#sound-dai-cells = <1>;
-+};
-+
-+&sata {
-+	status = "okay";
-+};
-+
-+&ssi1 {
-+	/delete-property/shared-pin;
-+};
-+
-+&avb {
-+	/delete-property/phy-handle;
-+	/delete-property/phy-gpios;
-+	phy-mode = "rgmii";
-+
-+	/delete-node/ethernet-phy@0;
-+
-+	fixed-link {
-+		speed = <100>;
-+		full-duplex;
-+	};
-+};
-+
-+&msiof1 {
-+	status = "disabled";
-+};
-+
-+&usb2_phy0 {
-+	pinctrl-0 = <&usb0_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
-+&xhci0 {
-+	status = "okay";
-+};
-+
-+&hsusb0 {
-+	status = "okay";
-+};
-+
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&can0 {
-+	pinctrl-0 = <&can0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&can1 {
-+	pinctrl-0 = <&can1_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	renesas,can-clock-select = <0x0>;
-+};
-+
-+&canfd {
-+	pinctrl-0 = <&canfd0_pins &canfd1_pins>;
-+	pinctrl-names = "default";
-+	status = "disabled";
-+
-+	renesas,can-clock-select = <0x0>;
-+
-+	channel0 {
-+		status = "okay";
-+	};
-+
-+	channel1 {
-+		status = "okay";
-+	};
-+};
-+
-+/* uncomment to enable CN12 on VIN4-7 */
-+//#include "ulcb-vb-cn12.dtsi"
-diff --git a/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
-new file mode 100644
-index 0000000..9c6d10c
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
-@@ -0,0 +1,515 @@
-+/*
-+ * Device Tree Source for the H3ULCB Videobox board:
-+ *  this adding conflicting resource on VIN4/VIN5/VIN6/VIN7 for CN12
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+&i2cswitch2 {
-+	i2c@3 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <3>;
-+		/* Slot C (CN12) */
-+
-+		ov106xx@8 {
-+			compatible = "ovti,ov106xx";
-+			reg = <0x68>;
-+
-+			port@0 {
-+				ov106xx_in8: endpoint {
-+					clock-lanes = <0>;
-+					data-lanes = <1 2>;
-+					remote-endpoint = <&vin4ep0>;
-+				};
-+			};
-+			port@1 {
-+				ov106xx_max9286_des2ep0: endpoint@0 {
-+					remote-endpoint = <&max9286_des2ep0>;
-+				};
-+				ov106xx_ti964_des2ep0: endpoint@1 {
-+					remote-endpoint = <&ti964_des2ep0>;
-+				};
-+				ov106xx_ti954_des2ep0: endpoint@2 {
-+					remote-endpoint = <&ti954_des2ep0>;
-+				};
-+			};
-+		};
-+
-+		ov106xx@9 {
-+			compatible = "ovti,ov106xx";
-+			reg = <0x69>;
-+
-+			port@0 {
-+				ov106xx_in9: endpoint {
-+					clock-lanes = <0>;
-+					data-lanes = <1 2>;
-+					remote-endpoint = <&vin5ep0>;
-+				};
-+			};
-+			port@1 {
-+				ov106xx_max9286_des2ep1: endpoint@0 {
-+					remote-endpoint = <&max9286_des2ep1>;
-+				};
-+				ov106xx_ti964_des2ep1: endpoint@1 {
-+					remote-endpoint = <&ti964_des2ep1>;
-+				};
-+				ov106xx_ti954_des2ep1: endpoint@2 {
-+					remote-endpoint = <&ti954_des2ep1>;
-+				};
-+			};
-+		};
-+
-+		ov106xx@10 {
-+			compatible = "ovti,ov106xx";
-+			reg = <0x6a>;
-+
-+			port@0 {
-+				ov106xx_in10: endpoint {
-+					clock-lanes = <0>;
-+					data-lanes = <1 2>;
-+					remote-endpoint = <&vin6ep0>;
-+				};
-+			};
-+			port@1 {
-+				ov106xx_max9286_des2ep2: endpoint@0 {
-+					remote-endpoint = <&max9286_des2ep2>;
-+				};
-+				ov106xx_ti964_des2ep2: endpoint@1 {
-+					remote-endpoint = <&ti964_des2ep2>;
-+				};
-+			};
-+		};
-+
-+		ov106xx@11 {
-+			compatible = "ovti,ov106xx";
-+			reg = <0x6b>;
-+
-+			port@0 {
-+				ov106xx_in11: endpoint {
-+					clock-lanes = <0>;
-+					data-lanes = <1 2>;
-+					remote-endpoint = <&vin7ep0>;
-+				};
-+			};
-+			port@1 {
-+				ov106xx_max9286_des2ep3: endpoint@0 {
-+					remote-endpoint = <&max9286_des2ep3>;
-+				};
-+				ov106xx_ti964_des2ep3: endpoint@1 {
-+					remote-endpoint = <&ti964_des2ep3>;
-+				};
-+			};
-+		};
-+
-+		/* DS90UB964 @ 0x3a */
-+		ti964-ti9x3@2 {
-+			compatible = "ti,ti964-ti9x3";
-+			reg = <0x3a>;
-+			ti,sensor_delay = <350>;
-+			ti,links = <4>;
-+			ti,lanes = <2>;
-+			ti,forwarding-mode = "round-robin";
-+			ti,cable-mode = "coax";
-+
-+			port@0 {
-+				ti964_des2ep0: endpoint@0 {
-+					ti9x3-addr = <0x0c>;
-+					dvp-order = <0>;
-+					remote-endpoint = <&ov106xx_in8>;
-+				};
-+				ti964_des2ep1: endpoint@1 {
-+					ti9x3-addr = <0x0d>;
-+					dvp-order = <0>;
-+					remote-endpoint = <&ov106xx_in9>;
-+				};
-+				ti964_des2ep2: endpoint@2 {
-+					ti9x3-addr = <0x0e>;
-+					dvp-order = <0>;
-+					remote-endpoint = <&ov106xx_in10>;
-+				};
-+				ti964_des2ep3: endpoint@3 {
-+					ti9x3-addr = <0x0f>;
-+					dvp-order = <0>;
-+					remote-endpoint = <&ov106xx_in11>;
-+				};
-+			};
-+			port@1 {
-+				ti964_csi1ep0: endpoint {
-+					csi-rate = <1450>;
-+					remote-endpoint = <&csi2_20_ep>;
-+				};
-+			};
-+		};
-+
-+		/* DS90UB954 @ 0x38 */
-+		ti954-ti9x3@2 {
-+			compatible = "ti,ti954-ti9x3";
-+			reg = <0x38>;
-+			/* gpios = <&video_c_ext1 10 GPIO_ACTIVE_HIGH>; */
-+			ti,sensor_delay = <350>;
-+			ti,links = <2>;
-+			ti,lanes = <2>;
-+			ti,forwarding-mode = "round-robin";
-+			ti,cable-mode = "coax";
-+
-+			port@0 {
-+				ti954_des2ep0: endpoint@0 {
-+					ti9x3-addr = <0x0c>;
-+					dvp-order = <0>;
-+					remote-endpoint = <&ov106xx_in8>;
-+				};
-+				ti954_des2ep1: endpoint@1 {
-+					ti9x3-addr = <0x0d>;
-+					dvp-order = <0>;
-+					remote-endpoint = <&ov106xx_in9>;
-+				};
-+			};
-+			port@1 {
-+				ti954_csi1ep0: endpoint {
-+					csi-rate = <1450>;
-+					remote-endpoint = <&csi2_20_ep>;
-+				};
-+			};
-+		};
-+
-+		/* MAX9286 @ 0x2c */
-+		max9286-max9271@2 {
-+			compatible = "maxim,max9286-max9271";
-+			reg = <0x2c>;
-+			maxim,sensor_delay = <350>;
-+			maxim,links = <4>;
-+			maxim,lanes = <2>;
-+			maxim,resetb-gpio = <1>;
-+			maxim,fsync-mode = "automatic";
-+			maxim,timeout = <100>;
-+
-+			port@0 {
-+				max9286_des2ep0: endpoint@0 {
-+					max9271-addr = <0x50>;
-+					dvp-order = <1>;
-+					remote-endpoint = <&ov106xx_in8>;
-+				};
-+				max9286_des2ep1: endpoint@1 {
-+					max9271-addr = <0x51>;
-+					dvp-order = <1>;
-+					remote-endpoint = <&ov106xx_in9>;
-+				};
-+				max9286_des2ep2: endpoint@2 {
-+					max9271-addr = <0x52>;
-+					dvp-order = <1>;
-+					remote-endpoint = <&ov106xx_in10>;
-+				};
-+				max9286_des2ep3: endpoint@3 {
-+					max9271-addr = <0x53>;
-+					dvp-order = <1>;
-+					remote-endpoint = <&ov106xx_in11>;
-+				};
-+			};
-+			port@1 {
-+				max9286_csi1ep0: endpoint {
-+					csi-rate = <700>;
-+					remote-endpoint = <&csi2_20_ep>;
-+				};
-+			};
-+		};
-+	};
-+
-+	i2c@4 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <4>;
-+		/* Slot C (CN12) */
-+
-+		video_c_ext0: pca9535@26 {
-+			compatible = "nxp,pca9535";
-+			reg = <0x26>;
-+			gpio-controller;
-+			#gpio-cells = <2>;
-+
-+			video_c_des_cfg1 {
-+				gpio-hog;
-+				gpios = <5 GPIO_ACTIVE_HIGH>;
-+				input;
-+				line-name = "Video-C cfg1";
-+			};
-+			video_c_des_cfg0 {
-+				gpio-hog;
-+				gpios = <6 GPIO_ACTIVE_HIGH>;
-+				input;
-+				line-name = "Video-C cfg0";
-+			};
-+			video_c_pwr_shdn {
-+				gpio-hog;
-+				gpios = <3 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR_SHDN";
-+			};
-+			video_c_cam_pwr0 {
-+				gpio-hog;
-+				gpios = <12 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR0";
-+			};
-+			video_c_cam_pwr1 {
-+				gpio-hog;
-+				gpios = <13 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR1";
-+			};
-+			video_c_cam_pwr2 {
-+				gpio-hog;
-+				gpios = <14 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR2";
-+			};
-+			video_c_cam_pwr3 {
-+				gpio-hog;
-+				gpios = <15 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR3";
-+			};
-+			video_c_des_shdn {
-+				gpio-hog;
-+				gpios = <4 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C DES_SHDN";
-+			};
-+			video_c_des_led {
-+				gpio-hog;
-+				gpios = <7 GPIO_ACTIVE_HIGH>;
-+				output-low;
-+				line-name = "Video-C led";
-+			};
-+		};
-+
-+		video_c_ext1: max7325@5c {
-+			compatible = "maxim,max7325";
-+			reg = <0x5c>;
-+			gpio-controller;
-+			#gpio-cells = <2>;
-+
-+			video_c_des_cfg2 {
-+				gpio-hog;
-+				gpios = <4 GPIO_ACTIVE_HIGH>;
-+				input;
-+				line-name = "Video-C cfg2";
-+			};
-+			video_c_des_cfg1 {
-+				gpio-hog;
-+				gpios = <6 GPIO_ACTIVE_HIGH>;
-+				input;
-+				line-name = "Video-C cfg1";
-+			};
-+			video_c_des_cfg0 {
-+				gpio-hog;
-+				gpios = <7 GPIO_ACTIVE_HIGH>;
-+				input;
-+				line-name = "Video-C cfg0";
-+			};
-+			video_c_pwr_shdn {
-+				gpio-hog;
-+				gpios = <14 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR_SHDN";
-+			};
-+			video_c_cam_pwr0 {
-+				gpio-hog;
-+				gpios = <8 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR0";
-+			};
-+			video_c_cam_pwr1 {
-+				gpio-hog;
-+				gpios = <9 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR1";
-+			};
-+			video_c_cam_pwr2 {
-+				gpio-hog;
-+				gpios = <10 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR2";
-+			};
-+			video_c_cam_pwr3 {
-+				gpio-hog;
-+				gpios = <11 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C PWR3";
-+			};
-+			video_c_des_shdn {
-+				gpio-hog;
-+				gpios = <13 GPIO_ACTIVE_HIGH>;
-+				output-high;
-+				line-name = "Video-C DES_SHDN";
-+			};
-+			video_c_led {
-+				gpio-hog;
-+				gpios = <12 GPIO_ACTIVE_HIGH>;
-+				output-low;
-+				line-name = "Video-C LED";
-+			};
-+		};
-+	};
-+};
-+
-+&vin4 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin4ep0: endpoint {
-+				csi,select = "csi20";
-+				virtual,channel = <0>;
-+				remote-endpoint = <&ov106xx_in8>;
-+				data-lanes = <1 2>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep0: endpoint {
-+				remote-endpoint = <&csi2_20_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin4_max9286_des2ep0: endpoint@0 {
-+				remote-endpoint = <&max9286_des2ep0>;
-+			};
-+			vin4_ti964_des2ep0: endpoint@1 {
-+				remote-endpoint = <&ti964_des2ep0>;
-+			};
-+			vin4_ti954_des2ep0: endpoint@2 {
-+				remote-endpoint = <&ti954_des2ep0>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin5 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin5ep0: endpoint@0 {
-+				csi,select = "csi20";
-+				virtual,channel = <1>;
-+				remote-endpoint = <&ov106xx_in9>;
-+				data-lanes = <1 2>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep1: endpoint {
-+				remote-endpoint = <&csi2_20_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin5_max9286_des2ep1: endpoint@0 {
-+				remote-endpoint = <&max9286_des2ep1>;
-+			};
-+			vin5_ti964_des2ep1: endpoint@1 {
-+				remote-endpoint = <&ti964_des2ep1>;
-+			};
-+			vin5_ti954_des2ep1: endpoint@2 {
-+				remote-endpoint = <&ti954_des2ep1>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin6 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin6ep0: endpoint@0 {
-+				csi,select = "csi20";
-+				virtual,channel = <2>;
-+				remote-endpoint = <&ov106xx_in10>;
-+				data-lanes = <1 2>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep2: endpoint {
-+				remote-endpoint = <&csi2_20_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin6_max9286_des2ep2: endpoint@0 {
-+				remote-endpoint = <&max9286_des2ep2>;
-+			};
-+			vin6_ti964_des2ep2: endpoint@1 {
-+				remote-endpoint = <&ti964_des2ep2>;
-+			};
-+		};
-+	};
-+};
-+
-+&vin7 {
-+	ports {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		port@0 {
-+			vin7ep0: endpoint@0 {
-+				csi,select = "csi20";
-+				virtual,channel = <3>;
-+				remote-endpoint = <&ov106xx_in11>;
-+				data-lanes = <1 2>;
-+			};
-+		};
-+		port@1 {
-+			csi2ep3: endpoint {
-+				remote-endpoint = <&csi2_20_ep>;
-+			};
-+		};
-+		port@2 {
-+			vin7_max9286_des2ep3: endpoint@0 {
-+				remote-endpoint = <&max9286_des2ep3>;
-+			};
-+			vin7_ti964_des2ep3: endpoint@1 {
-+				remote-endpoint = <&ti964_des2ep3>;
-+			};
-+		};
-+	};
-+};
-+
-+&csi2_20 {
-+	status = "okay";
-+
-+	virtual,channel {
-+		csi2_vc0 {
-+			data,type = "ycbcr422";
-+			receive,vc = <0>;
-+		};
-+		csi2_vc1 {
-+			data,type = "ycbcr422";
-+			receive,vc = <1>;
-+		};
-+		csi2_vc2 {
-+			data,type = "ycbcr422";
-+			receive,vc = <2>;
-+		};
-+		csi2_vc3 {
-+			data,type = "ycbcr422";
-+			receive,vc = <3>;
-+		};
-+	};
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		csi2_20_ep: endpoint {
-+			clock-lanes = <0>;
-+			data-lanes = <1 2>;
-+			csi-rate = <300>;
-+		};
-+	};
-+};
--- 
-1.9.1
-
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/m3ulcb.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/m3ulcb.cfg
deleted file mode 100644
index 73008f1..0000000
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/m3ulcb.cfg
+++ /dev/null
@@ -1,65 +0,0 @@
-CONFIG_CAN=y
-CONFIG_CAN_PEAK_USB=y
-CONFIG_CAN_BCM=y
-CONFIG_CAN_RAW=y
-CONFIG_CAN_DEV=y
-CONFIG_CAN_CALC_BITTIMING=y
-CONFIG_CAN_RCAR=y
-CONFIG_CAN_RCAR_CANFD=y
-CONFIG_DUMMY=y
-CONFIG_EXTRA_FIRMWARE="r8a779x_usb3_v2.dlmem r8a779x_usb3_v3.dlmem"
-CONFIG_EXTRA_FIRMWARE_DIR="firmware"
-CONFIG_BLK_DEV_NVME=m
-CONFIG_SATA_ACARD_AHCI=y
-CONFIG_FIXED_PHY=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_GPIO=y
-CONFIG_GPIO_MAX732X=y
-CONFIG_GPIO_MAX732X_IRQ=y
-CONFIG_GPIO_PCA953X=y
-CONFIG_GPIO_PCA953X_IRQ=y
-CONFIG_VIDEO_ADV_DEBUG=y
-CONFIG_VIDEO_RCAR_VIN_LEGACY=y
-CONFIG_VIDEO_RCAR_CSI2_LEGACY=y
-# CONFIG_VIDEO_RCAR_VIN is not set
-# CONFIG_VIDEO_RCAR_CSI2 is not set
-CONFIG_SOC_CAMERA=y
-CONFIG_SOC_CAMERA_SCALE_CROP=y
-CONFIG_SOC_CAMERA_PLATFORM=y
-CONFIG_SOC_CAMERA_MAX9286_MAX9271=y
-CONFIG_SOC_CAMERA_TI964_TI9X3=y
-CONFIG_SOC_CAMERA_TI954_TI9X3=y
-CONFIG_SOC_CAMERA_OV106XX=y
-CONFIG_SOC_CAMERA_OV5647=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_PLATFORM=y
-CONFIG_USB_XHCI_RCAR=y
-CONFIG_USB_ACM=y
-CONFIG_VIDEO_RENESAS_IMR=y
-CONFIG_VIRTIO_RCAR_PCIE=y
-CONFIG_BT=y
-CONFIG_TI_ST=m
-CONFIG_BT_WILINK=m
-CONFIG_WEXT_CORE=y
-CONFIG_WEXT_PROC=y
-CONFIG_CFG80211_WEXT=y
-CONFIG_MAC80211=y
-CONFIG_WLAN=y
-CONFIG_WL18XX=m
-CONFIG_WLCORE=m
-CONFIG_WLCORE_SDIO=m
-CONFIG_SND_SOC_SI468X=y
-CONFIG_SND_SOC_PCM3168A=y
-CONFIG_SND_SOC_PCM3168A_I2C=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_PROPERTIES=y
-CONFIG_HID_MULTITOUCH=y
-CONFIG_IIO=y
-CONFIG_IIO_BUFFER=y
-CONFIG_IIO_BUFFER_CB=y
-CONFIG_IIO_KFIFO_BUF=y
-CONFIG_IIO_TRIGGERED_BUFFER=y
-CONFIG_IIO_TRIGGER=y
-CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
-CONFIG_LSM9DS0=y
-CONFIG_DRM_I2C_ADV7511=y
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/h3ulcb.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg
index 73008f1..73008f1 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/h3ulcb.cfg
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg