diff options
author | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2017-11-28 15:27:50 +0300 |
---|---|---|
committer | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2017-11-28 15:27:50 +0300 |
commit | c3ea8a26ced44cb1062846d601b5844027c8b417 (patch) | |
tree | 6d02c61b71fb201f96c30443da1d6b92bb56cea9 /meta-rcar-gen3-adas/recipes-kernel/linux | |
parent | 27ebba749e6177f41ad840c1b0377dd8007e0747 (diff) |
Add IMP
Diffstat (limited to 'meta-rcar-gen3-adas/recipes-kernel/linux')
7 files changed, 483 insertions, 0 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0049-clk-r8a779x-add-IMP-clock.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0049-clk-r8a779x-add-IMP-clock.patch new file mode 100644 index 0000000..a7cf942 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0049-clk-r8a779x-add-IMP-clock.patch @@ -0,0 +1,59 @@ +From 9075957822c829026acfb5e8982a77f895a7a640 Mon Sep 17 00:00:00 2001 +From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +Date: Mon, 27 Nov 2017 16:53:06 +0300 +Subject: [PATCH] clk: r8a779x: add IMP clock + +This adds IMP clock sources for Gen3 SoCs + +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +--- + drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + + drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + + drivers/clk/renesas/r8a7797-cpg-mssr.c | 7 +++++++ + 3 files changed, 9 insertions(+) + +diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c +index bc10df3..9061f7f 100644 +--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c +@@ -234,6 +234,7 @@ enum clk_ids { + DEF_MOD("imr2", 821, R8A7795_CLK_S2D1), + DEF_MOD("imr1", 822, R8A7795_CLK_S2D1), + DEF_MOD("imr0", 823, R8A7795_CLK_S2D1), ++ DEF_MOD("imp", 824, R8A7795_CLK_S1D1), + DEF_MOD("gpio7", 905, R8A7795_CLK_S3D4), + DEF_MOD("gpio6", 906, R8A7795_CLK_S3D4), + DEF_MOD("gpio5", 907, R8A7795_CLK_S3D4), +diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c +index 819d3c6..e886d8a 100644 +--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c +@@ -204,6 +204,7 @@ enum clk_ids { + DEF_MOD("vin1", 810, R8A7796_CLK_S0D2), + DEF_MOD("vin0", 811, R8A7796_CLK_S0D2), + DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6), ++ DEF_MOD("imp", 824, R8A7796_CLK_S1D1), + DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4), + DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4), + DEF_MOD("gpio5", 907, R8A7796_CLK_S3D4), +diff --git a/drivers/clk/renesas/r8a7797-cpg-mssr.c b/drivers/clk/renesas/r8a7797-cpg-mssr.c +index 29dfe4a..6655592 100644 +--- a/drivers/clk/renesas/r8a7797-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7797-cpg-mssr.c +@@ -129,6 +129,13 @@ enum clk_ids { + DEF_MOD("imr2", 821, R8A7797_CLK_S2D1), + DEF_MOD("imr1", 822, R8A7797_CLK_S2D1), + DEF_MOD("imr0", 823, R8A7797_CLK_S2D1), ++ DEF_MOD("imp3", 824, R8A7797_CLK_S1D1), ++ DEF_MOD("imp2", 825, R8A7797_CLK_S1D1), ++ DEF_MOD("imp1", 826, R8A7797_CLK_S1D1), ++ DEF_MOD("imp0", 827, R8A7797_CLK_S1D1), ++ DEF_MOD("imp-ocv1", 828, R8A7797_CLK_S1D1), ++ DEF_MOD("imp-ocv0", 829, R8A7797_CLK_S1D1), ++ DEF_MOD("impram", 830, R8A7797_CLK_S1D1), + DEF_MOD("gpio5", 907, R8A7797_CLK_CP), + DEF_MOD("gpio4", 908, R8A7797_CLK_CP), + DEF_MOD("gpio3", 909, R8A7797_CLK_CP), +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch new file mode 100644 index 0000000..316f182 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch @@ -0,0 +1,418 @@ +From 9dcc1345c0b04ebab6e5b9f676881716bf985753 Mon Sep 17 00:00:00 2001 +From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +Date: Tue, 28 Nov 2017 14:47:12 +0300 +Subject: [PATCH] arm64: dts: renesas: r8a779x: add IMP nodes + +This adds IMP resource nodes for Gen3 SoCs + +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +--- + arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 98 +++++++++++++++++++++++++++ + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 98 +++++++++++++++++++++++++++ + arch/arm64/boot/dts/renesas/r8a7796.dtsi | 62 +++++++++++++++++ + arch/arm64/boot/dts/renesas/r8a7797.dtsi | 99 ++++++++++++++++++++++++++++ + 4 files changed, 357 insertions(+) + +diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +index b3f3102..e15af8c 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +@@ -2794,6 +2794,104 @@ + }; + }; + ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp2 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff940000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <2>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp3 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff960000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <3>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc1 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff990000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <5>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsl0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff9c0000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <12>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xffa40000 0 0x20000>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imprtt { ++ compatible = "renesas,impx5-rtt"; ++ reg = <0 0xff8d0000 0 0x1000>, ++ <0 0xe6150000 0 0x1000>; ++ interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ + imrlx4_ch0: imr-lx4@fe860000 { + compatible = "renesas,imr-lx4"; + reg = <0 0xfe860000 0 0x2000>; +diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +index 02c5931..8ba4cec 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +@@ -2790,6 +2790,104 @@ + }; + }; + ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp2 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff940000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <2>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp3 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff960000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <3>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc1 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff990000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <5>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsl0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff9c0000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <12>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xffa40000 0 0x20000>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imprtt { ++ compatible = "renesas,impx5-rtt"; ++ reg = <0 0xff8d0000 0 0x1000>, ++ <0 0xe6150000 0 0x1000>; ++ interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ + imrlx4_ch0: imr-lx4@fe860000 { + compatible = "renesas,imr-lx4"; + reg = <0 0xfe860000 0 0x2000>; +diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +index b94d9e0..7c19f35 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +@@ -2531,5 +2531,67 @@ + }; + }; + }; ++ ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xffa40000 0 0x20000>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ imprtt { ++ compatible = "renesas,impx5-rtt"; ++ reg = <0 0xff8d0000 0 0x1000>, ++ <0 0xe6150000 0 0x1000>; ++ interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; + }; + }; +diff --git a/arch/arm64/boot/dts/renesas/r8a7797.dtsi b/arch/arm64/boot/dts/renesas/r8a7797.dtsi +index 1be93e8..232eb19 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7797.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7797.dtsi +@@ -970,6 +970,105 @@ + status = "okay"; + }; + ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 827>; ++ power-domains = <&sysc R8A7797_PD_A2IR0>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 826>; ++ power-domains = <&sysc R8A7797_PD_A2IR1>; ++ }; ++ ++ imp2 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff940000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <2>; ++ clocks = <&cpg CPG_MOD 825>; ++ power-domains = <&sysc R8A7797_PD_A2IR2>; ++ }; ++ ++ imp3 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff960000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <3>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7797_PD_A2IR3>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 829>; ++ power-domains = <&sysc R8A7797_PD_A2SC0>; ++ }; ++ ++ impsc1 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff990000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <5>; ++ clocks = <&cpg CPG_MOD 828>; ++ power-domains = <&sysc R8A7797_PD_A2SC1>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x1000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ ++ impdm1 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x1000>, ++ <0 0xffa10800 0 0x0800>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <17>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ ++ imppsc0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa20000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <12>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xed000000 0 0x100000>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ + imrlx4_ch0: imr-lx4@fe860000 { + compatible = "renesas,imr-lx4"; + reg = <0 0xfe860000 0 0x2000>; +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg index b856d48..9796ba5 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg @@ -26,3 +26,4 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y CONFIG_HID_MULTITOUCH=y CONFIG_SERIAL_SH_SCI_DMA=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg index 29425e5..a42b74c 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg @@ -29,3 +29,4 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y CONFIG_HID_MULTITOUCH=y CONFIG_SERIAL_SH_SCI_DMA=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg index b52636a..4e24c06 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg @@ -78,3 +78,4 @@ CONFIG_AIM_NETWORK=y CONFIG_AIM_SOUND=y CONFIG_AIM_V4L2=y CONFIG_HDM_DIM2=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg index 0d06354..211da49 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg @@ -30,3 +30,4 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y CONFIG_HID_MULTITOUCH=y CONFIG_SERIAL_SH_SCI_DMA=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend index c1b71e7..0b4d393 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend @@ -49,6 +49,8 @@ SRC_URI_append = " \ file://0046-arm64-dts-renesas-r8a779x-add-mlp-nodes.patch \ ${@base_conditional("KF_ENABLE_SD3", "1", " file://0047-arm64-dts-renesas-ulcb-kf-enable-sd3.patch", "", d)} \ ${@base_conditional("KF_ENABLE_MOST", "1", " file://0048-arm64-dts-renesas-ulcb-kf-enable-most.patch", "", d)} \ + file://0049-clk-r8a779x-add-IMP-clock.patch \ + file://0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE1", "1", " file://0050-arm64-dts-Gen3-view-boards-TYPE1-first-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_SECOND4_TYPE1", "1", " file://0051-arm64-dts-Gen3-view-boards-TYPE1-second-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE2", "1", " file://0052-arm64-dts-Gen3-view-boards-TYPE2-first-4-cameras.patch", "", d)} \ |