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authorVladimir Barinov <vladimir.barinov@cogentembedded.com>2017-11-09 10:33:26 +0300
committerVladimir Barinov <vladimir.barinov@cogentembedded.com>2017-11-09 10:33:26 +0300
commitf9e026dbff6e2d5ef11273cf6440bc60b49f95c2 (patch)
treecd596493b0c97ed4b7c0c3f1578690e36cabbce3 /meta-rcar-gen3-adas
parent07ee30966162b3a63f9d8cacdb748e5957ad9a83 (diff)
Videobox Mini support
1) V3MSK VideoBox Mini support 2) H3ULCB (es1.x, es2.0) Videobox Mini support 3) Optimize Videobox dts files
Diffstat (limited to 'meta-rcar-gen3-adas')
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch5841
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend4
2 files changed, 2390 insertions, 3455 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
index 75bf843..14a7b80 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
@@ -14,23 +14,25 @@ H3ULCB.HAD board on R8A7795 SoC
Kingfisher board on R8A7795 ES1.x SoC
Kingfisher board on R8A7795 SoC
Kingfisher board on R8A7796 SoC
+Kingfisher board on R8A7797 SoC
Videobox board on R8A7795 ES1.x SoC
Videobox board on R8A7795 SoC
Eagle board on R8A7797 SoC
V3MSK board on R8A7797 SoC
-Kingfisher board on R8A7797 SoC
-Videobox board on R8A7797 SoC
+Videobox Mini board on R8A7795 ES1.x SoC
+Videobox Mini board on R8A7795 SoC
+Videobox Mini board on R8A7797 SoC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
---
- arch/arm64/boot/dts/renesas/Makefile | 17 +
+ arch/arm64/boot/dts/renesas/Makefile | 18 +
arch/arm64/boot/dts/renesas/legacy/Makefile | 8 +
.../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1710 +++++++++++++++++++
.../renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts | 441 +++++
.../dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts | 1724 +++++++++++++++++++
- .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts | 465 +++++
- .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts | 1214 +++++++++++++
- .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts | 465 +++++
+ .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts | 465 ++++++
+ .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts | 1214 ++++++++++++++
+ .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts | 465 ++++++
.../dts/renesas/legacy/r8a7797-v3msk-kf-v0.dts | 20 +
.../boot/dts/renesas/legacy/ulcb-kf-cmos.dtsi | 75 +
.../arm64/boot/dts/renesas/legacy/ulcb-kf-rpi.dtsi | 77 +
@@ -38,29 +40,33 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
.../dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts | 23 +
.../boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi | 225 +++
.../boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 39 +
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts | 1787 ++++++++++++++++++++
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts | 546 ++++++
- .../dts/renesas/r8a7795-es1-salvator-x-view.dts | 552 ++++++
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts | 69 +
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts | 26 +
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts | 546 +++++++
+ .../dts/renesas/r8a7795-es1-salvator-x-view.dts | 552 +++++++
.../boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts | 22 +
.../boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts | 23 +
.../arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi | 219 +++
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts | 39 +
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts | 1787 ++++++++++++++++++++
- .../arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts | 546 ++++++
- .../boot/dts/renesas/r8a7795-salvator-x-view.dts | 552 ++++++
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts | 68 +
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts | 26 +
+ .../arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts | 546 +++++++
+ .../boot/dts/renesas/r8a7795-salvator-x-view.dts | 552 +++++++
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts | 40 +
.../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts | 287 ++++
.../boot/dts/renesas/r8a7796-salvator-x-view.dts | 318 ++++
- arch/arm64/boot/dts/renesas/r8a7797-eagle.dts | 561 ++++++
+ arch/arm64/boot/dts/renesas/r8a7797-eagle.dts | 561 +++++++
arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts | 578 +++++++
- arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts | 498 ++++++
+ arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts | 498 ++++++
arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts | 320 ++++
arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi | 518 ++++++
arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi | 30 +
arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi | 46 +
arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 1529 +++++++++++++++++
arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi | 515 ++++++
- 37 files changed, 17838 insertions(+)
+ arch/arm64/boot/dts/renesas/ulcb-vb.dtsi | 1726 ++++++++++++++++++++
+ arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi | 557 +++++++
+ 41 files changed, 16737 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/legacy/Makefile
create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts
@@ -76,6 +82,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
@@ -83,6 +90,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
@@ -90,19 +98,21 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-eagle.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
+ create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb.dtsi
+ create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 32fb4d9..52d783b 100644
+index 32fb4d9..26d258d2 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -4,5 +4,22 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+@@ -4,5 +4,23 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
@@ -115,10 +125,11 @@ index 32fb4d9..52d783b 100644
+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf.dtb
+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vb.dtb r8a7795-es1-h3ulcb-vb.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vbm.dtb r8a7795-es1-h3ulcb-vbm.dtb
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-eagle.dtb
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk.dtb
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-kf.dtb
-+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vb.dtb
++dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vbm.dtb
+
+# ADAS legacy boards
+subdir-y := legacy
@@ -6719,10 +6730,10 @@ index 0000000..849afae
+//#include "ulcb-kf-cn11.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
new file mode 100644
-index 0000000..e5734aa
+index 0000000..549a717
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
-@@ -0,0 +1,1787 @@
+@@ -0,0 +1,69 @@
+/*
+ * Device Tree Source for the H3ULCB Videobox board on r8a7795 ES1.x
+ *
@@ -6735,170 +6746,11 @@ index 0000000..e5734aa
+ */
+
+#include "r8a7795-es1-h3ulcb.dts"
++#include "ulcb-vb.dtsi"
+
+/ {
+ model = "Renesas H3ULCB Videobox board based on r8a7795";
+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ led5 {
-+ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
-+ };
-+ led6 {
-+ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
-+ };
-+ /* D13 - status 0 */
-+ led_ext00 {
-+ gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>;
-+ /* linux,default-trigger = "heartbeat"; */
-+ };
-+ /* D14 - status 1 */
-+ led_ext01 {
-+ gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>;
-+ /* linux,default-trigger = "mmc1"; */
-+ };
-+ /* D16 - HDMI1 */
-+ led_ext02 {
-+ gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D18 - HDMI0 */
-+ led_ext03 {
-+ gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D20 - USB3.0 - 0.1 */
-+ led_ext04 {
-+ gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D21 - USB3.0 - 0.2 */
-+ led_ext05 {
-+ gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D24 - USB3.0 - 1.1 */
-+ led6_ext06 {
-+ gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D25 - USB3.0 - 1.2 */
-+ led_ext07 {
-+ gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>;
-+ };
-+ };
-+
-+ snd_clk: snd_clk {
-+ compatible = "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <24576000>;
-+ clock-output-names = "scki";
-+ };
-+
-+ vccq_sdhi3: regulator@5 {
-+ compatible = "regulator-fixed";
-+
-+ regulator-name = "SDHI3 VccQ";
-+ /* external voltage translator to 1.8V */
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ fpdlink_switch: regulator@8 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "fpdlink_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio1 20 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ hub_reset: regulator@9 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "hub_reset";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio5 5 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ hub_power: regulator@10 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "hub_power";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio6 28 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ /delete-node/sound;
-+
-+ rsnd_ak4613: sound@0 {
-+ pinctrl-0 = <&sound_0_pins>;
-+ pinctrl-names = "default";
-+ compatible = "simple-audio-card";
-+
-+ simple-audio-card,format = "left_j";
-+ simple-audio-card,name = "ak4613";
-+
-+ simple-audio-card,bitclock-master = <&sndcpu>;
-+ simple-audio-card,frame-master = <&sndcpu>;
-+
-+ sndcpu: simple-audio-card,cpu@1 {
-+ sound-dai = <&rcar_sound>;
-+ };
-+
-+ sndcodec: simple-audio-card,codec@1 {
-+ sound-dai = <&ak4613>;
-+ };
-+ };
-+
-+ lvds-encoder {
-+ compatible = "thine,thc63lvdm83d";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ port@0 {
-+ reg = <0>;
-+ lvds_enc_in: endpoint {
-+ remote-endpoint = <&du_out_lvds0>;
-+ };
-+ };
-+ port@1 {
-+ reg = <1>;
-+ lvds_enc_out: endpoint {
-+ remote-endpoint = <&lvds_in>;
-+ };
-+ };
-+ };
-+ };
-+
-+ lvds {
-+ compatible = "lvds-connector";
-+
-+ width-mm = <210>;
-+ height-mm = <158>;
-+
-+ panel-timing {
-+ /* 1280x800 @60Hz */
-+ clock-frequency = <65000000>;
-+ hactive = <1280>;
-+ vactive = <800>;
-+ hsync-len = <40>;
-+ hfront-porch = <80>;
-+ hback-porch = <40>;
-+ vfront-porch = <14>;
-+ vback-porch = <14>;
-+ vsync-len = <4>;
-+ };
-+
-+ port {
-+ lvds_in: endpoint {
-+ remote-endpoint = <&lvds_enc_out>;
-+ };
-+ };
-+ };
-+
+ hdmi1-out {
+ compatible = "hdmi-connector";
+ type = "a";
@@ -6909,76 +6761,10 @@ index 0000000..e5734aa
+ };
+ };
+ };
-+
-+ excan_ref_clk: excan-ref-clock {
-+ compatible = "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <16000000>;
-+ };
-+
-+ radio: si468x@0 {
-+ compatible = "si,si468x-pcm";
-+ status = "okay";
-+
-+ #sound-dai-cells = <0>;
-+ };
-+
-+ spi_gpio_sw {
-+ compatible = "spi-gpio";
-+ #address-cells = <0x1>;
-+ #size-cells = <0x0>;
-+ gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-+ gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>;
-+ gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>;
-+ cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-+ num-chipselects = <1>;
-+
-+ spidev: spidev@0 {
-+ compatible = "spidev", "spi-gpio";
-+ reg = <0>;
-+ spi-max-frequency = <25000000>;
-+ spi-cpha;
-+ spi-cpol;
-+ };
-+ };
-+
-+ spi_gpio_can {
-+ compatible = "spi-gpio";
-+ #address-cells = <0x1>;
-+ #size-cells = <0x0>;
-+ gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-+ gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>;
-+ gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>;
-+ cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
-+ &gpio1 4 GPIO_ACTIVE_HIGH>;
-+ num-chipselects = <2>;
-+
-+ spican0: spidev@0 {
-+ compatible = "microchip,mcp2515";
-+ reg = <0>;
-+ clocks = <&excan_ref_clk>;
-+ interrupt-parent = <&gpio0>;
-+ interrupts = <15 GPIO_ACTIVE_LOW>;
-+ spi-max-frequency = <10000000>;
-+ };
-+ spican1: spidev@1 {
-+ compatible = "microchip,mcp2515";
-+ reg = <1>;
-+ clocks = <&excan_ref_clk>;
-+ interrupt-parent = <&gpio1>;
-+ interrupts = <5 GPIO_ACTIVE_LOW>;
-+ spi-max-frequency = <10000000>;
-+ };
-+ };
+};
+
+&du {
+ ports {
-+ port@1 {
-+ endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi0_in>;
-+ };
-+ };
+ port@2 {
+ endpoint {
+ remote-endpoint = <&rcar_dw_hdmi1_in>;
@@ -6998,6 +6784,7 @@ index 0000000..e5734aa
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
++
+ port@0 {
+ reg = <0>;
+ rcar_dw_hdmi1_in: endpoint {
@@ -7013,1503 +6800,41 @@ index 0000000..e5734aa
+ };
+};
+
-+&pfc {
-+ hscif4_pins: hscif4 {
-+ groups = "hscif4_data_a", "hscif4_ctrl";
-+ function = "hscif4";
-+ };
-+
-+ sdhi3_pins_3v3: sd3_3v3 {
-+ groups = "sdhi3_data4", "sdhi3_ctrl";
-+ function = "sdhi3";
-+ power-source = <3300>;
-+ };
-+
-+ /delete-node/sound;
-+
-+ sound_0_pins: sound1 {
-+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
-+ function = "ssi";
-+ };
-+
-+ usb0_pins: usb0 {
-+ groups = "usb0";
-+ function = "usb0";
-+ };
-+
-+ can0_pins: can0 {
-+ groups = "can0_data_a";
-+ function = "can0";
-+ };
-+
-+ can1_pins: can1 {
-+ groups = "can1_data";
-+ function = "can1";
-+ };
-+
-+ canfd0_pins: canfd0 {
-+ groups = "canfd0_data_a";
-+ function = "canfd0";
-+ };
-+
-+ canfd1_pins: canfd1 {
-+ groups = "canfd1_data";
-+ function = "canfd1";
-+ };
-+};
-+
-+&gpio0 {
-+ video_a_irq {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A irq";
-+ };
-+
-+ video_b_irq {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B irq";
-+ };
-+
-+ video_c_irq {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-C irq";
-+ };
-+};
-+
-+&gpio1 {
-+ gpioext_4_22_irq {
-+ gpio-hog;
-+ gpios = <25 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x22@i2c4 irq";
-+ };
-+ pcie_disable {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "mPCIe W_DISABLE";
-+ };
-+ m2_sleep {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 SLEEP#";
-+ };
-+ m2_pres {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 Present";
-+ };
-+ m2_pcie_det {
-+ gpio-hog;
-+ gpios = <18 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 PCIe detected";
-+ };
-+ m2_usb_det {
-+ gpio-hog;
-+ gpios = <19 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 USB30 detected";
-+ };
-+ m2_usb_det {
-+ gpio-hog;
-+ gpios = <27 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 SSD detected";
-+ };
-+ eth_phy_reset {
-+ gpio-hog;
-+ gpios = <16 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "BR phy reset";
-+ };
-+ eth_sw_reset {
-+ gpio-hog;
-+ gpios = <17 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "BR switch reset";
-+ };
-+};
-+
-+&gpio2 {
-+ m2_wake {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 WAKE#";
-+ };
-+ m2_pcie_en {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 PCIe enable";
-+ };
-+};
-+
-+&gpio3 {
-+ m2_power_off {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 FULL_CARD_POWER_OFF#";
-+ };
-+};
-+
-+&gpio6 {
-+ pcie_wake {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe WAKE#";
-+ };
-+ pcie_clkreq {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe CLKREQ#";
-+ };
-+ m2_rst {
-+ gpio-hog;
-+ gpios = <21 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 RESET#";
-+ };
-+};
-+
-+&hscif4 {
-+ pinctrl-0 = <&hscif4_pins>;
-+ pinctrl-names = "default";
-+ uart-has-rtscts;
-+
-+ status = "okay";
-+};
-+
-+&i2c2 {
-+ clock-frequency = <400000>;
-+
-+ i2cswitch2: pca9548@74 {
-+ compatible = "nxp,pca9548";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
-+
-+ i2c@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ /* USB3.0 HUB node(s) */
-+ };
-+
-+ i2c@6 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <6>;
-+ /* PCIe node(s) */
-+ };
-+
-+ i2c@7 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <7>;
-+ /* Slot A (CN10) */
-+
-+ ov106xx@0 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x60>;
-+
-+ port@0 {
-+ ov106xx_in0: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin0ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep0>;
-+ };
-+ ov106xx_ti964_des0ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep0>;
-+ };
-+ ov106xx_ti954_des0ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep0>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@1 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x61>;
-+
-+ port@0 {
-+ ov106xx_in1: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin1ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep1>;
-+ };
-+ ov106xx_ti964_des0ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep1>;
-+ };
-+ ov106xx_ti954_des0ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep1>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@2 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x62>;
-+
-+ port@0 {
-+ ov106xx_in2: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin2ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep2>;
-+ };
-+ ov106xx_ti964_des0ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep2>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@3 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x63>;
-+
-+ port@0 {
-+ ov106xx_in3: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin3ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep3>;
-+ };
-+ ov106xx_ti964_des0ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep3>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB964 @ 0x3a */
-+ ti964-ti9x3@0 {
-+ compatible = "ti,ti964-ti9x3";
-+ reg = <0x3a>;
-+ ti,sensor_delay = <350>;
-+ ti,links = <4>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti964_des0ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ ti964_des0ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ ti964_des0ep2: endpoint@2 {
-+ ti9x3-addr = <0x0e>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in2>;
-+ };
-+ ti964_des0ep3: endpoint@3 {
-+ ti9x3-addr = <0x0f>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in3>;
-+ };
-+ };
-+ port@1 {
-+ ti964_csi0ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB954 @ 0x38 */
-+ ti954-ti9x3@0 {
-+ compatible = "ti,ti954-ti9x3";
-+ reg = <0x38>;
-+ /* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
-+ ti,sensor_delay = <350>;
-+ ti,links = <2>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti954_des0ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ ti954_des0ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ };
-+ port@1 {
-+ ti954_csi0ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ };
-+
-+ /* MAX9286 @ 0x2c */
-+ max9286-max9271@0 {
-+ compatible = "maxim,max9286-max9271";
-+ reg = <0x2c>;
-+ maxim,sensor_delay = <350>;
-+ maxim,links = <4>;
-+ maxim,lanes = <4>;
-+ maxim,resetb-gpio = <1>;
-+ maxim,fsync-mode = "automatic";
-+ maxim,timeout = <100>;
-+
-+ port@0 {
-+ max9286_des0ep0: endpoint@0 {
-+ max9271-addr = <0x50>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ max9286_des0ep1: endpoint@1 {
-+ max9271-addr = <0x51>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ max9286_des0ep2: endpoint@2 {
-+ max9271-addr = <0x52>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in2>;
-+ };
-+ max9286_des0ep3: endpoint@3 {
-+ max9271-addr = <0x53>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in3>;
-+ };
-+ };
-+ port@1 {
-+ max9286_csi0ep0: endpoint {
-+ csi-rate = <700>;
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ };
-+ };
-+
-+ i2c@2 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <2>;
-+ /* Slot B (CN11) */
-+
-+ ov106xx@4 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x64>;
-+
-+ port@0 {
-+ ov106xx_in4: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin4ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep0>;
-+ };
-+ ov106xx_ti964_des1ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep0>;
-+ };
-+ ov106xx_ti954_des1ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep0>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@5 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x65>;
-+
-+ port@0 {
-+ ov106xx_in5: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin5ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep1>;
-+ };
-+ ov106xx_ti964_des1ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep1>;
-+ };
-+ ov106xx_ti954_des1ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep1>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@6 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x66>;
-+
-+ port@0 {
-+ ov106xx_in6: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin6ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep2>;
-+ };
-+ ov106xx_ti964_des1ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep2>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@7 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x67>;
-+
-+ port@0 {
-+ ov106xx_in7: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin7ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep3>;
-+ };
-+ ov106xx_ti964_des1ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep3>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB964 @ 0x3a */
-+ ti964-ti9x3@1 {
-+ compatible = "ti,ti964-ti9x3";
-+ reg = <0x3a>;
-+ ti,sensor_delay = <350>;
-+ ti,links = <4>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti964_des1ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ };
-+ ti964_des1ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ };
-+ ti964_des1ep2: endpoint@2 {
-+ ti9x3-addr = <0x0e>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in6>;
-+ };
-+ ti964_des1ep3: endpoint@3 {
-+ ti9x3-addr = <0x0f>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in7>;
-+ };
-+ };
-+ port@1 {
-+ ti964_csi2ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB954 @ 0x38 */
-+ ti954-ti9x3@1 {
-+ compatible = "ti,ti954-ti9x3";
-+ reg = <0x38>;
-+ /* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
-+ ti,sensor_delay = <350>;
-+ ti,links = <2>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti954_des1ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ };
-+ ti954_des1ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ };
-+ };
-+ port@1 {
-+ ti954_csi2ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ };
-+
-+ /* MAX9286 @ 0x2c */
-+ max9286-max9271@1 {
-+ compatible = "maxim,max9286-max9271";
-+ reg = <0x2c>;
-+ maxim,sensor_delay = <350>;
-+ maxim,links = <4>;
-+ maxim,lanes = <4>;
-+ maxim,resetb-gpio = <1>;
-+ maxim,fsync-mode = "automatic";
-+ maxim,timeout = <100>;
-+
-+ port@0 {
-+ max9286_des1ep0: endpoint@0 {
-+ max9271-addr = <0x50>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ };
-+ max9286_des1ep1: endpoint@1 {
-+ max9271-addr = <0x51>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ };
-+ max9286_des1ep2: endpoint@2 {
-+ max9271-addr = <0x52>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in6>;
-+ };
-+ max9286_des1ep3: endpoint@3 {
-+ max9271-addr = <0x53>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in7>;
-+ };
-+ };
-+ port@1 {
-+ max9286_csi2ep0: endpoint {
-+ csi-rate = <700>;
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ };
-+ };
-+
-+ i2c@3 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <3>;
-+ /* Slot C (CN12) */
-+ };
-+
-+ i2c@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <1>;
-+ /* Slot A (CN10) */
-+
-+ video_a_ext0: pca9535@26 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x26>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_a_des_cfg1 {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg1";
-+ };
-+ video_a_des_cfg0 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg0";
-+ };
-+ video_a_pwr_shdn {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR_SHDN";
-+ };
-+ video_a_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR0";
-+ };
-+ video_a_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR1";
-+ };
-+ video_a_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR2";
-+ };
-+ video_a_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR3";
-+ };
-+ video_a_des_shdn {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A DES_SHDN";
-+ };
-+ video_a_des_led {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-A led";
-+ };
-+ };
-+
-+ video_a_ext1: max7325@5c {
-+ compatible = "maxim,max7325";
-+ reg = <0x5c>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_a_des_cfg2 {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg2";
-+ };
-+ video_a_des_cfg1 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg1";
-+ };
-+ video_a_des_cfg0 {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg0";
-+ };
-+ video_a_pwr_shdn {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR_SHDN";
-+ };
-+ video_a_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR0";
-+ };
-+ video_a_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR1";
-+ };
-+ video_a_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR2";
-+ };
-+ video_a_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR3";
-+ };
-+ video_a_des_shdn {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A DES_SHDN";
-+ };
-+ video_a_led {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-A LED";
-+ };
-+ };
-+ };
-+
-+ i2c@5 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <5>;
-+ /* Slot B (CN11) */
-+
-+ video_b_ext0: pca9535@26 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x26>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_b_des_cfg1 {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg1";
-+ };
-+ video_b_des_cfg0 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg0";
-+ };
-+ video_b_pwr_shdn {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR_SHDN";
-+ };
-+ video_b_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR0";
-+ };
-+ video_b_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR1";
-+ };
-+ video_b_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR2";
-+ };
-+ video_b_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR3";
-+ };
-+ video_b_des_shdn {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B DES_SHDN";
-+ };
-+ video_b_des_led {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-B led";
-+ };
-+ };
-+
-+ video_b_ext1: max7325@5c {
-+ compatible = "maxim,max7325";
-+ reg = <0x5c>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_b_des_cfg2 {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg2";
-+ };
-+ video_b_des_cfg1 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg1";
-+ };
-+ video_b_des_cfg0 {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg0";
-+ };
-+ video_b_pwr_shdn {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR_SHDN";
-+ };
-+ video_b_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR0";
-+ };
-+ video_b_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR1";
-+ };
-+ video_b_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR2";
-+ };
-+ video_b_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR3";
-+ };
-+ video_b_des_shdn {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B DES_SHDN";
-+ };
-+ video_b_led {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-B LED";
-+ };
-+ };
-+ };
-+
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+ /* Slot C (CN12) */
-+ };
-+ };
-+};
-+
-+&i2c4 {
-+ i2cswitch4: pca9548@74 {
-+ compatible = "nxp,pca9548";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>;
-+
-+ i2c@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ /* FAN node - EMC2103 */
-+ fan_ctrl:ecm2103@2e {
-+ compatible = "emc2103";
-+ reg = <0x2e>;
-+ };
-+ };
-+
-+ i2c@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <1>;
-+ /* Power nodes - 2 x TPS544x20 */
-+ };
-+
-+ i2c@2 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <2>;
-+ /* CAN and power board nodes */
-+
-+ gpio_ext_pwr: pca9535@22 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x22>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio1>;
-+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+
-+ /* enable input DCDC after wake-up signal released */
-+ pwr_hold {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "pwr_hold";
-+ };
-+
-+ /* CAN0 */
-+ can0_stby {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can0_stby";
-+ };
-+ can0_load {
-+ gpio-hog;
-+ gpios = <0 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can0_120R_load";
-+ };
-+ /* CAN1 */
-+ can1_stby {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can1_stby";
-+ };
-+ can1_load {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can1_120R_load";
-+ };
-+ /* CAN2 */
-+ can2_stby {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can2_stby";
-+ };
-+ can2_load {
-+ gpio-hog;
-+ gpios = <2 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can2_120R_load";
-+ };
-+ can2_rst {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "can2_rst";
-+ };
-+ /* CAN3 */
-+ can3_stby {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can3_stby";
-+ };
-+ can3_load {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can3_120R_load";
-+ };
-+ can3_rst {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "can3_rst";
-+ };
-+ };
-+ };
-+
-+ i2c@3 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <3>;
-+ /* FPDLink output node - DS90UH947 */
-+ };
-+
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+ /* BCM switch node */
-+ };
-+
-+ i2c@5 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <5>;
-+ /* LED board node(s) */
-+
-+ gpio_ext_led: pca9535@22 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x22>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ /* gpios 0..7 are used for indication LEDs, low-active */
-+ };
-+ };
-+
-+ i2c@6 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <6>;
-+ /* M2 connector i2c node(s) */
-+ };
-+
-+ /* port 7 is not used */
-+ };
-+};
-+
-+&pcie_bus_clk {
-+ clock-frequency = <100000000>;
-+ status = "okay";
-+};
-+
-+&pciec0 {
-+ status = "okay";
-+};
-+
-+&pciec1 {
-+ status = "okay";
-+};
-+
-+&vin0 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin0ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep0: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin0_max9286_des0ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep0>;
-+ };
-+ vin0_ti964_des0ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep0>;
-+ };
-+ vin0_ti954_des0ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep0>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin1 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin1ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <1>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep1: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin1_max9286_des0ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep1>;
-+ };
-+ vin1_ti964_des0ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep1>;
-+ };
-+ vin1_ti954_des0ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep1>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin2 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin2ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <2>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in2>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep2: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin2_max9286_des0ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep2>;
-+ };
-+ vin2_ti964_des0ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep2>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin3 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin3ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <3>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in3>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep3: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin3_max9286_des0ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep3>;
-+ };
-+ vin3_ti964_des0ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep3>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin4 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin4ep0: endpoint {
-+ csi,select = "csi41";
-+ virtual,channel = <0>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep0: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin4_max9286_des1ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep0>;
-+ };
-+ vin4_ti964_des1ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep0>;
-+ };
-+ vin4_ti954_des1ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep0>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin5 {
++&hsusb {
+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin5ep0: endpoint@0 {
-+ csi,select = "csi41";
-+ virtual,channel = <1>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep1: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin5_max9286_des1ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep1>;
-+ };
-+ vin5_ti964_des1ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep1>;
-+ };
-+ vin5_ti954_des1ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep1>;
-+ };
-+ };
-+ };
+};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts
+new file mode 100644
+index 0000000..323722c
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vbm.dts
+@@ -0,0 +1,26 @@
++/*
++ * Device Tree Source for the H3ULCB Videobox Mini board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
+
-+&vin6 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
++#include "r8a7795-es1-h3ulcb.dts"
++#include "ulcb-vbm.dtsi"
+
-+ port@0 {
-+ vin6ep0: endpoint@0 {
-+ csi,select = "csi41";
-+ virtual,channel = <2>;
-+ remote-endpoint = <&ov106xx_in6>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep2: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin6_max9286_des1ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep2>;
-+ };
-+ vin6_ti964_des1ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep2>;
-+ };
-+ };
-+ };
++/ {
++ model = "Renesas H3ULCB Videobox Mini board based on r8a7795";
+};
+
-+&vin7 {
-+ status = "okay";
-+
++&du {
+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin7ep0: endpoint@0 {
-+ csi,select = "csi41";
-+ virtual,channel = <3>;
-+ remote-endpoint = <&ov106xx_in7>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep3: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin7_max9286_des1ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep3>;
-+ };
-+ vin7_ti964_des1ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep3>;
++ port@3 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
+ };
+ };
+ };
+};
-+
-+&csi2_40 {
-+ status = "okay";
-+
-+ virtual,channel {
-+ csi2_vc0 {
-+ data,type = "ycbcr422";
-+ receive,vc = <0>;
-+ };
-+ csi2_vc1 {
-+ data,type = "ycbcr422";
-+ receive,vc = <1>;
-+ };
-+ csi2_vc2 {
-+ data,type = "ycbcr422";
-+ receive,vc = <2>;
-+ };
-+ csi2_vc3 {
-+ data,type = "ycbcr422";
-+ receive,vc = <3>;
-+ };
-+ };
-+
-+ port {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ csi2_40_ep: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ csi-rate = <300>;
-+ };
-+ };
-+};
-+
-+&csi2_41 {
-+ status = "okay";
-+
-+ virtual,channel {
-+ csi2_vc0 {
-+ data,type = "ycbcr422";
-+ receive,vc = <0>;
-+ };
-+ csi2_vc1 {
-+ data,type = "ycbcr422";
-+ receive,vc = <1>;
-+ };
-+ csi2_vc2 {
-+ data,type = "ycbcr422";
-+ receive,vc = <2>;
-+ };
-+ csi2_vc3 {
-+ data,type = "ycbcr422";
-+ receive,vc = <3>;
-+ };
-+ };
-+
-+ port {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ csi2_41_ep: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ csi-rate = <300>;
-+ };
-+ };
-+};
-+
-+&rcar_sound {
-+ pinctrl-0 = <&sound_clk_pins>;
-+
-+ /* Multi DAI */
-+ #sound-dai-cells = <1>;
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-+
-+&ssi1 {
-+ /delete-property/shared-pin;
-+};
-+
-+&avb {
-+ /delete-property/phy-handle;
-+ /delete-property/phy-gpios;
-+ phy-mode = "rgmii";
-+
-+ /delete-node/ethernet-phy@0;
-+
-+ fixed-link {
-+ speed = <100>;
-+ full-duplex;
-+ };
-+};
-+
-+&msiof1 {
-+ status = "disabled";
-+};
-+
-+&usb2_phy0 {
-+ pinctrl-0 = <&usb0_pins>;
-+ pinctrl-names = "default";
-+
-+ status = "okay";
-+};
-+
-+&xhci0 {
-+ status = "okay";
-+};
-+
-+&hsusb {
-+ status = "okay";
-+};
-+
-+&ehci0 {
-+ status = "okay";
-+};
-+
-+&ohci0 {
-+ status = "okay";
-+};
-+
-+&can0 {
-+ pinctrl-0 = <&can0_pins>;
-+ pinctrl-names = "default";
-+ status = "okay";
-+
-+ renesas,can-clock-select = <0x0>;
-+};
-+
-+&can1 {
-+ pinctrl-0 = <&can1_pins>;
-+ pinctrl-names = "default";
-+ status = "okay";
-+
-+ renesas,can-clock-select = <0x0>;
-+};
-+
-+&canfd {
-+ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
-+ pinctrl-names = "default";
-+ status = "disabled";
-+
-+ renesas,can-clock-select = <0x0>;
-+
-+ channel0 {
-+ status = "okay";
-+ };
-+
-+ channel1 {
-+ status = "okay";
-+ };
-+};
-+
-+/* uncomment to enable CN12 on VIN4-7 */
-+//#include "ulcb-vb-cn12.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
new file mode 100644
index 0000000..de56fa4
@@ -9949,14 +8274,13 @@ index 0000000..4fe67f8
+//#include "ulcb-kf-cn11.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
new file mode 100644
-index 0000000..98b6a08
+index 0000000..330bba2
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
-@@ -0,0 +1,1787 @@
+@@ -0,0 +1,68 @@
+/*
-+ * Device Tree Source for the H3ULCB Videobox board
++ * Device Tree Source for the H3ULCB Videobox board on r8a7795
+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
@@ -9965,170 +8289,11 @@ index 0000000..98b6a08
+ */
+
+#include "r8a7795-h3ulcb.dts"
++#include "ulcb-vb.dtsi"
+
+/ {
+ model = "Renesas H3ULCB Videobox board based on r8a7795";
+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ led5 {
-+ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
-+ };
-+ led6 {
-+ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
-+ };
-+ /* D13 - status 0 */
-+ led_ext00 {
-+ gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>;
-+ /* linux,default-trigger = "heartbeat"; */
-+ };
-+ /* D14 - status 1 */
-+ led_ext01 {
-+ gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>;
-+ /* linux,default-trigger = "mmc1"; */
-+ };
-+ /* D16 - HDMI1 */
-+ led_ext02 {
-+ gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D18 - HDMI0 */
-+ led_ext03 {
-+ gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D20 - USB3.0 - 0.1 */
-+ led_ext04 {
-+ gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D21 - USB3.0 - 0.2 */
-+ led_ext05 {
-+ gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D24 - USB3.0 - 1.1 */
-+ led6_ext06 {
-+ gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>;
-+ };
-+ /* D25 - USB3.0 - 1.2 */
-+ led_ext07 {
-+ gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>;
-+ };
-+ };
-+
-+ snd_clk: snd_clk {
-+ compatible = "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <24576000>;
-+ clock-output-names = "scki";
-+ };
-+
-+ vccq_sdhi3: regulator@5 {
-+ compatible = "regulator-fixed";
-+
-+ regulator-name = "SDHI3 VccQ";
-+ /* external voltage translator to 1.8V */
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ fpdlink_switch: regulator@8 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "fpdlink_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio1 20 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ hub_reset: regulator@9 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "hub_reset";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio5 5 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ hub_power: regulator@10 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "hub_power";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio6 28 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ /delete-node/sound;
-+
-+ rsnd_ak4613: sound@0 {
-+ pinctrl-0 = <&sound_0_pins>;
-+ pinctrl-names = "default";
-+ compatible = "simple-audio-card";
-+
-+ simple-audio-card,format = "left_j";
-+ simple-audio-card,name = "ak4613";
-+
-+ simple-audio-card,bitclock-master = <&sndcpu>;
-+ simple-audio-card,frame-master = <&sndcpu>;
-+
-+ sndcpu: simple-audio-card,cpu@1 {
-+ sound-dai = <&rcar_sound>;
-+ };
-+
-+ sndcodec: simple-audio-card,codec@1 {
-+ sound-dai = <&ak4613>;
-+ };
-+ };
-+
-+ lvds-encoder {
-+ compatible = "thine,thc63lvdm83d";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ port@0 {
-+ reg = <0>;
-+ lvds_enc_in: endpoint {
-+ remote-endpoint = <&du_out_lvds0>;
-+ };
-+ };
-+ port@1 {
-+ reg = <1>;
-+ lvds_enc_out: endpoint {
-+ remote-endpoint = <&lvds_in>;
-+ };
-+ };
-+ };
-+ };
-+
-+ lvds {
-+ compatible = "lvds-connector";
-+
-+ width-mm = <210>;
-+ height-mm = <158>;
-+
-+ panel-timing {
-+ /* 1280x800 @60Hz */
-+ clock-frequency = <65000000>;
-+ hactive = <1280>;
-+ vactive = <800>;
-+ hsync-len = <40>;
-+ hfront-porch = <80>;
-+ hback-porch = <40>;
-+ vfront-porch = <14>;
-+ vback-porch = <14>;
-+ vsync-len = <4>;
-+ };
-+
-+ port {
-+ lvds_in: endpoint {
-+ remote-endpoint = <&lvds_enc_out>;
-+ };
-+ };
-+ };
-+
+ hdmi1-out {
+ compatible = "hdmi-connector";
+ type = "a";
@@ -10139,76 +8304,10 @@ index 0000000..98b6a08
+ };
+ };
+ };
-+
-+ excan_ref_clk: excan-ref-clock {
-+ compatible = "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <16000000>;
-+ };
-+
-+ radio: si468x@0 {
-+ compatible = "si,si468x-pcm";
-+ status = "okay";
-+
-+ #sound-dai-cells = <0>;
-+ };
-+
-+ spi_gpio_sw {
-+ compatible = "spi-gpio";
-+ #address-cells = <0x1>;
-+ #size-cells = <0x0>;
-+ gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-+ gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>;
-+ gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>;
-+ cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-+ num-chipselects = <1>;
-+
-+ spidev: spidev@0 {
-+ compatible = "spidev", "spi-gpio";
-+ reg = <0>;
-+ spi-max-frequency = <25000000>;
-+ spi-cpha;
-+ spi-cpol;
-+ };
-+ };
-+
-+ spi_gpio_can {
-+ compatible = "spi-gpio";
-+ #address-cells = <0x1>;
-+ #size-cells = <0x0>;
-+ gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-+ gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>;
-+ gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>;
-+ cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
-+ &gpio1 4 GPIO_ACTIVE_HIGH>;
-+ num-chipselects = <2>;
-+
-+ spican0: spidev@0 {
-+ compatible = "microchip,mcp2515";
-+ reg = <0>;
-+ clocks = <&excan_ref_clk>;
-+ interrupt-parent = <&gpio0>;
-+ interrupts = <15 GPIO_ACTIVE_LOW>;
-+ spi-max-frequency = <10000000>;
-+ };
-+ spican1: spidev@1 {
-+ compatible = "microchip,mcp2515";
-+ reg = <1>;
-+ clocks = <&excan_ref_clk>;
-+ interrupt-parent = <&gpio1>;
-+ interrupts = <5 GPIO_ACTIVE_LOW>;
-+ spi-max-frequency = <10000000>;
-+ };
-+ };
+};
+
+&du {
+ ports {
-+ port@1 {
-+ endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi0_in>;
-+ };
-+ };
+ port@2 {
+ endpoint {
+ remote-endpoint = <&rcar_dw_hdmi1_in>;
@@ -10228,6 +8327,7 @@ index 0000000..98b6a08
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
++
+ port@0 {
+ reg = <0>;
+ rcar_dw_hdmi1_in: endpoint {
@@ -10243,1503 +8343,41 @@ index 0000000..98b6a08
+ };
+};
+
-+&pfc {
-+ hscif4_pins: hscif4 {
-+ groups = "hscif4_data_a", "hscif4_ctrl";
-+ function = "hscif4";
-+ };
-+
-+ sdhi3_pins_3v3: sd3_3v3 {
-+ groups = "sdhi3_data4", "sdhi3_ctrl";
-+ function = "sdhi3";
-+ power-source = <3300>;
-+ };
-+
-+ /delete-node/sound;
-+
-+ sound_0_pins: sound1 {
-+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
-+ function = "ssi";
-+ };
-+
-+ usb0_pins: usb0 {
-+ groups = "usb0";
-+ function = "usb0";
-+ };
-+
-+ can0_pins: can0 {
-+ groups = "can0_data_a";
-+ function = "can0";
-+ };
-+
-+ can1_pins: can1 {
-+ groups = "can1_data";
-+ function = "can1";
-+ };
-+
-+ canfd0_pins: canfd0 {
-+ groups = "canfd0_data_a";
-+ function = "canfd0";
-+ };
-+
-+ canfd1_pins: canfd1 {
-+ groups = "canfd1_data";
-+ function = "canfd1";
-+ };
-+};
-+
-+&gpio0 {
-+ video_a_irq {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A irq";
-+ };
-+
-+ video_b_irq {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B irq";
-+ };
-+
-+ video_c_irq {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-C irq";
-+ };
-+};
-+
-+&gpio1 {
-+ gpioext_4_22_irq {
-+ gpio-hog;
-+ gpios = <25 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x22@i2c4 irq";
-+ };
-+ pcie_disable {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "mPCIe W_DISABLE";
-+ };
-+ m2_sleep {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 SLEEP#";
-+ };
-+ m2_pres {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 Present";
-+ };
-+ m2_pcie_det {
-+ gpio-hog;
-+ gpios = <18 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 PCIe detected";
-+ };
-+ m2_usb_det {
-+ gpio-hog;
-+ gpios = <19 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 USB30 detected";
-+ };
-+ m2_usb_det {
-+ gpio-hog;
-+ gpios = <27 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 SSD detected";
-+ };
-+ eth_phy_reset {
-+ gpio-hog;
-+ gpios = <16 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "BR phy reset";
-+ };
-+ eth_sw_reset {
-+ gpio-hog;
-+ gpios = <17 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "BR switch reset";
-+ };
-+};
-+
-+&gpio2 {
-+ m2_wake {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "M.2 WAKE#";
-+ };
-+ m2_pcie_en {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 PCIe enable";
-+ };
-+};
-+
-+&gpio3 {
-+ m2_power_off {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 FULL_CARD_POWER_OFF#";
-+ };
-+};
-+
-+&gpio6 {
-+ pcie_wake {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe WAKE#";
-+ };
-+ pcie_clkreq {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe CLKREQ#";
-+ };
-+ m2_rst {
-+ gpio-hog;
-+ gpios = <21 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "M.2 RESET#";
-+ };
-+};
-+
-+&hscif4 {
-+ pinctrl-0 = <&hscif4_pins>;
-+ pinctrl-names = "default";
-+ uart-has-rtscts;
-+
-+ status = "okay";
-+};
-+
-+&i2c2 {
-+ clock-frequency = <400000>;
-+
-+ i2cswitch2: pca9548@74 {
-+ compatible = "nxp,pca9548";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
-+
-+ i2c@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ /* USB3.0 HUB node(s) */
-+ };
-+
-+ i2c@6 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <6>;
-+ /* PCIe node(s) */
-+ };
-+
-+ i2c@7 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <7>;
-+ /* Slot A (CN10) */
-+
-+ ov106xx@0 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x60>;
-+
-+ port@0 {
-+ ov106xx_in0: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin0ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep0>;
-+ };
-+ ov106xx_ti964_des0ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep0>;
-+ };
-+ ov106xx_ti954_des0ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep0>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@1 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x61>;
-+
-+ port@0 {
-+ ov106xx_in1: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin1ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep1>;
-+ };
-+ ov106xx_ti964_des0ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep1>;
-+ };
-+ ov106xx_ti954_des0ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep1>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@2 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x62>;
-+
-+ port@0 {
-+ ov106xx_in2: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin2ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep2>;
-+ };
-+ ov106xx_ti964_des0ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep2>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@3 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x63>;
-+
-+ port@0 {
-+ ov106xx_in3: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin3ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des0ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep3>;
-+ };
-+ ov106xx_ti964_des0ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep3>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB964 @ 0x3a */
-+ ti964-ti9x3@0 {
-+ compatible = "ti,ti964-ti9x3";
-+ reg = <0x3a>;
-+ ti,sensor_delay = <350>;
-+ ti,links = <4>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti964_des0ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ ti964_des0ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ ti964_des0ep2: endpoint@2 {
-+ ti9x3-addr = <0x0e>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in2>;
-+ };
-+ ti964_des0ep3: endpoint@3 {
-+ ti9x3-addr = <0x0f>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in3>;
-+ };
-+ };
-+ port@1 {
-+ ti964_csi0ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB954 @ 0x38 */
-+ ti954-ti9x3@0 {
-+ compatible = "ti,ti954-ti9x3";
-+ reg = <0x38>;
-+ /* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
-+ ti,sensor_delay = <350>;
-+ ti,links = <2>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti954_des0ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ ti954_des0ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ };
-+ port@1 {
-+ ti954_csi0ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ };
-+
-+ /* MAX9286 @ 0x2c */
-+ max9286-max9271@0 {
-+ compatible = "maxim,max9286-max9271";
-+ reg = <0x2c>;
-+ maxim,sensor_delay = <350>;
-+ maxim,links = <4>;
-+ maxim,lanes = <4>;
-+ maxim,resetb-gpio = <1>;
-+ maxim,fsync-mode = "automatic";
-+ maxim,timeout = <100>;
-+
-+ port@0 {
-+ max9286_des0ep0: endpoint@0 {
-+ max9271-addr = <0x50>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ max9286_des0ep1: endpoint@1 {
-+ max9271-addr = <0x51>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ max9286_des0ep2: endpoint@2 {
-+ max9271-addr = <0x52>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in2>;
-+ };
-+ max9286_des0ep3: endpoint@3 {
-+ max9271-addr = <0x53>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in3>;
-+ };
-+ };
-+ port@1 {
-+ max9286_csi0ep0: endpoint {
-+ csi-rate = <700>;
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ };
-+ };
-+
-+ i2c@2 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <2>;
-+ /* Slot B (CN11) */
-+
-+ ov106xx@4 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x64>;
-+
-+ port@0 {
-+ ov106xx_in4: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin4ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep0>;
-+ };
-+ ov106xx_ti964_des1ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep0>;
-+ };
-+ ov106xx_ti954_des1ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep0>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@5 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x65>;
-+
-+ port@0 {
-+ ov106xx_in5: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin5ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep1>;
-+ };
-+ ov106xx_ti964_des1ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep1>;
-+ };
-+ ov106xx_ti954_des1ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep1>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@6 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x66>;
-+
-+ port@0 {
-+ ov106xx_in6: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin6ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep2>;
-+ };
-+ ov106xx_ti964_des1ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep2>;
-+ };
-+ };
-+ };
-+
-+ ov106xx@7 {
-+ compatible = "ovti,ov106xx";
-+ reg = <0x67>;
-+
-+ port@0 {
-+ ov106xx_in7: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&vin7ep0>;
-+ };
-+ };
-+ port@1 {
-+ ov106xx_max9286_des1ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep3>;
-+ };
-+ ov106xx_ti964_des1ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep3>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB964 @ 0x3a */
-+ ti964-ti9x3@1 {
-+ compatible = "ti,ti964-ti9x3";
-+ reg = <0x3a>;
-+ ti,sensor_delay = <350>;
-+ ti,links = <4>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti964_des1ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ };
-+ ti964_des1ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ };
-+ ti964_des1ep2: endpoint@2 {
-+ ti9x3-addr = <0x0e>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in6>;
-+ };
-+ ti964_des1ep3: endpoint@3 {
-+ ti9x3-addr = <0x0f>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in7>;
-+ };
-+ };
-+ port@1 {
-+ ti964_csi2ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ };
-+
-+ /* DS90UB954 @ 0x38 */
-+ ti954-ti9x3@1 {
-+ compatible = "ti,ti954-ti9x3";
-+ reg = <0x38>;
-+ /* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
-+ ti,sensor_delay = <350>;
-+ ti,links = <2>;
-+ ti,lanes = <4>;
-+ ti,forwarding-mode = "round-robin";
-+ ti,cable-mode = "stp";
-+
-+ port@0 {
-+ ti954_des1ep0: endpoint@0 {
-+ ti9x3-addr = <0x0c>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ };
-+ ti954_des1ep1: endpoint@1 {
-+ ti9x3-addr = <0x0d>;
-+ dvp-order = <0>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ };
-+ };
-+ port@1 {
-+ ti954_csi2ep0: endpoint {
-+ csi-rate = <1450>;
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ };
-+
-+ /* MAX9286 @ 0x2c */
-+ max9286-max9271@1 {
-+ compatible = "maxim,max9286-max9271";
-+ reg = <0x2c>;
-+ maxim,sensor_delay = <350>;
-+ maxim,links = <4>;
-+ maxim,lanes = <4>;
-+ maxim,resetb-gpio = <1>;
-+ maxim,fsync-mode = "automatic";
-+ maxim,timeout = <100>;
-+
-+ port@0 {
-+ max9286_des1ep0: endpoint@0 {
-+ max9271-addr = <0x50>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ };
-+ max9286_des1ep1: endpoint@1 {
-+ max9271-addr = <0x51>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ };
-+ max9286_des1ep2: endpoint@2 {
-+ max9271-addr = <0x52>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in6>;
-+ };
-+ max9286_des1ep3: endpoint@3 {
-+ max9271-addr = <0x53>;
-+ dvp-order = <1>;
-+ remote-endpoint = <&ov106xx_in7>;
-+ };
-+ };
-+ port@1 {
-+ max9286_csi2ep0: endpoint {
-+ csi-rate = <700>;
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ };
-+ };
-+
-+ i2c@3 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <3>;
-+ /* Slot C (CN12) */
-+ };
-+
-+ i2c@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <1>;
-+ /* Slot A (CN10) */
-+
-+ video_a_ext0: pca9535@26 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x26>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_a_des_cfg1 {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg1";
-+ };
-+ video_a_des_cfg0 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg0";
-+ };
-+ video_a_pwr_shdn {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR_SHDN";
-+ };
-+ video_a_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR0";
-+ };
-+ video_a_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR1";
-+ };
-+ video_a_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR2";
-+ };
-+ video_a_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR3";
-+ };
-+ video_a_des_shdn {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A DES_SHDN";
-+ };
-+ video_a_des_led {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-A led";
-+ };
-+ };
-+
-+ video_a_ext1: max7325@5c {
-+ compatible = "maxim,max7325";
-+ reg = <0x5c>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_a_des_cfg2 {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg2";
-+ };
-+ video_a_des_cfg1 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg1";
-+ };
-+ video_a_des_cfg0 {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A cfg0";
-+ };
-+ video_a_pwr_shdn {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR_SHDN";
-+ };
-+ video_a_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR0";
-+ };
-+ video_a_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR1";
-+ };
-+ video_a_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR2";
-+ };
-+ video_a_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A PWR3";
-+ };
-+ video_a_des_shdn {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A DES_SHDN";
-+ };
-+ video_a_led {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-A LED";
-+ };
-+ };
-+ };
-+
-+ i2c@5 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <5>;
-+ /* Slot B (CN11) */
-+
-+ video_b_ext0: pca9535@26 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x26>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_b_des_cfg1 {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg1";
-+ };
-+ video_b_des_cfg0 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg0";
-+ };
-+ video_b_pwr_shdn {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR_SHDN";
-+ };
-+ video_b_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR0";
-+ };
-+ video_b_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR1";
-+ };
-+ video_b_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR2";
-+ };
-+ video_b_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR3";
-+ };
-+ video_b_des_shdn {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B DES_SHDN";
-+ };
-+ video_b_des_led {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-B led";
-+ };
-+ };
-+
-+ video_b_ext1: max7325@5c {
-+ compatible = "maxim,max7325";
-+ reg = <0x5c>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ video_b_des_cfg2 {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg2";
-+ };
-+ video_b_des_cfg1 {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg1";
-+ };
-+ video_b_des_cfg0 {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B cfg0";
-+ };
-+ video_b_pwr_shdn {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR_SHDN";
-+ };
-+ video_b_cam_pwr0 {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR0";
-+ };
-+ video_b_cam_pwr1 {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR1";
-+ };
-+ video_b_cam_pwr2 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR2";
-+ };
-+ video_b_cam_pwr3 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B PWR3";
-+ };
-+ video_b_des_shdn {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B DES_SHDN";
-+ };
-+ video_b_led {
-+ gpio-hog;
-+ gpios = <12 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-B LED";
-+ };
-+ };
-+ };
-+
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+ /* Slot C (CN12) */
-+ };
-+ };
-+};
-+
-+&i2c4 {
-+ i2cswitch4: pca9548@74 {
-+ compatible = "nxp,pca9548";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>;
-+
-+ i2c@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ /* FAN node - EMC2103 */
-+ fan_ctrl:ecm2103@2e {
-+ compatible = "emc2103";
-+ reg = <0x2e>;
-+ };
-+ };
-+
-+ i2c@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <1>;
-+ /* Power nodes - 2 x TPS544x20 */
-+ };
-+
-+ i2c@2 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <2>;
-+ /* CAN and power board nodes */
-+
-+ gpio_ext_pwr: pca9535@22 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x22>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio1>;
-+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+
-+ /* enable input DCDC after wake-up signal released */
-+ pwr_hold {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "pwr_hold";
-+ };
-+
-+ /* CAN0 */
-+ can0_stby {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can0_stby";
-+ };
-+ can0_load {
-+ gpio-hog;
-+ gpios = <0 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can0_120R_load";
-+ };
-+ /* CAN1 */
-+ can1_stby {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can1_stby";
-+ };
-+ can1_load {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can1_120R_load";
-+ };
-+ /* CAN2 */
-+ can2_stby {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can2_stby";
-+ };
-+ can2_load {
-+ gpio-hog;
-+ gpios = <2 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can2_120R_load";
-+ };
-+ can2_rst {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "can2_rst";
-+ };
-+ /* CAN3 */
-+ can3_stby {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can3_stby";
-+ };
-+ can3_load {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "can3_120R_load";
-+ };
-+ can3_rst {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "can3_rst";
-+ };
-+ };
-+ };
-+
-+ i2c@3 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <3>;
-+ /* FPDLink output node - DS90UH947 */
-+ };
-+
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+ /* BCM switch node */
-+ };
-+
-+ i2c@5 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <5>;
-+ /* LED board node(s) */
-+
-+ gpio_ext_led: pca9535@22 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x22>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+
-+ /* gpios 0..7 are used for indication LEDs, low-active */
-+ };
-+ };
-+
-+ i2c@6 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <6>;
-+ /* M2 connector i2c node(s) */
-+ };
-+
-+ /* port 7 is not used */
-+ };
-+};
-+
-+&pcie_bus_clk {
-+ clock-frequency = <100000000>;
-+ status = "okay";
-+};
-+
-+&pciec0 {
-+ status = "okay";
-+};
-+
-+&pciec1 {
-+ status = "okay";
-+};
-+
-+&vin0 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin0ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <0>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in0>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep0: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin0_max9286_des0ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep0>;
-+ };
-+ vin0_ti964_des0ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep0>;
-+ };
-+ vin0_ti954_des0ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep0>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin1 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin1ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <1>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in1>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep1: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin1_max9286_des0ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep1>;
-+ };
-+ vin1_ti964_des0ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep1>;
-+ };
-+ vin1_ti954_des0ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des0ep1>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin2 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin2ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <2>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in2>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep2: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin2_max9286_des0ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep2>;
-+ };
-+ vin2_ti964_des0ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep2>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin3 {
++&hsusb0 {
+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin3ep0: endpoint {
-+ csi,select = "csi40";
-+ virtual,channel = <3>;
-+ data-lanes = <1 2 3 4>;
-+ remote-endpoint = <&ov106xx_in3>;
-+ };
-+ };
-+ port@1 {
-+ csi0ep3: endpoint {
-+ remote-endpoint = <&csi2_40_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin3_max9286_des0ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des0ep3>;
-+ };
-+ vin3_ti964_des0ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des0ep3>;
-+ };
-+ };
-+ };
+};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts
+new file mode 100644
+index 0000000..87f1889
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vbm.dts
+@@ -0,0 +1,26 @@
++/*
++ * Device Tree Source for the H3ULCB Videobox Mini board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
+
-+&vin4 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin4ep0: endpoint {
-+ csi,select = "csi41";
-+ virtual,channel = <0>;
-+ remote-endpoint = <&ov106xx_in4>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep0: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin4_max9286_des1ep0: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep0>;
-+ };
-+ vin4_ti964_des1ep0: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep0>;
-+ };
-+ vin4_ti954_des1ep0: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep0>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin5 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin5ep0: endpoint@0 {
-+ csi,select = "csi41";
-+ virtual,channel = <1>;
-+ remote-endpoint = <&ov106xx_in5>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep1: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin5_max9286_des1ep1: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep1>;
-+ };
-+ vin5_ti964_des1ep1: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep1>;
-+ };
-+ vin5_ti954_des1ep1: endpoint@2 {
-+ remote-endpoint = <&ti954_des1ep1>;
-+ };
-+ };
-+ };
-+};
-+
-+&vin6 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
++#include "r8a7795-h3ulcb.dts"
++#include "ulcb-vbm.dtsi"
+
-+ port@0 {
-+ vin6ep0: endpoint@0 {
-+ csi,select = "csi41";
-+ virtual,channel = <2>;
-+ remote-endpoint = <&ov106xx_in6>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep2: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin6_max9286_des1ep2: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep2>;
-+ };
-+ vin6_ti964_des1ep2: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep2>;
-+ };
-+ };
-+ };
++/ {
++ model = "Renesas H3ULCB Videobox Mini board based on r8a7795";
+};
+
-+&vin7 {
-+ status = "okay";
-+
++&du {
+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin7ep0: endpoint@0 {
-+ csi,select = "csi41";
-+ virtual,channel = <3>;
-+ remote-endpoint = <&ov106xx_in7>;
-+ data-lanes = <1 2 3 4>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep3: endpoint {
-+ remote-endpoint = <&csi2_41_ep>;
-+ };
-+ };
-+ port@2 {
-+ vin7_max9286_des1ep3: endpoint@0 {
-+ remote-endpoint = <&max9286_des1ep3>;
-+ };
-+ vin7_ti964_des1ep3: endpoint@1 {
-+ remote-endpoint = <&ti964_des1ep3>;
++ port@3 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
+ };
+ };
+ };
+};
-+
-+&csi2_40 {
-+ status = "okay";
-+
-+ virtual,channel {
-+ csi2_vc0 {
-+ data,type = "ycbcr422";
-+ receive,vc = <0>;
-+ };
-+ csi2_vc1 {
-+ data,type = "ycbcr422";
-+ receive,vc = <1>;
-+ };
-+ csi2_vc2 {
-+ data,type = "ycbcr422";
-+ receive,vc = <2>;
-+ };
-+ csi2_vc3 {
-+ data,type = "ycbcr422";
-+ receive,vc = <3>;
-+ };
-+ };
-+
-+ port {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ csi2_40_ep: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ csi-rate = <300>;
-+ };
-+ };
-+};
-+
-+&csi2_41 {
-+ status = "okay";
-+
-+ virtual,channel {
-+ csi2_vc0 {
-+ data,type = "ycbcr422";
-+ receive,vc = <0>;
-+ };
-+ csi2_vc1 {
-+ data,type = "ycbcr422";
-+ receive,vc = <1>;
-+ };
-+ csi2_vc2 {
-+ data,type = "ycbcr422";
-+ receive,vc = <2>;
-+ };
-+ csi2_vc3 {
-+ data,type = "ycbcr422";
-+ receive,vc = <3>;
-+ };
-+ };
-+
-+ port {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ csi2_41_ep: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2 3 4>;
-+ csi-rate = <300>;
-+ };
-+ };
-+};
-+
-+&rcar_sound {
-+ pinctrl-0 = <&sound_clk_pins>;
-+
-+ /* Multi DAI */
-+ #sound-dai-cells = <1>;
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-+
-+&ssi1 {
-+ /delete-property/shared-pin;
-+};
-+
-+&avb {
-+ /delete-property/phy-handle;
-+ /delete-property/phy-gpios;
-+ phy-mode = "rgmii";
-+
-+ /delete-node/ethernet-phy@0;
-+
-+ fixed-link {
-+ speed = <100>;
-+ full-duplex;
-+ };
-+};
-+
-+&msiof1 {
-+ status = "disabled";
-+};
-+
-+&usb2_phy0 {
-+ pinctrl-0 = <&usb0_pins>;
-+ pinctrl-names = "default";
-+
-+ status = "okay";
-+};
-+
-+&xhci0 {
-+ status = "okay";
-+};
-+
-+&hsusb0 {
-+ status = "okay";
-+};
-+
-+&ehci0 {
-+ status = "okay";
-+};
-+
-+&ohci0 {
-+ status = "okay";
-+};
-+
-+&can0 {
-+ pinctrl-0 = <&can0_pins>;
-+ pinctrl-names = "default";
-+ status = "okay";
-+
-+ renesas,can-clock-select = <0x0>;
-+};
-+
-+&can1 {
-+ pinctrl-0 = <&can1_pins>;
-+ pinctrl-names = "default";
-+ status = "okay";
-+
-+ renesas,can-clock-select = <0x0>;
-+};
-+
-+&canfd {
-+ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
-+ pinctrl-names = "default";
-+ status = "disabled";
-+
-+ renesas,can-clock-select = <0x0>;
-+
-+ channel0 {
-+ status = "okay";
-+ };
-+
-+ channel1 {
-+ status = "okay";
-+ };
-+};
-+
-+/* uncomment to enable CN12 on VIN4-7 */
-+//#include "ulcb-vb-cn12.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
new file mode 100644
index 0000000..2c24b85
@@ -14664,14 +11302,14 @@ index 0000000..979cebe
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts
+diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts
new file mode 100644
-index 0000000..1b531d8
+index 0000000..28a0b92
--- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vbm.dts
@@ -0,0 +1,498 @@
+/*
-+ * Device Tree Source for the V3MSK Videobox board on r8a7797
++ * Device Tree Source for the V3MSK Videobox Mini board on r8a7797
+ *
+ * Copyright (C) 2017 Cogent Embedded, Inc.
+ *
@@ -14683,7 +11321,7 @@ index 0000000..1b531d8
+#include "r8a7797-v3msk.dts"
+
+/ {
-+ model = "Renesas V3MSK Videobox board based on r8a7797";
++ model = "Renesas V3MSK Videobox Mini board based on r8a7797";
+
+ aliases {
+ serial1 = &scif3;
@@ -18162,6 +14800,2301 @@ index 0000000..92ed4a4
+ };
+ };
+};
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-vb.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vb.dtsi
+new file mode 100644
+index 0000000..193153e
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/ulcb-vb.dtsi
+@@ -0,0 +1,1726 @@
++/*
++ * Device Tree Source for the ULCB Videobox board
++ *
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/ {
++ leds {
++ compatible = "gpio-leds";
++
++ led5 {
++ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
++ };
++ led6 {
++ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
++ };
++ /* D13 - status 0 */
++ led_ext00 {
++ gpios = <&gpio_ext_led 0 GPIO_ACTIVE_LOW>;
++ /* linux,default-trigger = "heartbeat"; */
++ };
++ /* D14 - status 1 */
++ led_ext01 {
++ gpios = <&gpio_ext_led 1 GPIO_ACTIVE_LOW>;
++ /* linux,default-trigger = "mmc1"; */
++ };
++ /* D16 - HDMI1 */
++ led_ext02 {
++ gpios = <&gpio_ext_led 2 GPIO_ACTIVE_LOW>;
++ };
++ /* D18 - HDMI0 */
++ led_ext03 {
++ gpios = <&gpio_ext_led 3 GPIO_ACTIVE_LOW>;
++ };
++ /* D20 - USB3.0 - 0.1 */
++ led_ext04 {
++ gpios = <&gpio_ext_led 4 GPIO_ACTIVE_LOW>;
++ };
++ /* D21 - USB3.0 - 0.2 */
++ led_ext05 {
++ gpios = <&gpio_ext_led 5 GPIO_ACTIVE_LOW>;
++ };
++ /* D24 - USB3.0 - 1.1 */
++ led6_ext06 {
++ gpios = <&gpio_ext_led 6 GPIO_ACTIVE_LOW>;
++ };
++ /* D25 - USB3.0 - 1.2 */
++ led_ext07 {
++ gpios = <&gpio_ext_led 7 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ snd_clk: snd_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <24576000>;
++ clock-output-names = "scki";
++ };
++
++ vccq_sdhi3: regulator@5 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 VccQ";
++ /* external voltage translator to 1.8V */
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ fpdlink_switch: regulator@8 {
++ compatible = "regulator-fixed";
++ regulator-name = "fpdlink_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio1 20 0>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ hub_reset: regulator@9 {
++ compatible = "regulator-fixed";
++ regulator-name = "hub_reset";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio5 5 0>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ hub_power: regulator@10 {
++ compatible = "regulator-fixed";
++ regulator-name = "hub_power";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio6 28 0>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ /delete-node/sound;
++
++ rsnd_ak4613: sound@0 {
++ pinctrl-0 = <&sound_0_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "left_j";
++ simple-audio-card,name = "ak4613";
++
++ simple-audio-card,bitclock-master = <&sndcpu>;
++ simple-audio-card,frame-master = <&sndcpu>;
++
++ sndcpu: simple-audio-card,cpu@1 {
++ sound-dai = <&rcar_sound>;
++ };
++
++ sndcodec: simple-audio-card,codec@1 {
++ sound-dai = <&ak4613>;
++ };
++ };
++
++ lvds-encoder {
++ compatible = "thine,thc63lvdm83d";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ port@0 {
++ reg = <0>;
++ lvds_enc_in: endpoint {
++ remote-endpoint = <&du_out_lvds0>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ lvds_enc_out: endpoint {
++ remote-endpoint = <&lvds_in>;
++ };
++ };
++ };
++ };
++
++ lvds {
++ compatible = "lvds-connector";
++
++ width-mm = <210>;
++ height-mm = <158>;
++
++ panel-timing {
++ /* 1280x800 @60Hz */
++ clock-frequency = <65000000>;
++ hactive = <1280>;
++ vactive = <800>;
++ hsync-len = <40>;
++ hfront-porch = <80>;
++ hback-porch = <40>;
++ vfront-porch = <14>;
++ vback-porch = <14>;
++ vsync-len = <4>;
++ };
++
++ port {
++ lvds_in: endpoint {
++ remote-endpoint = <&lvds_enc_out>;
++ };
++ };
++ };
++
++ excan_ref_clk: excan-ref-clock {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <16000000>;
++ };
++
++ radio: si468x@0 {
++ compatible = "si,si468x-pcm";
++ status = "okay";
++
++ #sound-dai-cells = <0>;
++ };
++
++ spi_gpio_sw {
++ compatible = "spi-gpio";
++ #address-cells = <0x1>;
++ #size-cells = <0x0>;
++ gpio-sck = <&gpio0 8 GPIO_ACTIVE_HIGH>;
++ gpio-miso = <&gpio0 10 GPIO_ACTIVE_HIGH>;
++ gpio-mosi = <&gpio0 11 GPIO_ACTIVE_HIGH>;
++ cs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
++ num-chipselects = <1>;
++
++ spidev: spidev@0 {
++ compatible = "spidev", "spi-gpio";
++ reg = <0>;
++ spi-max-frequency = <25000000>;
++ spi-cpha;
++ spi-cpol;
++ };
++ };
++
++ spi_gpio_can {
++ compatible = "spi-gpio";
++ #address-cells = <0x1>;
++ #size-cells = <0x0>;
++ gpio-sck = <&gpio1 2 GPIO_ACTIVE_HIGH>;
++ gpio-miso = <&gpio1 3 GPIO_ACTIVE_HIGH>;
++ gpio-mosi = <&gpio1 1 GPIO_ACTIVE_HIGH>;
++ cs-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
++ &gpio1 4 GPIO_ACTIVE_HIGH>;
++ num-chipselects = <2>;
++
++ spican0: spidev@0 {
++ compatible = "microchip,mcp2515";
++ reg = <0>;
++ clocks = <&excan_ref_clk>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <15 GPIO_ACTIVE_LOW>;
++ spi-max-frequency = <10000000>;
++ };
++ spican1: spidev@1 {
++ compatible = "microchip,mcp2515";
++ reg = <1>;
++ clocks = <&excan_ref_clk>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <5 GPIO_ACTIVE_LOW>;
++ spi-max-frequency = <10000000>;
++ };
++ };
++};
++
++&pfc {
++ hscif4_pins: hscif4 {
++ groups = "hscif4_data_a", "hscif4_ctrl";
++ function = "hscif4";
++ };
++
++ sdhi3_pins_3v3: sd3_3v3 {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ power-source = <3300>;
++ };
++
++ /delete-node/sound;
++
++ sound_0_pins: sound1 {
++ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++ function = "ssi";
++ };
++
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
++
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ can1_pins: can1 {
++ groups = "can1_data";
++ function = "can1";
++ };
++
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++
++ canfd1_pins: canfd1 {
++ groups = "canfd1_data";
++ function = "canfd1";
++ };
++};
++
++&gpio0 {
++ video_a_irq {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A irq";
++ };
++
++ video_b_irq {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B irq";
++ };
++
++ video_c_irq {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-C irq";
++ };
++};
++
++&gpio1 {
++ gpioext_4_22_irq {
++ gpio-hog;
++ gpios = <25 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "0x22@i2c4 irq";
++ };
++ pcie_disable {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "mPCIe W_DISABLE";
++ };
++ m2_sleep {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "M.2 SLEEP#";
++ };
++ m2_pres {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "M.2 Present";
++ };
++ m2_pcie_det {
++ gpio-hog;
++ gpios = <18 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "M.2 PCIe detected";
++ };
++ m2_usb_det {
++ gpio-hog;
++ gpios = <19 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "M.2 USB30 detected";
++ };
++ m2_usb_det {
++ gpio-hog;
++ gpios = <27 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "M.2 SSD detected";
++ };
++ eth_phy_reset {
++ gpio-hog;
++ gpios = <16 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "BR phy reset";
++ };
++ eth_sw_reset {
++ gpio-hog;
++ gpios = <17 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "BR switch reset";
++ };
++};
++
++&gpio2 {
++ m2_wake {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "M.2 WAKE#";
++ };
++ m2_pcie_en {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "M.2 PCIe enable";
++ };
++};
++
++&gpio3 {
++ m2_power_off {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "M.2 FULL_CARD_POWER_OFF#";
++ };
++};
++
++&gpio6 {
++ pcie_wake {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe WAKE#";
++ };
++ pcie_clkreq {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe CLKREQ#";
++ };
++ m2_rst {
++ gpio-hog;
++ gpios = <21 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "M.2 RESET#";
++ };
++};
++
++&hscif4 {
++ pinctrl-0 = <&hscif4_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
++};
++
++&i2c2 {
++ clock-frequency = <400000>;
++
++ i2cswitch2: pca9548@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ /* USB3.0 HUB node(s) */
++ };
++
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ /* PCIe node(s) */
++ };
++
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ /* Slot A (CN10) */
++
++ ov106xx@0 {
++ compatible = "ovti,ov106xx";
++ reg = <0x60>;
++
++ port@0 {
++ ov106xx_in0: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin0ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ ov106xx_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ ov106xx_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
++ };
++ };
++ };
++
++ ov106xx@1 {
++ compatible = "ovti,ov106xx";
++ reg = <0x61>;
++
++ port@0 {
++ ov106xx_in1: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin1ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ ov106xx_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ ov106xx_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
++ };
++ };
++ };
++
++ ov106xx@2 {
++ compatible = "ovti,ov106xx";
++ reg = <0x62>;
++
++ port@0 {
++ ov106xx_in2: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin2ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ ov106xx_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++
++ ov106xx@3 {
++ compatible = "ovti,ov106xx";
++ reg = <0x63>;
++
++ port@0 {
++ ov106xx_in3: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin3ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ ov106xx_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++
++ /* DS90UB964 @ 0x3a */
++ ti964-ti9x3@0 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "stp";
++
++ port@0 {
++ ti964_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti964_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ ti964_des0ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ ti964_des0ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ ti964_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* DS90UB954 @ 0x38 */
++ ti954-ti9x3@0 {
++ compatible = "ti,ti954-ti9x3";
++ reg = <0x38>;
++ /* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
++ ti,sensor_delay = <350>;
++ ti,links = <2>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "stp";
++
++ port@0 {
++ ti954_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti954_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ ti954_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* MAX9286 @ 0x2c */
++ max9286-max9271@0 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des0ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ max9286_des0ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ max9286_des0ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ max9286_des0ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ max9286_csi0ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ /* Slot B (CN11) */
++
++ ov106xx@4 {
++ compatible = "ovti,ov106xx";
++ reg = <0x64>;
++
++ port@0 {
++ ov106xx_in4: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin4ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep0>;
++ };
++ ov106xx_ti964_des1ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep0>;
++ };
++ ov106xx_ti954_des1ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep0>;
++ };
++ };
++ };
++
++ ov106xx@5 {
++ compatible = "ovti,ov106xx";
++ reg = <0x65>;
++
++ port@0 {
++ ov106xx_in5: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin5ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep1>;
++ };
++ ov106xx_ti964_des1ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep1>;
++ };
++ ov106xx_ti954_des1ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep1>;
++ };
++ };
++ };
++
++ ov106xx@6 {
++ compatible = "ovti,ov106xx";
++ reg = <0x66>;
++
++ port@0 {
++ ov106xx_in6: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin6ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep2>;
++ };
++ ov106xx_ti964_des1ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep2>;
++ };
++ };
++ };
++
++ ov106xx@7 {
++ compatible = "ovti,ov106xx";
++ reg = <0x67>;
++
++ port@0 {
++ ov106xx_in7: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin7ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep3>;
++ };
++ ov106xx_ti964_des1ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep3>;
++ };
++ };
++ };
++
++ /* DS90UB964 @ 0x3a */
++ ti964-ti9x3@1 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "stp";
++
++ port@0 {
++ ti964_des1ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ ti964_des1ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ ti964_des1ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in6>;
++ };
++ ti964_des1ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in7>;
++ };
++ };
++ port@1 {
++ ti964_csi2ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++
++ /* DS90UB954 @ 0x38 */
++ ti954-ti9x3@1 {
++ compatible = "ti,ti954-ti9x3";
++ reg = <0x38>;
++ /* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
++ ti,sensor_delay = <350>;
++ ti,links = <2>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "stp";
++
++ port@0 {
++ ti954_des1ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ ti954_des1ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ };
++ port@1 {
++ ti954_csi2ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++
++ /* MAX9286 @ 0x2c */
++ max9286-max9271@1 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des1ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ max9286_des1ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ max9286_des1ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in6>;
++ };
++ max9286_des1ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in7>;
++ };
++ };
++ port@1 {
++ max9286_csi2ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* Slot C (CN12) */
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* Slot A (CN10) */
++
++ video_a_ext0: pca9535@26 {
++ compatible = "nxp,pca9535";
++ reg = <0x26>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_des_led {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A led";
++ };
++ };
++
++ video_a_ext1: max7325@5c {
++ compatible = "maxim,max7325";
++ reg = <0x5c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg2 {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg2";
++ };
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_led {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A LED";
++ };
++ };
++ };
++
++ i2c@5 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <5>;
++ /* Slot B (CN11) */
++
++ video_b_ext0: pca9535@26 {
++ compatible = "nxp,pca9535";
++ reg = <0x26>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_b_des_cfg1 {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg1";
++ };
++ video_b_des_cfg0 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg0";
++ };
++ video_b_pwr_shdn {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR_SHDN";
++ };
++ video_b_cam_pwr0 {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR0";
++ };
++ video_b_cam_pwr1 {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR1";
++ };
++ video_b_cam_pwr2 {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR2";
++ };
++ video_b_cam_pwr3 {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR3";
++ };
++ video_b_des_shdn {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B DES_SHDN";
++ };
++ video_b_des_led {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B led";
++ };
++ };
++
++ video_b_ext1: max7325@5c {
++ compatible = "maxim,max7325";
++ reg = <0x5c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_b_des_cfg2 {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg2";
++ };
++ video_b_des_cfg1 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg1";
++ };
++ video_b_des_cfg0 {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg0";
++ };
++ video_b_pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR_SHDN";
++ };
++ video_b_cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR0";
++ };
++ video_b_cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR1";
++ };
++ video_b_cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR2";
++ };
++ video_b_cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR3";
++ };
++ video_b_des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B DES_SHDN";
++ };
++ video_b_led {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B LED";
++ };
++ };
++ };
++
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++ /* Slot C (CN12) */
++ };
++ };
++};
++
++&i2c4 {
++ i2cswitch4: pca9548@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios= <&gpio5 15 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ /* FAN node - EMC2103 */
++ fan_ctrl:ecm2103@2e {
++ compatible = "emc2103";
++ reg = <0x2e>;
++ };
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* Power nodes - 2 x TPS544x20 */
++ };
++
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ /* CAN and power board nodes */
++
++ gpio_ext_pwr: pca9535@22 {
++ compatible = "nxp,pca9535";
++ reg = <0x22>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio1>;
++ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++
++ /* enable input DCDC after wake-up signal released */
++ pwr_hold {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "pwr_hold";
++ };
++
++ /* CAN0 */
++ can0_stby {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can0_stby";
++ };
++ can0_load {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can0_120R_load";
++ };
++ /* CAN1 */
++ can1_stby {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can1_stby";
++ };
++ can1_load {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can1_120R_load";
++ };
++ /* CAN2 */
++ can2_stby {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can2_stby";
++ };
++ can2_load {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can2_120R_load";
++ };
++ can2_rst {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "can2_rst";
++ };
++ /* CAN3 */
++ can3_stby {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can3_stby";
++ };
++ can3_load {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can3_120R_load";
++ };
++ can3_rst {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "can3_rst";
++ };
++ };
++ };
++
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* FPDLink output node - DS90UH947 */
++ };
++
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++ /* BCM switch node */
++ };
++
++ i2c@5 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <5>;
++ /* LED board node(s) */
++
++ gpio_ext_led: pca9535@22 {
++ compatible = "nxp,pca9535";
++ reg = <0x22>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ /* gpios 0..7 are used for indication LEDs, low-active */
++ };
++ };
++
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ /* M2 connector i2c node(s) */
++ };
++
++ /* port 7 is not used */
++ };
++};
++
++&pcie_bus_clk {
++ clock-frequency = <100000000>;
++ status = "okay";
++};
++
++&pciec0 {
++ status = "okay";
++};
++
++&pciec1 {
++ status = "okay";
++};
++
++&vin0 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin0ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ };
++ port@1 {
++ csi0ep0: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin0_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ vin0_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ vin0_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
++ };
++ };
++ };
++};
++
++&vin1 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin1ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <1>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ csi0ep1: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin1_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ vin1_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ vin1_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
++ };
++ };
++ };
++};
++
++&vin2 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin2ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <2>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ };
++ port@1 {
++ csi0ep2: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin2_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ vin2_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++};
++
++&vin3 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin3ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <3>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ csi0ep3: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin3_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ vin3_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++};
++
++&vin4 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin4ep0: endpoint {
++ csi,select = "csi41";
++ virtual,channel = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep0: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin4_max9286_des1ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep0>;
++ };
++ vin4_ti964_des1ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep0>;
++ };
++ vin4_ti954_des1ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep0>;
++ };
++ };
++ };
++};
++
++&vin5 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin5ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <1>;
++ remote-endpoint = <&ov106xx_in5>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep1: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin5_max9286_des1ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep1>;
++ };
++ vin5_ti964_des1ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep1>;
++ };
++ vin5_ti954_des1ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep1>;
++ };
++ };
++ };
++};
++
++&vin6 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin6ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <2>;
++ remote-endpoint = <&ov106xx_in6>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep2: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin6_max9286_des1ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep2>;
++ };
++ vin6_ti964_des1ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep2>;
++ };
++ };
++ };
++};
++
++&vin7 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin7ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <3>;
++ remote-endpoint = <&ov106xx_in7>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep3: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin7_max9286_des1ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep3>;
++ };
++ vin7_ti964_des1ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep3>;
++ };
++ };
++ };
++};
++
++&csi2_40 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_40_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
++};
++
++&csi2_41 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_41_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
++};
++
++&rcar_sound {
++ pinctrl-0 = <&sound_clk_pins>;
++
++ /* Multi DAI */
++ #sound-dai-cells = <1>;
++};
++
++&sata {
++ status = "okay";
++};
++
++&ssi1 {
++ /delete-property/shared-pin;
++};
++
++&avb {
++ /delete-property/phy-handle;
++ /delete-property/phy-gpios;
++ phy-mode = "rgmii";
++
++ /delete-node/ethernet-phy@0;
++
++ fixed-link {
++ speed = <100>;
++ full-duplex;
++ };
++};
++
++&msiof1 {
++ status = "disabled";
++};
++
++&usb2_phy0 {
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&xhci0 {
++ status = "okay";
++};
++
++&ehci0 {
++ status = "okay";
++};
++
++&ohci0 {
++ status = "okay";
++};
++
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++ pinctrl-0 = <&can1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++ pinctrl-names = "default";
++ status = "disabled";
++
++ renesas,can-clock-select = <0x0>;
++
++ channel0 {
++ status = "okay";
++ };
++
++ channel1 {
++ status = "okay";
++ };
++};
++
++/* uncomment to enable CN12 on VIN4-7 */
++//#include "ulcb-vb-cn12.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi
+new file mode 100644
+index 0000000..3d4bcde
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi
+@@ -0,0 +1,557 @@
++/*
++ * Device Tree Source for the ULCB Videobox Mini board
++ *
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/ {
++ aliases {
++ serial1 = &scif1;
++ };
++
++ lvds-encoder {
++ compatible = "thine,thc63lvdm83d";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ lvds_enc_in: endpoint {
++ remote-endpoint = <&du_out_lvds0>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ lvds_enc_out: endpoint {
++ remote-endpoint = <&lvds_in>;
++ };
++ };
++ };
++ };
++
++ lvds {
++ compatible = "lvds-connector";
++
++ width-mm = <210>;
++ height-mm = <158>;
++
++ panel-timing {
++ /* 1280x800 @60Hz */
++ clock-frequency = <65000000>;
++ hactive = <1280>;
++ vactive = <800>;
++ hsync-len = <40>;
++ hfront-porch = <80>;
++ hback-porch = <40>;
++ vfront-porch = <14>;
++ vback-porch = <14>;
++ vsync-len = <4>;
++ };
++
++ port {
++ lvds_in: endpoint {
++ remote-endpoint = <&lvds_enc_out>;
++ };
++ };
++ };
++};
++
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&can1 {
++ pinctrl-0 = <&can1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&canfd {
++ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++ pinctrl-names = "default";
++ status = "disabled";
++
++ channel0 {
++ status = "okay";
++ };
++
++ channel1 {
++ status = "okay";
++ };
++};
++
++&csi2_41 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_41_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
++};
++
++&i2c1 {
++ pinctrl-0 = <&i2c1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ clock-frequency = <100000>;
++
++ i2cswitch1: i2c-switch@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++
++ ov106xx@0 {
++ compatible = "ovti,ov106xx";
++ reg = <0x60>;
++
++ port@0 {
++ ov106xx_in0: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin4ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ ov106xx_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ };
++ };
++
++ ov106xx@1 {
++ compatible = "ovti,ov106xx";
++ reg = <0x61>;
++
++ port@0 {
++ ov106xx_in1: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin5ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ ov106xx_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ };
++ };
++
++ ov106xx@2 {
++ compatible = "ovti,ov106xx";
++ reg = <0x62>;
++
++ port@0 {
++ ov106xx_in2: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin6ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ ov106xx_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++
++ ov106xx@3 {
++ compatible = "ovti,ov106xx";
++ reg = <0x63>;
++
++ port@0 {
++ ov106xx_in3: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin7ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ ov106xx_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++
++ max9286-max9271@0 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des0ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ max9286_des0ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ max9286_des0ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ max9286_des0ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ max9286_csi0ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++
++ ti964-ti9x3@0 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti964_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti964_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ ti964_des0ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ ti964_des0ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ ti964_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++
++ gpio_exp_6c: gpio@6c {
++ compatible = "maxim,max7325";
++ reg = <0x6c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ virq {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video VIRQ";
++ };
++ des_cfg {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video CNFG0";
++ };
++ pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR_SHDN";
++ };
++ cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR0";
++ };
++ cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR1";
++ };
++ cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR2";
++ };
++ cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR3";
++ };
++ des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video DES_SHDN";
++ };
++ fpdl_shdn {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video FPDL_SHDN";
++ };
++ };
++ };
++ };
++};
++
++&gpio1 {
++ can0stby {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "CAN0STBY";
++ };
++};
++
++&gpio2 {
++ can0_load {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "CAN0Loff";
++ };
++};
++
++&pfc {
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ can1_pins: can1 {
++ groups = "can1_data";
++ function = "can1";
++ };
++
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++
++ canfd1_pins: canfd1 {
++ groups = "canfd1_data";
++ function = "canfd1";
++ };
++
++ i2c1_pins: i2c1 {
++ groups = "i2c1_b";
++ function = "i2c1";
++ };
++
++ scif1_pins: scif1 {
++ groups = "scif1_data_a";
++ function = "scif1";
++ };
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&vin4 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin4ep0: endpoint {
++ csi,select = "csi41";
++ virtual,channel = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ };
++ port@1 {
++ csi0ep0: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin4_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ vin4_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ };
++ };
++};
++
++&vin5 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin5ep0: endpoint {
++ csi,select = "csi41";
++ virtual,channel = <1>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ csi0ep1: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin5_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ vin5_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ };
++ };
++};
++
++&vin6 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin6ep0: endpoint {
++ csi,select = "csi41";
++ virtual,channel = <2>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ };
++ port@1 {
++ csi0ep2: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin6_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ vin6_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++};
++
++&vin7 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin7ep0: endpoint {
++ csi,select = "csi41";
++ virtual,channel = <3>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ csi0ep3: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin7_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ vin7_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++};
--
1.9.1
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend
index 7421ef9..57a1ee6 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend
@@ -81,11 +81,13 @@ KERNEL_DEVICETREE_append_h3ulcb = " \
renesas/r8a7795-es1-h3ulcb-had-beta.dtb \
renesas/r8a7795-es1-h3ulcb-kf.dtb \
renesas/r8a7795-es1-h3ulcb-vb.dtb \
+ renesas/r8a7795-es1-h3ulcb-vbm.dtb \
renesas/r8a7795-h3ulcb-view.dtb \
renesas/r8a7795-h3ulcb-had-alfa.dtb \
renesas/r8a7795-h3ulcb-had-beta.dtb \
renesas/r8a7795-h3ulcb-kf.dtb \
renesas/r8a7795-h3ulcb-vb.dtb \
+ renesas/r8a7795-h3ulcb-vbm.dtb \
"
KERNEL_DEVICETREE_append_m3ulcb = " \
@@ -106,5 +108,5 @@ KERNEL_DEVICETREE_append_eagle = " \
KERNEL_DEVICETREE_append_v3msk = " \
renesas/r8a7797-v3msk.dtb \
renesas/r8a7797-v3msk-kf.dtb \
- renesas/r8a7797-v3msk-vb.dtb \
+ renesas/r8a7797-v3msk-vbm.dtb \
"