diff options
author | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2017-09-20 01:40:33 +0300 |
---|---|---|
committer | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2017-09-20 01:44:10 +0300 |
commit | bc699eede30c964b938512470231f6f6088a636b (patch) | |
tree | 2fa2b6afcf2e40327e71c9879e46374afe64c918 /meta-rcar-gen3-adas | |
parent | 2212d4e5596911054210a6a3e1bdb6e079de6ed8 (diff) |
switch to 2.23.0 bsp
Diffstat (limited to 'meta-rcar-gen3-adas')
14 files changed, 27 insertions, 1289 deletions
diff --git a/meta-rcar-gen3-adas/conf/layer.conf b/meta-rcar-gen3-adas/conf/layer.conf index 0397722..31e8f34 100644 --- a/meta-rcar-gen3-adas/conf/layer.conf +++ b/meta-rcar-gen3-adas/conf/layer.conf @@ -46,6 +46,7 @@ IMAGE_INSTALL_append_rcar-gen3 = " \ pulseaudio-module-remap-sink \ pulseaudio-module-remap-source \ gstreamer1.0-plugins-good-pulse \ + gdbserver \ " # Radio packages @@ -71,4 +72,6 @@ DISTRO_FEATURES_append = " opencv-sdk " IMAGE_INSTALL_remove = "gtk+3-demo clutter-1.0-examples" -PREFERRED_VERSION_opencv = "3.2%"
\ No newline at end of file +EXTRA_IMAGE_FEATURES_append_rcar-gen3 = " eclipse-debug" + +PREFERRED_VERSION_opencv = "3.2%" diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0012-board-ulcb-Fix-reset-command-clock-setting.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0012-board-ulcb-Fix-reset-command-clock-setting.patch deleted file mode 100644 index 3ddd592..0000000 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0012-board-ulcb-Fix-reset-command-clock-setting.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 238ab2a2f90819ef4a050b8d2a8f1b1359e2a28a Mon Sep 17 00:00:00 2001 -From: Yusuke Goda <yusuke.goda.sx@renesas.com> -Date: Thu, 11 May 2017 19:46:18 +0900 -Subject: [PATCH] board: ulcb: Fix reset command clock setting - -Reset command uses the power control of the PMIC via CPLD. -CPLD is connected by GPIO2 and GPIO6, so GPIO2 and GPIO6 -clock need to be supplied. - -Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> ---- - board/renesas/ulcb/cpld.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/board/renesas/ulcb/cpld.c b/board/renesas/ulcb/cpld.c -index abc7c84..66922d7 100644 ---- a/board/renesas/ulcb/cpld.c -+++ b/board/renesas/ulcb/cpld.c -@@ -9,6 +9,7 @@ - - #include <common.h> - #include <asm/arch/prr_depend.h> -+#include <asm/arch/rcar-mstp.h> - #include <asm/io.h> - #include <asm/gpio.h> - -@@ -24,6 +25,9 @@ - #define MISO GPIO_GP_6_10 - #endif - -+#define GP2_MSTP910 (1 << 10) -+#define GP6_MSTP906 (1 << 6) -+ - #define CPLD_ADDR_MODE 0x00 /* RW */ - #define CPLD_ADDR_MUX 0x02 /* RW */ - #define CPLD_ADDR_DIPSW6 0x08 /* R */ -@@ -103,6 +107,9 @@ static void cpld_init(void) - val |= PUEN_SSI_SDATA4; - writel(val, PFC_PUEN5); - -+ /* GPIO2, GPIO6 for reset */ -+ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, GP6_MSTP906 | GP2_MSTP910); -+ - gpio_request(SCLK, NULL); - gpio_request(SSTBZ, NULL); - gpio_request(MOSI, NULL); --- -1.9.1 - diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch index 672ec39..c6dc960 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch @@ -44,12 +44,13 @@ diff --git a/arch/arm/cpu/armv8/rcar_gen3/Makefile b/arch/arm/cpu/armv8/rcar_gen index 2bf2416..e85ca94 100644 --- a/arch/arm/cpu/armv8/rcar_gen3/Makefile +++ b/arch/arm/cpu/armv8/rcar_gen3/Makefile -@@ -13,3 +13,5 @@ obj-$(CONFIG_R8A7795) += lowlevel_init.o cpu_info-r8a7795.o \ - pfc.o pfc-r8a7795.o pfc-r8a7795_es.o prr_depend.o +@@ -13,3 +13,6 @@ obj-$(CONFIG_R8A7795) += lowlevel_init.o cpu_info-r8a7795.o \ obj-$(CONFIG_R8A7796) += lowlevel_init.o cpu_info-r8a7796.o \ - pfc.o pfc-r8a7796.o prr_depend.o + pfc.o pfc-r8a7796.o prr_depend.o \ + board.o +obj-$(CONFIG_R8A7797) += lowlevel_init.o cpu_info-r8a7797.o \ -+ pfc.o pfc-r8a7797.o prr_depend.o ++ pfc.o pfc-r8a7797.o prr_depend.o \ ++ board.o diff --git a/arch/arm/cpu/armv8/rcar_gen3/cpu_info-r8a7797.c b/arch/arm/cpu/armv8/rcar_gen3/cpu_info-r8a7797.c new file mode 100644 index 0000000..cc8e1e6 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch index 42782cf..b47c724 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch @@ -17,8 +17,8 @@ index 59d34b8..538cdc2 100644 --- a/arch/arm/include/asm/arch-rcar_gen3/rcar-base.h +++ b/arch/arm/include/asm/arch-rcar_gen3/rcar-base.h @@ -78,6 +78,12 @@ - #define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000 - #define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000 + /* SH-I2C */ + #define CONFIG_SYS_I2C_SH_BASE0 0xE60B0000 +/* RPC */ +#define CONFIG_SYS_RPC_BASE 0xEE200000 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch index 0186c20..bcbf1f6 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0023-board-renesas-salvator-x-Enable-RPC-clock.patch @@ -22,15 +22,15 @@ index 491d378..803636e 100644 +#define RPC_MSTP917 (1 << 17) #define SD0_MSTP314 (1 << 14) #define SD1_MSTP313 (1 << 13) - #define SD2_MSTP312 (1 << 12) /* either MMC0 */ + #define SD2_MSTP312 (1 << 12) /* either MMC0 */ @@ -51,6 +52,8 @@ int board_early_init_f(void) - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SCIF2_MSTP310); /* EHTERAVB */ - mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812); + mstp_clrbits_le32(SMSTPCR8, SMSTPCR8, ETHERAVB_MSTP812); + /* RPC */ -+ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, RPC_MSTP917); ++ mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, RPC_MSTP917); /* eMMC */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); /* SDHI0, 3 */ -- 1.9.3 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch index 1e2c155..6328773 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0024-board-renesas-ulcb-Enable-RPC-clock.patch @@ -24,13 +24,13 @@ index 3939f97..2e9baac 100644 #define SD1_MSTP313 (1 << 13) #define SD2_MSTP312 (1 << 12) @@ -53,6 +54,8 @@ int board_early_init_f(void) - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SCIF2_MSTP310); /* EHTERAVB */ - mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812); + mstp_clrbits_le32(SMSTPCR8, SMSTPCR8, ETHERAVB_MSTP812); + /* RPC */ -+ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, RPC_MSTP917); ++ mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, RPC_MSTP917); /* eMMC */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); /* SDHI0 */ -- 1.9.3 diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend index 5ab8dfd..730c8c2 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend @@ -12,7 +12,6 @@ SRC_URI_append = " \ file://0009-configs-rcar-gen3-common-Enable-askenv-command.patch \ file://0010-configs-rcar-gen3-common-Enable-hush-parser.patch \ file://0011-configs-rcar-gen3-common-Enable-GPT-support.patch \ - file://0012-board-ulcb-Fix-reset-command-clock-setting.patch \ file://0013-mtd-spi-QSPI-flash-support.patch \ file://0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch \ file://0015-board-renesas-Add-V3M-Eagle-board.patch \ diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0007-mmc-sh_mobile_sdhi-Add-R-CarGen3-SDHI-SEQUENCER-supp.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0007-mmc-sh_mobile_sdhi-Add-R-CarGen3-SDHI-SEQUENCER-supp.patch deleted file mode 100644 index 803c2ed..0000000 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0007-mmc-sh_mobile_sdhi-Add-R-CarGen3-SDHI-SEQUENCER-supp.patch +++ /dev/null @@ -1,1070 +0,0 @@ -From 3b81bfa8f0dcf10e59172b10efce2c591b35a590 Mon Sep 17 00:00:00 2001 -From: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> -Date: Wed, 1 Feb 2017 10:59:39 +0900 -Subject: [PATCH] mmc: sh_mobile_sdhi: Add R-CarGen3 SDHI-SEQUENCER support - -This is Workaround patch for SDHI-DMAC restriction of R-Car H3(WS1.1)/M3(WS1.0). -Restriction: Mismatch of the transfer completion interrupt time and data transfer -completion time. -Overview: It does not take into account the bus response, the transfer completion -interrupt IP outputs is in the early out.Therefore, when carrying out the data -verification data read from the SD card, there is a possibility that the data of -the last sector might be missing.(MMC Interface is also the same.) - -S/W Workaround: The last sector data is preserved by reading data for 2 sectors -extra in the SDHI Driver of Linux kernel. - -The SDHI Driver achieves a dummy read for 2 sectors by the SDHI-SEQ function. -In case of eMMC: CMD17(MMC_READ_SINGLE_BLOCK) and CMD18(MMC_READ_MULTIPLE_BLOCK) - were requested, CMD8(SEND_EXT_CSD) is carried out additionally twice. -In case of SD card: CMD17(MMC_READ_SINGLE_BLOCK) and CMD18(MMC_READ_MULTIPLE_BLOCK) - were requested, 1024 bytes are read additionally by CMD18. -In other cases: CMD17 and CMD53(SD_IO_RW_EXTENDED) is carried out additionally twice. - -Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> -Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> ---- - drivers/mmc/host/Kconfig | 10 + - drivers/mmc/host/sh_mobile_sdhi.c | 13 + - drivers/mmc/host/tmio_mmc.h | 56 ++++ - drivers/mmc/host/tmio_mmc_dma_gen3.c | 490 +++++++++++++++++++++++++++++++++++ - drivers/mmc/host/tmio_mmc_pio.c | 245 ++++++++++++++++++ - 5 files changed, 814 insertions(+) - -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index 7ec33c5..47b29b6 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -568,6 +568,16 @@ config MMC_SDHI_PIO - When switching the transfer mode from DMA to PIO, say Y here. - When switching the transfer mode from PIO to DMA, say N here. - -+config MMC_SDHI_PRE_REQ -+ bool "SDHI pre_req/post_req API support" -+ depends on MMC_SDHI && ARM64 && !MMC_SDHI_PIO -+ default y -+ -+config MMC_SDHI_SEQ -+ bool "SDHI Sequencer read/write support" -+ depends on MMC_SDHI && ARM64 && !MMC_SDHI_PIO -+ default y -+ - config MMC_CB710 - tristate "ENE CB710 MMC/SD Interface support" - depends on PCI -diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c -index ee7b188..35cd37f 100644 ---- a/drivers/mmc/host/sh_mobile_sdhi.c -+++ b/drivers/mmc/host/sh_mobile_sdhi.c -@@ -114,9 +114,22 @@ struct sh_mobile_sdhi_of_data { - .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | - MMC_CAP_CMD23, - .bus_shift = 2, -+#ifdef CONFIG_MMC_SDHI_SEQ -+ /* Gen3 SDHI SEQ can handle 0xffffffff/DM_SEQ_SIZE blk count */ -+ .max_blk_count = 0xffffffff / 512, -+ /* Gen3 SDHI SEQ can handle max 8 commands */ -+#ifdef CONFIG_MMC_BLOCK_BOUNCE -+ /* (CMD23+CMD18)*1 + (dummy read command) */ -+ .max_segs = 1, -+#else -+ /* (CMD23+CMD18)*3 + (dummy read command) */ -+ .max_segs = 3, -+#endif -+#else //CONFIG_MMC_SDHI_SEQ - /* Gen3 SDHI DMAC can handle 0xffffffff blk count, but seg = 1 */ - .max_blk_count = 0xffffffff, - .max_segs = 1, -+#endif //CONFIG_MMC_SDHI_SEQ - .sdbuf_64bit = true, - .scc_offset = 0x1000, - .taps = rcar_gen3_scc_taps, -diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h -index 438e4f8..52191ac 100644 ---- a/drivers/mmc/host/tmio_mmc.h -+++ b/drivers/mmc/host/tmio_mmc.h -@@ -51,6 +51,29 @@ - #define CTL_CLK_AND_WAIT_CTL 0x138 - #define CTL_RESET_SDIO 0x1e0 - -+#ifdef CONFIG_MMC_SDHI_SEQ -+#define DM_CM_SEQ_REGSET 0x800 -+#define DM_CM_SEQ_MODE 0x808 -+#define DM_CM_SEQ_CTRL 0x810 -+#define DM_CM_DTRAN_MODE 0x820 -+#define DM_CM_DTRAN_CTRL 0x828 -+#define DM_CM_RST 0x830 -+#define DM_CM_INFO1 0x840 -+#define DM_CM_INFO1_MASK 0x848 -+#define DM_CM_INFO2 0x850 -+#define DM_CM_INFO2_MASK 0x858 -+#define DM_CM_TUNING_STAT 0x860 -+#define DM_CM_SEQ_STAT 0x868 -+#define DM_DTRAN_ADDR 0x880 -+#define DM_SEQ_CMD 0x8a0 -+#define DM_SEQ_ARG 0x8a8 -+#define DM_SEQ_SIZE 0x8b0 -+#define DM_SEQ_SECCNT 0x8b8 -+#define DM_SEQ_RSP 0x8c0 -+#define DM_SEQ_RSP_CHK 0x8c8 -+#define DM_SEQ_ADDR 0x8d0 -+#endif -+ - /* Definitions for values the CTRL_STATUS register can take. */ - #define TMIO_STAT_CMDRESPEND BIT(0) - #define TMIO_STAT_DATAEND BIT(2) -@@ -78,6 +101,14 @@ - #define TMIO_STAT_CMD_BUSY BIT(30) - #define TMIO_STAT_ILL_ACCESS BIT(31) - -+#ifdef CONFIG_MMC_SDHI_SEQ -+/* Definitions for values the DM_CM_INFO1 register can take. */ -+#define DM_CM_INFO_SEQEND 0x00000001 -+#define DM_CM_INFO_SEQSUSPEND 0x00000100 -+#define DM_CM_INFO_DTRAEND_CH0 0x00010000 -+#define DM_CM_INFO_DTRAEND_CH1 0x00020000 -+#endif -+ - #define CLK_CTL_DIV_MASK 0xff - #define CLK_CTL_SCLKEN BIT(8) - -@@ -110,6 +141,13 @@ - struct tmio_mmc_data; - struct tmio_mmc_host; - -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+enum tmio_cookie { -+ COOKIE_UNMAPPED, -+ COOKIE_PRE_MAPPED, -+}; -+#endif -+ - struct tmio_mmc_dma { - enum dma_slave_buswidth dma_buswidth; - bool sdbuf_64bit; -@@ -145,6 +183,9 @@ struct tmio_mmc_host { - struct dma_chan *chan_tx; - struct tasklet_struct dma_complete; - struct tasklet_struct dma_issue; -+#ifdef CONFIG_MMC_SDHI_SEQ -+ struct tasklet_struct seq_complete; -+#endif - struct scatterlist bounce_sg; - u8 *bounce_buf; - u32 dma_tranend1; -@@ -243,6 +284,9 @@ static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg, - void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata); - void tmio_mmc_release_dma(struct tmio_mmc_host *host); - void tmio_mmc_abort_dma(struct tmio_mmc_host *host); -+#ifdef CONFIG_MMC_SDHI_SEQ -+void tmio_mmc_start_sequencer(struct tmio_mmc_host *host); -+#endif - #else - static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, - struct mmc_data *data) -@@ -327,4 +371,16 @@ static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int - writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); - } - -+#ifdef CONFIG_MMC_SDHI_SEQ -+static inline u64 tmio_dm_read(struct tmio_mmc_host *host, int addr) -+{ -+ return readq(host->ctl + addr); -+} -+ -+static inline void tmio_dm_write(struct tmio_mmc_host *host, int addr, u64 val) -+{ -+ writeq(val, host->ctl + addr); -+} -+#endif -+ - #endif -diff --git a/drivers/mmc/host/tmio_mmc_dma_gen3.c b/drivers/mmc/host/tmio_mmc_dma_gen3.c -index d1c6c40..faee4ae 100644 ---- a/drivers/mmc/host/tmio_mmc_dma_gen3.c -+++ b/drivers/mmc/host/tmio_mmc_dma_gen3.c -@@ -19,9 +19,15 @@ - #include <linux/pagemap.h> - #include <linux/scatterlist.h> - #include <linux/sys_soc.h> -+#ifdef CONFIG_MMC_SDHI_SEQ -+#include <linux/mmc/mmc.h> -+#include <linux/mmc/sd.h> -+#include <linux/mmc/sdio.h> -+#endif - - #include "tmio_mmc.h" - -+#if !defined(CONFIG_MMC_SDHI_SEQ) - #define DM_CM_DTRAN_MODE 0x820 - #define DM_CM_DTRAN_CTRL 0x828 - #define DM_CM_RST 0x830 -@@ -30,6 +36,7 @@ - #define DM_CM_INFO2 0x850 - #define DM_CM_INFO2_MASK 0x858 - #define DM_DTRAN_ADDR 0x880 -+#endif - - /* DM_CM_DTRAN_MODE */ - #define DTRAN_MODE_CH_NUM_CH0 0 /* "downstream" = for write commands */ -@@ -43,6 +50,9 @@ - /* DM_CM_RST */ - #define RST_DTRANRST1 BIT(9) - #define RST_DTRANRST0 BIT(8) -+#ifdef CONFIG_MMC_SDHI_SEQ -+#define RST_SEQRST BIT(0) -+#endif - #define RST_RESERVED_BITS GENMASK_ULL(32, 0) - - /* DM_CM_INFO1 and DM_CM_INFO1_MASK */ -@@ -68,15 +78,17 @@ - * this driver cannot use original sd_ctrl_{write,read}32 functions. - */ - -+#if !defined(CONFIG_MMC_SDHI_SEQ) - static void tmio_dm_write(struct tmio_mmc_host *host, int addr, u64 val) - { - writeq(val, host->ctl + addr); - } - - static u32 tmio_dm_read(struct tmio_mmc_host *host, int addr) - { - return readl(host->ctl + addr); - } -+#endif - - void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) - { -@@ -95,7 +107,11 @@ void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) - - void tmio_mmc_abort_dma(struct tmio_mmc_host *host) - { -+#ifdef CONFIG_MMC_SDHI_SEQ -+ u64 val = RST_SEQRST | RST_DTRANRST1 | RST_DTRANRST0; -+#else - u64 val = RST_DTRANRST1 | RST_DTRANRST0; -+#endif - - dev_dbg(&host->pdev->dev, "%s\n", __func__); - -@@ -149,11 +165,17 @@ void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data) - irq_mask = TMIO_STAT_TXRQ; - } - -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+ if (host->data->host_cookie != COOKIE_PRE_MAPPED) { -+#endif - ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, dir); - if (ret < 0) { - dev_err(&host->pdev->dev, "%s: dma_map_sg failed\n", __func__); - return; - } -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+ } -+#endif - - tmio_clear_transtate(host); - tmio_mmc_enable_dma(host, true); -@@ -195,11 +217,450 @@ static void tmio_mmc_complete_tasklet_fn(unsigned long arg) - dir = DMA_TO_DEVICE; - - tmio_mmc_enable_dma(host, false); -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+ if (host->data->host_cookie != COOKIE_PRE_MAPPED) -+#endif - dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->sg_len, dir); - tmio_mmc_do_data_irq(host); - } - #endif - -+#ifdef CONFIG_MMC_SDHI_SEQ -+/* DM_CM_SEQ_REGSET bits */ -+#define DM_CM_SEQ_REGSET_TABLE_NUM BIT(8) -+/* DM_CM_SEQ_CTRL bits */ -+#define DM_CM_SEQ_CTRL_SEQ_TABLE BIT(28) -+#define DM_CM_SEQ_CTRL_T_NUM BIT(24) -+#define DM_CM_SEQ_CTRL_SEQ_TYPE_SD BIT(16) -+#define DM_CM_SEQ_CTRL_START_NUM(x) ((x) << 12) -+#define DM_CM_SEQ_CTRL_END_NUM(x) ((x) << 8) -+#define DM_CM_SEQ_CTRL_SEQ_START BIT(0) -+/* DM_SEQ_CMD bits */ -+#define DM_SEQ_CMD_MULTI BIT(13) -+#define DM_SEQ_CMD_DIO BIT(12) -+#define DM_SEQ_CMD_CMDTYP BIT(11) -+#define DM_SEQ_CMD_RSP_NONE (BIT(9) | BIT(8)) -+#define DM_SEQ_CMD_RSP_R1 BIT(10) -+#define DM_SEQ_CMD_RSP_R1B (BIT(10) | BIT(8)) -+#define DM_SEQ_CMD_RSP_R2 (BIT(10) | BIT(9)) -+#define DM_SEQ_CMD_RSP_R3 (BIT(10) | BIT(9) | BIT(8)) -+#define DM_SEQ_CMD_NONAUTOSTP BIT(7) -+#define DM_SEQ_CMD_APP BIT(6) -+ -+#define MAX_CONTEXT_NUM 8 -+ -+struct tmio_mmc_context { -+ u64 seq_cmd; -+ u64 seq_arg; -+ u64 seq_size; -+ u64 seq_seccnt; -+ u64 seq_rsp; -+ u64 seq_rsp_chk; -+ u64 seq_addr; -+}; -+ -+static void tmio_mmc_set_seq_context(struct tmio_mmc_host *host, int ctxt_num, -+ struct tmio_mmc_context *ctxt) -+{ -+ u64 val; -+ -+ WARN_ON(ctxt_num >= MAX_CONTEXT_NUM); -+ -+ /* set sequencer table/context number */ -+ if (ctxt_num < 4) -+ val = ctxt_num; -+ else -+ val = DM_CM_SEQ_REGSET_TABLE_NUM | (ctxt_num - 4); -+ tmio_dm_write(host, DM_CM_SEQ_REGSET, val); -+ -+ /* set command parameter */ -+ tmio_dm_write(host, DM_SEQ_CMD, ctxt->seq_cmd); -+ tmio_dm_write(host, DM_SEQ_ARG, ctxt->seq_arg); -+ tmio_dm_write(host, DM_SEQ_SIZE, ctxt->seq_size); -+ tmio_dm_write(host, DM_SEQ_SECCNT, ctxt->seq_seccnt); -+ tmio_dm_write(host, DM_SEQ_RSP, ctxt->seq_rsp); -+ tmio_dm_write(host, DM_SEQ_RSP_CHK, ctxt->seq_rsp_chk); -+ tmio_dm_write(host, DM_SEQ_ADDR, ctxt->seq_addr); -+} -+ -+static int tmio_mmc_set_seq_table(struct tmio_mmc_host *host, -+ struct mmc_request *mrq, -+ struct scatterlist *sg, -+ bool ipmmu_on) -+{ -+ struct mmc_card *card = host->mmc->card; -+ struct mmc_data *data = mrq->data; -+ struct scatterlist *sg_tmp; -+ struct tmio_mmc_context ctxt; -+ unsigned int blksz, blocks; -+ u32 cmd_opcode, cmd_flag, cmd_arg; -+ u32 sbc_opcode = 0, sbc_arg = 0; -+ int i, ctxt_cnt = 0; -+ -+ /* FIXME: SD_COMBO media not tested */ -+ cmd_opcode = (mrq->cmd->opcode & 0x3f); -+ cmd_flag = DM_SEQ_CMD_CMDTYP; -+ if (data->flags & MMC_DATA_READ) -+ cmd_flag |= DM_SEQ_CMD_DIO; -+ if (mmc_op_multi(mrq->cmd->opcode) || -+ (cmd_opcode == SD_IO_RW_EXTENDED && mrq->cmd->arg & 0x08000000)) //FIXME -+ cmd_flag |= DM_SEQ_CMD_MULTI; -+ if (mrq->sbc || -+ cmd_opcode == SD_IO_RW_EXTENDED) //FIXME -+ cmd_flag |= DM_SEQ_CMD_NONAUTOSTP; -+ -+ switch (mmc_resp_type(mrq->cmd)) { -+ case MMC_RSP_NONE: -+ cmd_flag |= DM_SEQ_CMD_RSP_NONE; -+ break; -+ case MMC_RSP_R1: -+ case MMC_RSP_R1 & ~MMC_RSP_CRC: -+ cmd_flag |= DM_SEQ_CMD_RSP_R1; -+ break; -+ case MMC_RSP_R1B: -+ cmd_flag |= DM_SEQ_CMD_RSP_R1B; -+ break; -+ case MMC_RSP_R2: -+ cmd_flag |= DM_SEQ_CMD_RSP_R2; -+ break; -+ case MMC_RSP_R3: -+ cmd_flag |= DM_SEQ_CMD_RSP_R3; -+ break; -+ default: -+ pr_debug("Unknown response type %d\n", mmc_resp_type(mrq->cmd)); -+ return -EINVAL; -+ } -+ -+ cmd_arg = mrq->cmd->arg; -+ if (cmd_opcode == SD_IO_RW_EXTENDED && cmd_arg & 0x08000000) { -+ /* SDIO CMD53 block mode */ -+ cmd_arg &= ~0x1ff; -+ } -+ -+ if (mrq->sbc) { -+ sbc_opcode = (mrq->sbc->opcode & 0x3f) | DM_SEQ_CMD_RSP_R1; -+ sbc_arg = mrq->sbc->arg & (MMC_CMD23_ARG_REL_WR | -+ MMC_CMD23_ARG_PACKED | MMC_CMD23_ARG_TAG_REQ); -+ } -+ -+ blksz = data->blksz; -+ if (ipmmu_on) { -+ blocks = data->blocks; -+ memset(&ctxt, 0, sizeof(ctxt)); -+ -+ if (sbc_opcode) { -+ /* set CMD23 */ -+ ctxt.seq_cmd = sbc_opcode; -+ ctxt.seq_arg = sbc_arg | blocks; -+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt); -+ ctxt_cnt++; -+ } -+ -+ /* set CMD */ -+ ctxt.seq_cmd = cmd_opcode | cmd_flag; -+ ctxt.seq_arg = cmd_arg; -+ if (cmd_opcode == SD_IO_RW_EXTENDED && cmd_arg & 0x08000000) { -+ /* SDIO CMD53 block mode */ -+ ctxt.seq_arg |= blocks; -+ } -+ ctxt.seq_size = blksz; -+ ctxt.seq_seccnt = blocks; -+ ctxt.seq_addr = sg_dma_address(sg); -+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt); -+ } else { -+ for_each_sg(sg, sg_tmp, host->sg_len, i) { -+ blocks = sg_tmp->length / blksz; -+ memset(&ctxt, 0, sizeof(ctxt)); -+ -+ if (sbc_opcode) { -+ /* set CMD23 */ -+ ctxt.seq_cmd = sbc_opcode; -+ ctxt.seq_arg = sbc_arg | blocks; -+ if (sbc_arg & MMC_CMD23_ARG_TAG_REQ && card && -+ card->ext_csd.data_tag_unit_size && -+ blksz * blocks < card->ext_csd.data_tag_unit_size) -+ ctxt.seq_arg &= ~MMC_CMD23_ARG_TAG_REQ; -+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt); -+ ctxt_cnt++; -+ } -+ -+ /* set CMD */ -+ ctxt.seq_cmd = cmd_opcode | cmd_flag; -+ ctxt.seq_arg = cmd_arg; -+ if (cmd_opcode == SD_IO_RW_EXTENDED && -+ cmd_arg & 0x08000000) { -+ /* SDIO CMD53 block mode */ -+ ctxt.seq_arg |= blocks; -+ } -+ ctxt.seq_size = blksz; -+ ctxt.seq_seccnt = blocks; -+ ctxt.seq_addr = sg_dma_address(sg_tmp); -+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt); -+ -+ if (i < (host->sg_len - 1)) { -+ /* increment address */ -+ if (cmd_opcode == SD_IO_RW_EXTENDED) { -+ /* -+ * sg_len should be 1 in SDIO CMD53 -+ * byte mode -+ */ -+ WARN_ON(!(cmd_arg & 0x08000000)); -+ if (cmd_arg & 0x04000000) { -+ /* -+ * SDIO CMD53 address -+ * increment mode -+ */ -+ cmd_arg += (blocks * blksz) << 9; -+ } -+ } else { -+ if (card && !mmc_card_blockaddr(card)) -+ cmd_arg += blocks * blksz; -+ else -+ cmd_arg += blocks; -+ } -+ ctxt_cnt++; -+ } -+ } -+ } -+ -+ if (data->flags & MMC_DATA_READ) { -+ /* dummy read */ -+ if (cmd_opcode == MMC_READ_MULTIPLE_BLOCK && sbc_opcode && -+ data->blocks > 1) { -+ memset(&ctxt, 0, sizeof(ctxt)); -+ /* set CMD23 */ -+ ctxt.seq_cmd = sbc_opcode; -+ ctxt.seq_arg = sbc_arg | 2; -+ if (sbc_arg & MMC_CMD23_ARG_TAG_REQ && -+ card->ext_csd.data_tag_unit_size && -+ blksz * 2 < card->ext_csd.data_tag_unit_size) -+ ctxt.seq_arg &= ~MMC_CMD23_ARG_TAG_REQ; -+ ctxt_cnt++; -+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt); -+ -+ /* set CMD18 */ -+ ctxt.seq_cmd = cmd_opcode | cmd_flag; -+ ctxt.seq_arg = mrq->cmd->arg + data->blocks - 2; -+ ctxt.seq_size = 512; -+ ctxt.seq_seccnt = 2; -+ ctxt.seq_addr = sg_dma_address(&host->bounce_sg); -+ ctxt_cnt++; -+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt); -+ } else { -+ if ((card && mmc_card_mmc(card)) || -+ cmd_opcode == MMC_SEND_TUNING_BLOCK_HS200) { -+ /* In case of eMMC, set CMD8 twice */ -+ memset(&ctxt, 0, sizeof(ctxt)); -+ ctxt.seq_cmd = MMC_SEND_EXT_CSD | -+ DM_SEQ_CMD_CMDTYP | -+ DM_SEQ_CMD_DIO | -+ DM_SEQ_CMD_RSP_R1; -+ ctxt.seq_arg = 0; -+ ctxt.seq_size = 512; -+ ctxt.seq_seccnt = 1; -+ ctxt.seq_addr = sg_dma_address(&host->bounce_sg); -+ } else if (cmd_opcode == SD_SWITCH) { -+ /* set SD CMD6 twice */ -+ ctxt.seq_addr = sg_dma_address(&host->bounce_sg); -+ } else if ((card && (mmc_card_sdio(card) || -+ card->type == MMC_TYPE_SD_COMBO)) || -+ cmd_opcode == SD_IO_RW_EXTENDED) { -+ /* FIXME: -+ * In case of SDIO/SD_COMBO, -+ * read Common I/O Area 0x0-0x1FF twice. -+ */ -+ memset(&ctxt, 0, sizeof(ctxt)); -+ ctxt.seq_cmd = SD_IO_RW_EXTENDED | -+ DM_SEQ_CMD_CMDTYP | -+ DM_SEQ_CMD_DIO | -+ DM_SEQ_CMD_NONAUTOSTP | -+ DM_SEQ_CMD_RSP_R1; -+ /* -+ * SD_IO_RW_EXTENDED argument format: -+ * [31] R/W flag -> 0 -+ * [30:28] Function number -> 0x0 selects -+ * Common I/O Area -+ * [27] Block mode -> 0 -+ * [26] Increment address -> 1 -+ * [25:9] Regiser address -> 0x0 -+ * [8:0] Byte/block count -> 0x0 -> 512Bytes -+ */ -+ ctxt.seq_arg = 0x04000000; -+ ctxt.seq_size = 512; -+ ctxt.seq_seccnt = 1; -+ ctxt.seq_addr = sg_dma_address(&host->bounce_sg); -+ } else { -+ /* set CMD17 twice */ -+ memset(&ctxt, 0, sizeof(ctxt)); -+ ctxt.seq_cmd = MMC_READ_SINGLE_BLOCK | -+ DM_SEQ_CMD_CMDTYP | -+ DM_SEQ_CMD_DIO | -+ DM_SEQ_CMD_RSP_R1; -+ if (cmd_opcode == MMC_READ_SINGLE_BLOCK || -+ cmd_opcode == MMC_READ_MULTIPLE_BLOCK) -+ ctxt.seq_arg = mrq->cmd->arg; -+ else -+ ctxt.seq_arg = 0; //FIXME -+ ctxt.seq_size = 512; -+ ctxt.seq_seccnt = 1; -+ ctxt.seq_addr = sg_dma_address(&host->bounce_sg); -+ } -+ -+ for (i = 0; i < 2; i++) { -+ ctxt_cnt++; -+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt); -+ } -+ } -+ } -+ -+ return ctxt_cnt; -+} -+ -+void tmio_mmc_start_sequencer(struct tmio_mmc_host *host) -+{ -+ struct mmc_card *card = host->mmc->card; -+ struct scatterlist *sg = host->sg_ptr, *sg_tmp; -+ struct mmc_host *mmc = host->mmc; -+ struct mmc_request *mrq = host->mrq; -+ struct mmc_data *data = mrq->data; -+ enum dma_data_direction dir; -+ int ret, i, ctxt_num; -+ u32 val; -+ bool ipmmu_on = false; -+ -+ /* This DMAC cannot handle if sg_len larger than max_segs */ -+ if (mmc->max_segs == 1 || mmc->max_segs == 3) -+ WARN_ON(host->sg_len > mmc->max_segs); -+ else -+ ipmmu_on = true; -+ -+ dev_dbg(&host->pdev->dev, "%s: %d, %x\n", __func__, host->sg_len, -+ data->flags); -+ -+ if (!card && host->mrq->cmd->opcode == MMC_SEND_TUNING_BLOCK) { -+ /* -+ * workaround: if card is NULL, -+ * we can not decide a dummy read command to be added -+ * to the CMD19. -+ */ -+ host->force_pio = true; -+ tmio_mmc_enable_dma(host, false); -+ return; /* return for PIO */ -+ } -+ -+ if (ipmmu_on) { -+ if (!IS_ALIGNED(sg->offset, 8) || -+ ((sg_dma_address(sg) + data->blksz * data->blocks) > -+ GENMASK_ULL(32, 0))) { -+ dev_dbg(&host->pdev->dev, "%s: force pio\n", __func__); -+ host->force_pio = true; -+ tmio_mmc_enable_dma(host, false); -+ return; -+ } -+#if 1 //FIXME -+ /* -+ * workaround: if we use IPMMU, sometimes unhandled error -+ * happened -+ */ -+ switch (host->mrq->cmd->opcode) { -+ case MMC_SEND_TUNING_BLOCK_HS200: -+ case MMC_SEND_TUNING_BLOCK: -+ host->force_pio = true; -+ tmio_mmc_enable_dma(host, false); -+ return; /* return for PIO */ -+ default: -+ break; -+ } -+#endif -+ } else { -+ for_each_sg(sg, sg_tmp, host->sg_len, i) { -+ /* -+ * This DMAC cannot handle if buffer is not 8-bytes -+ * alignment -+ */ -+ if (!IS_ALIGNED(sg_tmp->offset, 8) || -+ !IS_ALIGNED(sg_tmp->length, data->blksz) || -+ ((sg_dma_address(sg_tmp) + sg_tmp->length) > -+ GENMASK_ULL(32, 0))) { -+ dev_dbg(&host->pdev->dev, "%s: force pio\n", -+ __func__); -+ host->force_pio = true; -+ tmio_mmc_enable_dma(host, false); -+ return; -+ } -+ } -+ } -+ -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+ if (host->data->host_cookie != COOKIE_PRE_MAPPED) { -+#endif -+ if (data->flags & MMC_DATA_READ) -+ dir = DMA_FROM_DEVICE; -+ else -+ dir = DMA_TO_DEVICE; -+ -+ ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, dir); -+ if (ret <= 0) { -+ dev_err(&host->pdev->dev, "%s: dma_map_sg failed\n", __func__); -+ host->force_pio = true; -+ tmio_mmc_enable_dma(host, false); -+ return; -+ } -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+ } -+#endif -+ -+ tmio_mmc_enable_dma(host, true); -+ /* set context */ -+ ctxt_num = tmio_mmc_set_seq_table(host, mrq, sg, ipmmu_on); -+ if (ctxt_num < 0) { -+ host->force_pio = true; -+ tmio_mmc_enable_dma(host, false); -+ return; -+ } -+ /* set dma mode */ -+ //FIXME -+ tmio_dm_write(host, DM_CM_DTRAN_MODE, -+ DTRAN_MODE_BUS_WID_TH); -+ //DTRAN_MODE_BUS_WID_TH | DTRAN_MODE_ADDR_MODE); -+ /* enable SEQEND irq */ -+ tmio_dm_write(host, DM_CM_INFO1_MASK, -+ GENMASK_ULL(32, 0) & ~DM_CM_INFO_SEQEND); -+ -+ if (ctxt_num < 4) { -+ /* issue table0 commands */ -+ val = DM_CM_SEQ_CTRL_SEQ_TYPE_SD | -+ DM_CM_SEQ_CTRL_START_NUM(0) | -+ DM_CM_SEQ_CTRL_END_NUM(ctxt_num) | -+ DM_CM_SEQ_CTRL_SEQ_START; -+ tmio_dm_write(host, DM_CM_SEQ_CTRL, val); -+ } else { -+ /* issue table0 commands */ -+ val = DM_CM_SEQ_CTRL_SEQ_TYPE_SD | -+ DM_CM_SEQ_CTRL_T_NUM | -+ DM_CM_SEQ_CTRL_START_NUM(0) | -+ DM_CM_SEQ_CTRL_END_NUM(3) | -+ DM_CM_SEQ_CTRL_SEQ_START; -+ tmio_dm_write(host, DM_CM_SEQ_CTRL, val); -+ /* issue table1 commands */ -+ val = DM_CM_SEQ_CTRL_SEQ_TABLE | -+ DM_CM_SEQ_CTRL_SEQ_TYPE_SD | -+ DM_CM_SEQ_CTRL_T_NUM | -+ DM_CM_SEQ_CTRL_START_NUM(0) | -+ DM_CM_SEQ_CTRL_END_NUM(ctxt_num - 4) | -+ DM_CM_SEQ_CTRL_SEQ_START; -+ tmio_dm_write(host, DM_CM_SEQ_CTRL, val); -+ } -+ -+ return; -+} -+ -+static void tmio_mmc_seq_complete_tasklet_fn(unsigned long arg) -+{ -+ tmio_mmc_complete_tasklet_fn(arg); -+} -+#endif //CONFIG_MMC_SDHI_SEQ -+ - bool __tmio_mmc_dma_irq(struct tmio_mmc_host *host) - { - unsigned int ireg, status; -@@ -237,6 +698,27 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, - (unsigned long)host); - tasklet_init(&host->dma_issue, tmio_mmc_issue_tasklet_fn, - (unsigned long)host); -+#ifdef CONFIG_MMC_SDHI_SEQ -+ tasklet_init(&host->seq_complete, tmio_mmc_seq_complete_tasklet_fn, -+ (unsigned long)host); -+ /* alloc bounce_buf for dummy read */ -+ host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA); -+ if (!host->bounce_buf) -+ goto ebouncebuf; -+ /* setup bounce_sg for dummy read */ -+ sg_init_one(&host->bounce_sg, host->bounce_buf, 1024); -+ if (dma_map_sg(&host->pdev->dev, &host->bounce_sg, 1, DMA_FROM_DEVICE) <= 0) { -+ free_pages((unsigned long)host->bounce_buf, 0); -+ host->bounce_buf = NULL; -+ goto ebouncebuf; -+ } -+ -+ return; -+ -+ebouncebuf: -+ host->chan_rx = host->chan_tx = NULL; -+ return; -+#endif - #endif - } - -@@ -244,4 +726,12 @@ void tmio_mmc_release_dma(struct tmio_mmc_host *host) - { - /* Each value is set to zero to assume "disabling" each DMA */ - host->chan_rx = host->chan_tx = NULL; -+#ifdef CONFIG_MMC_SDHI_SEQ -+ /* free bounce_buf for dummy read */ -+ if (host->bounce_buf) { -+ dma_unmap_sg(&host->pdev->dev, &host->bounce_sg, 1, DMA_FROM_DEVICE); -+ free_pages((unsigned long)host->bounce_buf, 0); -+ host->bounce_buf = NULL; -+ } -+#endif - } -diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c -index 57a954a..e255503 100644 ---- a/drivers/mmc/host/tmio_mmc_pio.c -+++ b/drivers/mmc/host/tmio_mmc_pio.c -@@ -50,6 +50,9 @@ - #include <linux/scatterlist.h> - #include <linux/spinlock.h> - #include <linux/workqueue.h> -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+#include <linux/dma-mapping.h> -+#endif - - #include "tmio_mmc.h" - -@@ -587,6 +590,79 @@ void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) - schedule_work(&host->done); - } - -+#ifdef CONFIG_MMC_SDHI_SEQ -+static void tmio_mmc_seq_irq(struct tmio_mmc_host *host, unsigned int stat, -+ u32 seq_stat1, u32 seq_stat2) -+{ -+ struct mmc_data *data; -+ struct mmc_command *cmd, *sbc; -+ -+ spin_lock(&host->lock); -+ data = host->data; -+ cmd = host->mrq->cmd; -+ sbc = host->mrq->sbc; -+ -+ //FIXME: How to get SEQ commands response? -+ -+ if (seq_stat2) { -+ //FIXME -+ pr_debug("sequencer error, CMD%d SD_INFO2=0x%x\n", -+ cmd->opcode, stat >> 16); -+ if (stat & TMIO_STAT_CMDTIMEOUT) { -+ cmd->error = -ETIMEDOUT; -+ if (sbc) -+ sbc->error = -ETIMEDOUT; -+ } else if ((stat & TMIO_STAT_CRCFAIL && -+ cmd->flags & MMC_RSP_CRC) || -+ stat & TMIO_STAT_STOPBIT_ERR || -+ stat & TMIO_STAT_CMD_IDX_ERR) { -+ cmd->error = -EILSEQ; -+ if (sbc) -+ sbc->error = -EILSEQ; -+ } -+ -+ if (stat & TMIO_STAT_DATATIMEOUT) -+ data->error = -ETIMEDOUT; -+ else if (stat & TMIO_STAT_CRCFAIL || -+ stat & TMIO_STAT_STOPBIT_ERR || -+ stat & TMIO_STAT_TXUNDERRUN) -+ data->error = -EILSEQ; -+ } -+ -+ if (host->chan_tx && (data->flags & MMC_DATA_WRITE)) { -+ //FIXME -+ u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); -+ bool done = false; -+ -+ /* -+ * Has all data been written out yet? Testing on SuperH showed, -+ * that in most cases the first interrupt comes already with the -+ * BUSY status bit clear, but on some operations, like mount or -+ * in the beginning of a write / sync / umount, there is one -+ * DATAEND interrupt with the BUSY bit set, in this cases -+ * waiting for one more interrupt fixes the problem. -+ */ -+ if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { -+ if (status & TMIO_STAT_ILL_FUNC) -+ done = true; -+ } else { -+ if (!(status & TMIO_STAT_CMD_BUSY)) -+ done = true; -+ } -+ -+ if (!done) -+ goto out; -+ } -+ -+ /* mask sequencer irq */ -+ tmio_dm_write(host, DM_CM_INFO1_MASK, 0xffffffff); -+ tasklet_schedule(&host->seq_complete); -+ -+out: -+ spin_unlock(&host->lock); -+} -+#endif //CONFIG_MMC_SDHI_SEQ -+ - static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) - { - struct mmc_data *data; -@@ -737,6 +813,22 @@ static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, - static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, - int ireg, int status) - { -+#ifdef CONFIG_MMC_SDHI_SEQ -+ u64 dm_cm_info1; -+ -+ dm_cm_info1 = tmio_dm_read(host, DM_CM_INFO1); -+ if (dm_cm_info1 & DM_CM_INFO_SEQEND) { -+ u64 dm_cm_info2; -+ dm_cm_info2 = tmio_dm_read(host, DM_CM_INFO2); -+ tmio_dm_write(host, DM_CM_INFO1, 0x0); -+ tmio_dm_write(host, DM_CM_INFO2, 0x0); -+ tmio_mmc_ack_mmc_irqs(host, -+ TMIO_MASK_IRQ & ~(TMIO_STAT_CARD_REMOVE | -+ TMIO_STAT_CARD_INSERT)); -+ tmio_mmc_seq_irq(host, status, dm_cm_info1, dm_cm_info2); -+ return true; -+ } -+#endif //CONFIG_MMC_SDHI_SEQ - /* Command completion */ - if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { - tmio_mmc_ack_mmc_irqs(host, -@@ -814,6 +906,61 @@ irqreturn_t tmio_mmc_irq(int irq, void *devid) - } - EXPORT_SYMBOL(tmio_mmc_irq); - -+#ifdef CONFIG_MMC_SDHI_SEQ -+static int tmio_mmc_start_seq(struct tmio_mmc_host *host, -+ struct mmc_request *mrq) -+{ -+ struct tmio_mmc_data *pdata = host->pdata; -+ struct mmc_data *data = mrq->data; -+ -+ pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", -+ data->blksz, data->blocks); -+ -+ if (!host->chan_rx || !host->chan_tx) { -+ host->force_pio = true; -+ return 0; -+ } -+ -+ /* Some hardware cannot perform 2 byte requests in 4 bit mode */ -+ if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { -+ int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; -+ -+ if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { -+ pr_err("%s: %d byte block unsupported in 4 bit mode\n", -+ mmc_hostname(host->mmc), data->blksz); -+ return -EINVAL; -+ } -+ } -+ -+ tmio_mmc_init_sg(host, data); -+ host->cmd = mrq->cmd; -+ host->data = data; -+ -+ //FIXME -+ sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000); -+ //sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); -+ -+ tmio_mmc_start_sequencer(host); -+ -+ if (host->force_pio) { -+ host->cmd = NULL; -+ host->data = NULL; -+ } -+ -+ return 0; -+} -+ -+static void tmio_mmc_set_blklen_and_blkcnt(struct tmio_mmc_host *host, -+ struct mmc_data *data) -+{ -+ host->force_pio = true; -+ tmio_mmc_init_sg(host, data); -+ host->data = data; -+ -+ sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); -+ sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); -+} -+#else - static int tmio_mmc_start_data(struct tmio_mmc_host *host, - struct mmc_data *data) - { -@@ -845,6 +992,58 @@ static int tmio_mmc_start_data(struct tmio_mmc_host *host, - - return 0; - } -+#endif //CONFIG_MMC_SDHI_SEQ -+ -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+static void tmio_mmc_post_req(struct mmc_host *mmc, struct mmc_request *req, -+ int err) -+{ -+ struct tmio_mmc_host *host = mmc_priv(mmc); -+ struct mmc_data *data = req->data; -+ enum dma_data_direction dir; -+ -+ if (data && data->host_cookie == COOKIE_PRE_MAPPED) { -+ if (req->data->flags & MMC_DATA_READ) -+ dir = DMA_FROM_DEVICE; -+ else -+ dir = DMA_TO_DEVICE; -+ -+ dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, dir); -+ data->host_cookie = COOKIE_UNMAPPED; -+ } -+} -+ -+static void tmio_mmc_pre_req(struct mmc_host *mmc, struct mmc_request *req, -+ bool is_first_req) -+{ -+ struct tmio_mmc_host *host = mmc_priv(mmc); -+ struct mmc_data *data = req->data; -+ enum dma_data_direction dir; -+ int ret; -+ -+#if 1 //FIXME: IPMMU workaround, skip pre_dma_mapping -+#ifdef CONFIG_MMC_SDHI_SEQ -+ if (mmc->max_segs != 1 && mmc->max_segs != 3) -+#else -+ if (mmc->max_segs != 1) -+#endif -+ return; -+#endif -+ -+ if (data && data->host_cookie == COOKIE_UNMAPPED) { -+ if (req->data->flags & MMC_DATA_READ) -+ dir = DMA_FROM_DEVICE; -+ else -+ dir = DMA_TO_DEVICE; -+ -+ ret = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir); -+ if (ret <= 0) -+ dev_err(&host->pdev->dev, "%s: dma_map_sg failed\n", __func__); -+ else -+ data->host_cookie = COOKIE_PRE_MAPPED; -+ } -+} -+#endif //CONFIG_MMC_SDHI_PRE_REQ - - static void tmio_mmc_hw_reset(struct mmc_host *mmc) - { -@@ -934,6 +1133,25 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) - - spin_unlock_irqrestore(&host->lock, flags); - -+#ifdef CONFIG_MMC_SDHI_SEQ -+ //FIXME: SD_COMBO media not tested -+ if (mrq->data) { -+ /* Start SEQ */ -+ ret = tmio_mmc_start_seq(host, mrq); -+ if (ret) -+ goto fail; -+ else if (!host->force_pio) { -+ /* -+ * Successed to start SEQ -+ * Wait SEQ interrupt -+ */ -+ schedule_delayed_work(&host->delayed_reset_work, -+ msecs_to_jiffies(CMDREQ_TIMEOUT)); -+ return; -+ } -+ } -+#endif //CONFIG_MMC_SDHI_SEQ -+ - if (mrq->sbc) { - init_completion(&host->completion); - ret = tmio_mmc_start_command(host, mrq->sbc); -@@ -965,9 +1183,32 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) - } - - if (mrq->data) { -+#ifdef CONFIG_MMC_SDHI_SEQ -+ /* -+ * Failed to start SEQ -+ * Set blklen and blkcnt to transfer in PIO mode -+ */ -+ tmio_mmc_set_blklen_and_blkcnt(host, mrq->data); -+#else - ret = tmio_mmc_start_data(host, mrq->data); - if (ret) - goto fail; -+#endif -+ -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+ if (host->force_pio && -+ mrq->data->host_cookie == COOKIE_PRE_MAPPED) { -+ /* PIO mode, unmap pre_dma_mapped sg */ -+ enum dma_data_direction dir; -+ if (mrq->data->flags & MMC_DATA_READ) -+ dir = DMA_FROM_DEVICE; -+ else -+ dir = DMA_TO_DEVICE; -+ dma_unmap_sg(&host->pdev->dev, mrq->data->sg, -+ mrq->data->sg_len, dir); -+ mrq->data->host_cookie = COOKIE_UNMAPPED; -+ } -+#endif - } - - ret = tmio_mmc_start_command(host, mrq->cmd); -@@ -1160,6 +1401,10 @@ static int tmio_multi_io_quirk(struct mmc_card *card, - } - - static struct mmc_host_ops tmio_mmc_ops = { -+#ifdef CONFIG_MMC_SDHI_PRE_REQ -+ .post_req = tmio_mmc_post_req, -+ .pre_req = tmio_mmc_pre_req, -+#endif - .request = tmio_mmc_request, - .set_ios = tmio_mmc_set_ios, - .get_ro = tmio_mmc_get_ro, --- -1.9.1 - diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0013-IMR-driver-interim-patch.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0013-IMR-driver-interim-patch.patch index e863466..30cf006 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0013-IMR-driver-interim-patch.patch +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0013-IMR-driver-interim-patch.patch @@ -112,9 +112,9 @@ index 718afd6..f833031 100644 + DEF_MOD("imr2", 821, R8A7795_CLK_S2D1), + DEF_MOD("imr1", 822, R8A7795_CLK_S2D1), + DEF_MOD("imr0", 823, R8A7795_CLK_S2D1), - DEF_MOD("gpio7", 905, R8A7795_CLK_CP), - DEF_MOD("gpio6", 906, R8A7795_CLK_CP), - DEF_MOD("gpio5", 907, R8A7795_CLK_CP), + DEF_MOD("gpio7", 905, R8A7795_CLK_S3D4), + DEF_MOD("gpio6", 906, R8A7795_CLK_S3D4), + DEF_MOD("gpio5", 907, R8A7795_CLK_S3D4), diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index ba2b892..f4d12f5 100644 --- a/drivers/media/platform/Kconfig diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch index 0cb8cc6..f1a2cd6 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0018-arm64-renesas-r8a7797-Add-Renesas-R8A7797-SoC-suppor.patch @@ -1189,7 +1189,7 @@ index 0000000..c69bf31 + DEF_DIV6P1("csi0", R8A7797_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), + + DEF_FIXED("osc", R8A7797_CLK_OSC, CLK_PLL1_DIV2, (12*1024), 1), -+ DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32), ++ DEF_BASE("r_int", CLK_RINT, CLK_TYPE_GEN3_RINT, CLK_EXTAL), + + DEF_BASE("r", R8A7797_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT), +}; @@ -1393,9 +1393,9 @@ index f9d1763..96de154 100644 + return clk_register_divider_table(NULL, core->name, __clk_get_name(parent), 0, base + 0x0074, + 8, 4,0, cpg_sdh_div_table, &cpg_lock); + - case CLK_TYPE_GEN3_R: - if (cpg_quirks & RCKCR_CKSEL) { - /* + case CLK_TYPE_GEN3_RINT: + div = cpg_pll_config->rint; + break; @@ -799,5 +835,8 @@ int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config, if (attr) cpg_quirks = (uintptr_t)attr->data; diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0061-Sound-R-Car-support-8-channel-TDM-mode.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0061-Sound-R-Car-support-8-channel-TDM-mode.patch deleted file mode 100644 index 7eafa43..0000000 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0061-Sound-R-Car-support-8-channel-TDM-mode.patch +++ /dev/null @@ -1,44 +0,0 @@ -From b0de1ee4dced476e3ee7da330602fc6e7419934b Mon Sep 17 00:00:00 2001 -From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> -Date: Mon, 24 Jul 2017 20:24:29 +0300 -Subject: [PATCH] Sound: R-Car: support 8-channel TDM mode - -Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> ---- - sound/soc/sh/rcar/core.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c -index 448072cf9069..4807353e47d2 100644 ---- a/sound/soc/sh/rcar/core.c -+++ b/sound/soc/sh/rcar/core.c -@@ -678,6 +678,8 @@ static int rsnd_soc_set_dai_tdm_slot(struct snd_soc_dai *dai, - struct device *dev = rsnd_priv_to_dev(priv); - - switch (slots) { -+ case 8: -+ /* TDM Mode */ - case 6: - /* TDM Extend Mode */ - rsnd_set_slot(rdai, slots, 1); -@@ -775,7 +777,7 @@ static int rsnd_dai_probe(struct rsnd_priv *priv) - drv->playback.rates = RSND_RATES; - drv->playback.formats = RSND_FMTS; - drv->playback.channels_min = 2; -- drv->playback.channels_max = 6; -+ drv->playback.channels_max = 8; - drv->playback.stream_name = rdai->playback.name; - - snprintf(rdai->capture.name, RSND_DAI_NAME_SIZE, -@@ -783,7 +785,7 @@ static int rsnd_dai_probe(struct rsnd_priv *priv) - drv->capture.rates = RSND_RATES; - drv->capture.formats = RSND_FMTS; - drv->capture.channels_min = 2; -- drv->capture.channels_max = 6; -+ drv->capture.channels_max = 8; - drv->capture.stream_name = rdai->capture.name; - - rdai->playback.rdai = rdai; --- -2.13.0 - diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0065-gpio-max732x-set-gpio-ouput-low-at-init.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0065-gpio-max732x-set-gpio-ouput-low-at-init.patch deleted file mode 100644 index ff9661d..0000000 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0065-gpio-max732x-set-gpio-ouput-low-at-init.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 3c58ea643c31273b467400c04f3b1ed04fc0da2d Mon Sep 17 00:00:00 2001 -From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> -Date: Mon, 3 Jul 2017 02:43:21 +0300 -Subject: [PATCH] gpio: max732x: set gpio ouput-low at init - -Set all gpio output-low at init state instead -chip defaults. -This allows to avoid preserved values during resaet - -Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> ---- - drivers/gpio/gpio-max732x.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c -index b6fc8c5..4a2669f 100644 ---- a/drivers/gpio/gpio-max732x.c -+++ b/drivers/gpio/gpio-max732x.c -@@ -680,6 +680,10 @@ static int max732x_probe(struct i2c_client *client, - - mutex_init(&chip->lock); - -+ /* set all ports output-low at init state */ -+ max732x_writeb(chip, 0, 0); -+ max732x_writeb(chip, 1, 0); -+ - ret = max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]); - if (ret) - goto out_failed; --- -1.9.1 - diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0069-ASoC-ak4613-Improve-counting-DAI-number.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0069-ASoC-ak4613-Improve-counting-DAI-number.patch deleted file mode 100644 index d37479c..0000000 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0069-ASoC-ak4613-Improve-counting-DAI-number.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 411652982a20ab60957283e9084c81d791cb69f9 Mon Sep 17 00:00:00 2001 -From: Ryo Kodama <ryo.kodama.vz@renesas.com> -Date: Wed, 7 Jun 2017 14:39:00 +0900 -Subject: [PATCH] ASoC: ak4613: Improve counting DAI number - -Add the startup function to count DAI instead of hw_params. -This change matches the number of opened DAIs. -If this change isn't applied, you may get unexpected error due to -mismatching of count. Since the excution number of hw_params and -shutdown may be different, the mismatching happens. - -Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> -Signed-off-by: Ryo Kodama <ryo.kodama.vz@renesas.com> -Signed-off-by: Mark Brown <broonie@kernel.org> -Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> ---- - sound/soc/codecs/ak4613.c | 13 ++++++++++++- - 1 file changed, 12 insertions(+), 1 deletion(-) - -diff --git a/sound/soc/codecs/ak4613.c b/sound/soc/codecs/ak4613.c -index 557ac16d43e2..e3121ca3d1a2 100644 ---- a/sound/soc/codecs/ak4613.c -+++ b/sound/soc/codecs/ak4613.c -@@ -252,6 +252,17 @@ static void ak4613_dai_shutdown(struct snd_pcm_substream *substream, - mutex_unlock(&priv->lock); - } - -+static int ak4613_dai_startup(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct snd_soc_codec *codec = dai->codec; -+ struct ak4613_priv *priv = snd_soc_codec_get_drvdata(codec); -+ -+ priv->cnt++; -+ -+ return 0; -+} -+ - static int ak4613_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) - { - struct snd_soc_codec *codec = dai->codec; -@@ -349,7 +360,6 @@ static int ak4613_dai_hw_params(struct snd_pcm_substream *substream, - if ((priv->iface == NULL) || - (priv->iface == iface)) { - priv->iface = iface; -- priv->cnt++; - ret = 0; - } - mutex_unlock(&priv->lock); -@@ -398,6 +408,7 @@ static int ak4613_set_bias_level(struct snd_soc_codec *codec, - } - - static const struct snd_soc_dai_ops ak4613_dai_ops = { -+ .startup = ak4613_dai_startup, - .shutdown = ak4613_dai_shutdown, - .set_fmt = ak4613_dai_set_fmt, - .hw_params = ak4613_dai_hw_params, --- -2.13.0 - diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend index 43c9e10..1bb0580 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend @@ -12,7 +12,6 @@ SRC_URI_append = " \ file://0004-xhci-rcar-add-firmware-for-R-Car-H2-M2-USB-3.0-host-.patch \ file://0005-usb-host-xhci-plat-add-support-for-the-R-Car-H3-xHCI.patch \ file://0006-spi-spi-gpio-fix-set-CPOL-default-inverted.patch \ - file://0007-mmc-sh_mobile_sdhi-Add-R-CarGen3-SDHI-SEQUENCER-supp.patch \ file://0008-arm64-do-not-set-dma-masks-that-device-connection-ca.patch \ file://0009-swiotlb-ensure-that-page-sized-mappings-are-page-ali.patch \ file://0010-can-rcar_can-add-enable-and-standby-control-pins.patch \ @@ -47,14 +46,12 @@ SRC_URI_append = " \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE1", "1", " file://0050-arm64-dts-Gen3-view-boards-TYPE1-first-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_SECOND4_TYPE1", "1", " file://0051-arm64-dts-Gen3-view-boards-TYPE1-second-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE2", "1", " file://0052-arm64-dts-Gen3-view-boards-TYPE2-first-4-cameras.patch", "", d)} \ - file://0061-Sound-R-Car-support-8-channel-TDM-mode.patch \ file://0062-IIO-lsm9ds0-add-IMU-driver.patch \ file://0063-ASoC-PCM3168A-add-TDM-modes-merge-ADC-and-DAC.patch \ file://0064-ADV7511-limit-maximum-pixelclock.patch \ file://0066-pci-pcie-rcar-add-regulators-support.patch \ file://0067-ti-st-use-proper-way-to-get-shutdown-gpio.patch \ file://0068-drm-adv7511-use-smbus-to-retrieve-edid.patch \ - file://0069-ASoC-ak4613-Improve-counting-DAI-number.patch \ file://0070-clk-clk-5p49x-add-5P49V5925-chip.patch \ file://0071-ASoC-add-dummy-device-for-WL18xx-PCM-audio.patch \ file://0072-usb-hub-disable-autosuspend-for-SMSC-hubs.patch \ @@ -77,17 +74,11 @@ KERNEL_DEVICETREE_append_h3ulcb = " \ renesas/r8a7795-h3ulcb-had-beta.dtb \ renesas/r8a7795-h3ulcb-kf.dtb \ renesas/r8a7795-h3ulcb-vb.dtb \ - renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dtb \ - renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dtb \ - renesas/legacy/r8a7795-h3ulcb-kf-v0.dtb \ - renesas/legacy/r8a7795-h3ulcb-kf-v1.dtb \ " KERNEL_DEVICETREE_append_m3ulcb = " \ renesas/r8a7796-m3ulcb-view.dtb \ renesas/r8a7796-m3ulcb-kf.dtb \ - renesas/legacy/r8a7796-m3ulcb-kf-v0.dtb \ - renesas/legacy/r8a7796-m3ulcb-kf-v1.dtb \ " KERNEL_DEVICETREE_append_salvator-x = " \ @@ -103,5 +94,4 @@ KERNEL_DEVICETREE_append_eagle = " \ KERNEL_DEVICETREE_append_v3msk = " \ renesas/r8a7797-v3msk.dtb \ renesas/r8a7797-v3msk-kf.dtb \ - renesas/legacy/r8a7797-v3msk-kf-v0.dtb \ " |