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authorKhang Nguyen <khang.nguyen.xw@renesas.com>2018-09-03 23:50:35 -0400
committerDuy Dang <duy.dang.yw@rvc.renesas.com>2018-10-19 09:25:15 +0700
commite0272de38ce87f2a9b0e2bac4162d87d11735992 (patch)
tree7e9c97eda270f6991e813742313cf8e9d6220b2a /meta-rcar-gen3/recipes-bsp/arm-trusted-firmware
parentfea65609a564a85b508a1cb29bbf97c7c9b5bf5f (diff)
rcar-gen3: IPL: Update IPL to the latest version
This commit updates IPL/Secure Monitor for the following changes: Update IPL and Secure Monitor Rev1.0.22 [IPL] - Update CPG setting. - Add support Ebisu-4D board. - Change the timing to invalidate of instruction cache. - Fixed a bug in the exception handler. - Update DDR setting for E3. [Secure Monitor] - Add the wait processing that is placed in the system RAM area for Suspend To RAM. Update optee_os Rev1.0.15 - Fix the polling process of the HyperFlash driver waiting for HW completion. - Fix incorrect memory access in RSA processing using a provider for a HW engine driver. - Fix a conditional branch in a mutex_destroy function. Signed-off-by: Khang Nguyen <khang.nguyen.xw@renesas.com> Signed-off-by: Duy Dang <duy.dang.yw@rvc.renesas.com> Signed-off-by: Takamitsu Honda <takamitsu.honda.pv@renesas.com>
Diffstat (limited to 'meta-rcar-gen3/recipes-bsp/arm-trusted-firmware')
-rw-r--r--meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb b/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
index 1a772cf..4138afe 100644
--- a/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
+++ b/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
@@ -13,7 +13,7 @@ S = "${WORKDIR}/git"
BRANCH = "rcar_gen3"
SRC_URI = "git://github.com/renesas-rcar/arm-trusted-firmware.git;branch=${BRANCH}"
-SRCREV = "15dba6bb5868bdfad723bb727684b37b48643fec"
+SRCREV = "d4a607b7ea3886d8d1098192d2c657face631202"
PV = "v1.4+renesas+git${SRCPV}"