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| author |   Mark Farrugia <mark.farrugia@fiberdyne.com.au> | 2018-12-02 00:24:21 +1100 |
|---|---|---|
| committer |   Ronan Le Martret <ronan.lemartret@iot.bzh> | 2019-09-13 10:31:20 +0200 |
| commit | 24e138f2f5bfc5700f24c3d09cf3c7ca78fb1d24 (patch) | |
| tree | 7e1fcc67654d9273a1bf486f9d66d43d8ebcc92f /meta-rcar-gen3/recipes-core | |
| parent | 62ef568cb2d9cdecde8cc58d677f1a42722ff3a5 (diff) | |
[COMMUNITY] Fix SSI DMAC inaccessible via Xtensa HiFi2 ADSP firmware
The upgrade of the kernel to 4.14.35 has changed the SSI interface in
the RCar SoC sound driver, making it that the Xtensa HiFi2 ADSP firmware
can no longer directly access the SSI DMA controller in order to
route audio directly out to hardware. This seems to fix this issue,
allowing the Fiberdyne DSP to fully operate again on 4.14.35 kernels.
Change-Id: Id89843b0a8a65f07964027639dde68791261cab6
Signed-off-by: Mark Farrugia <mark.farrugia@fiberdyne.com.au>
Diffstat (limited to 'meta-rcar-gen3/recipes-core')
0 files changed, 0 insertions, 0 deletions