rcar-gen3: IPL: Update SRCREV to follow the latest version

This commit updates IPL and Secure Monitor to Rev1.0.20 rev2 for
following changes:

[IPL]
- [H/W Restriction No.100] Disable TLB function on IPMMU-PV1 cache on
H3 Ver.2.0.
- Update H3 Ver.3.0 QoS setting rev.0.06.
- Fix the IPL cannot load images to 40-bit address space with eMMC when
D-Cache enables.
- Add processing to read MSTP status into BL2.
- Delete unnecessary register setting.
- Add the SWTCNT setting of E3.
- Change the unit of transfer size to 256 bytes for RPC, and improved
DMA transfer processing.
- Add DDR Memory Config log.

[Secure Monitor]
- Add processing to read MSTP status into BL31.

For optee_os, it updates reversion to Rev1.0.13 for following change:
- Add processing to read MSTP status into MFIS.

It deletes the option which enables Lossy area for E3.
It also supports build option for H3:

- For R-Car H3 SiP DDR 8GiB (2GiB x 4ch), specify "RCAR_DRAM_SPLIT=1"
- For R-Car H3 SiP DDR 4GiB (2GiB X 2ch), specify "RCAR_DRAM_SPLIT=2
RCAR_DRAM_CHANNEL=5"
- For R-Car H3 SiP DDR 4GiB (1GiB x 4ch), specify "RCAR_DRAM_SPLIT=1
RCAR_DRAM_LPDDR4_MEMCONF=0"

Signed-off-by: Khang Nguyen <khang.nguyen.xv@rvc.renesas.com>
Signed-off-by: Takamitsu Honda <takamitsu.honda.pv@renesas.com>

0 files changed, 0 insertions, 0 deletions