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| author |   Duy Dang <duy.dang.yw@rvc.renesas.com> | 2019-02-15 16:16:32 +0700 |
|---|---|---|
| committer |   Thuy Tran <thuy.tran.xh@renesas.com> | 2019-05-23 16:11:57 +0700 |
| commit | 62df1d0ddddcf65f37a30bd37be953abe12e7cbd (patch) | |
| tree | bdaf948f314ee023dba8593b8a188d73ad462720 /meta-rcar-gen3/recipes-kernel/kernel-module-vspmif | |
| parent | da84a3b8dab6053c494cce907dc829b2619ce650 (diff) | |
rcar-gen3: arm-trusted-firmware: Update SRCREV to Rev.2.0.3
This commit updates IPL and Secure Monitor to Rev.2.0.3 for the
following changes:
[IPL]
- Add support for M3 Ver.1.3/3.0
- Add QoS setting for M3 Ver.3.0
- Add DDR setting for M3 Ver.3.0
- Add E3 Ver.1.1 to build option
- Change periodic write DQ training option
- Add new board revision for H3ULCB
- Remove duplicate line in qos.mk
- Change subslot cycle
- Update DDR setting rev.0.35
- BL2/BL31: Update IPL and Secure Monitor Rev2.0.3
- BL31: Change to restore timer counter value at resume
- BL31: Add DBSC4 setting before self-refresh mode
[Secure Monitor]
- Add SiP for getting board ID
- Change Suspend To RAM function for M3 Ver.3.0
- Change condition of product code with cluster off function
Change-Id: I9eb8e11e679742cf315089670dee1ae90954fc43
Signed-off-by: Duy Dang <duy.dang.yw@renesas.com>
Signed-off-by: Khang Nguyen <khang.nguyen.xw@renesas.com>
Signed-off-by: Takamitsu Honda <takamitsu.honda.pv@renesas.com>
(cherry picked from commit 74e431ec9d3ea20c91cbd2fc6199794cbe43c720)
Diffstat (limited to 'meta-rcar-gen3/recipes-kernel/kernel-module-vspmif')
0 files changed, 0 insertions, 0 deletions