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authorMark Farrugia <mark.farrugia@fiberdyne.com.au>2018-12-02 00:24:21 +1100
committerStephane Desneux <stephane.desneux@iot.bzh>2020-05-19 18:57:06 +0000
commit6cd1e89df19b5f4b28fb1cd22d1fdc0e70505908 (patch)
tree56078acdcd8f84e4c12548104e76b0efaca88dd0 /meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-drm-rcar-du-Set-primary-plane-zpos-immutably-at-init.patch
parent9e58bd97144ab56a7858c6cd2206d3bd793bb09e (diff)
[COMMUNITY] Fix SSI DMAC inaccessible via Xtensa HiFi2 ADSP firmware
The upgrade of the kernel to 4.14.35 has changed the SSI interface in the RCar SoC sound driver, making it that the Xtensa HiFi2 ADSP firmware can no longer directly access the SSI DMA controller in order to route audio directly out to hardware. This seems to fix this issue, allowing the Fiberdyne DSP to fully operate again on 4.14.35 kernels. Change-Id: Id89843b0a8a65f07964027639dde68791261cab6 Signed-off-by: Mark Farrugia <mark.farrugia@fiberdyne.com.au>
Diffstat (limited to 'meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-drm-rcar-du-Set-primary-plane-zpos-immutably-at-init.patch')
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