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-rw-r--r--meta-rcar-gen3-adas/conf/machine/v3hsk.conf41
-rw-r--r--meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/bblayers.conf16
-rw-r--r--meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/local.conf267
-rw-r--r--meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend6
-rw-r--r--meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb2
-rw-r--r--meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/00201-board-renesas-Add-V3HSK-board.patch548
-rw-r--r--meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend1
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/kernel-module-mmngr/kernel-module-mmngr.bbappend1
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch380
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3hsk.cfg40
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend6
11 files changed, 1301 insertions, 7 deletions
diff --git a/meta-rcar-gen3-adas/conf/machine/v3hsk.conf b/meta-rcar-gen3-adas/conf/machine/v3hsk.conf
new file mode 100644
index 0000000..2e70003
--- /dev/null
+++ b/meta-rcar-gen3-adas/conf/machine/v3hsk.conf
@@ -0,0 +1,41 @@
+#@TYPE: Machine
+#@NAME: V3HSK machine
+#@DESCRIPTION: Machine configuration for running V3HSK
+
+DEFAULTTUNE ?= "cortexa53"
+require conf/machine/include/tune-cortexa53.inc
+require conf/machine/include/${SOC_FAMILY}.inc
+
+# 32BIT package install (default is disable)
+# This variables can be used only in multilib.
+USE_32BIT_PKGS ?= "0"
+USE_32BIT_WAYLAND ?= "0"
+USE_32BIT_MMP ?= "0"
+
+MACHINE_FEATURES = ""
+
+KERNEL_IMAGETYPE = "Image"
+IMAGE_FSTYPES = "tar.bz2 ext4 cpio.gz"
+
+SERIAL_CONSOLE = "115200 ttySC0"
+
+# Configuration for kernel
+PREFERRED_PROVIDER_virtual/kernel = "linux-renesas"
+KERNEL_DEVICETREE = "renesas/r8a7798-v3hsk.dtb"
+
+# Configuration for CR7 Loader
+EXTRA_IMAGEDEPENDS += " cr7-loader"
+
+# Configuration for ARM Trusted Firmware
+EXTRA_IMAGEDEPENDS += " arm-trusted-firmware"
+
+# u-boot
+PREFERRED_VERSION_u-boot = "v2015.04%"
+EXTRA_IMAGEDEPENDS += " u-boot"
+UBOOT_MACHINE = "v3hsk_defconfig"
+
+# libdrm
+PREFERRED_VERSION_libdrm = "2.4.68"
+
+# Add variable to Build Configuration in build log
+BUILDCFG_VARS_append = " SOC_FAMILY"
diff --git a/meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/bblayers.conf b/meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/bblayers.conf
new file mode 100644
index 0000000..96ff8ad
--- /dev/null
+++ b/meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/bblayers.conf
@@ -0,0 +1,16 @@
+# POKY_BBLAYERS_CONF_VERSION is increased each time build/conf/bblayers.conf
+# changes incompatibly
+POKY_BBLAYERS_CONF_VERSION = "2"
+
+BBPATH = "${TOPDIR}"
+BBFILES ?= ""
+
+BBLAYERS ?= " \
+ ${TOPDIR}/../poky/meta \
+ ${TOPDIR}/../poky/meta-poky \
+ ${TOPDIR}/../poky/meta-yocto-bsp \
+ ${TOPDIR}/../meta-renesas/meta-rcar-gen3 \
+ ${TOPDIR}/../meta-linaro/meta-linaro-toolchain \
+ ${TOPDIR}/../meta-linaro/meta-optee \
+ ${TOPDIR}/../meta-openembedded/meta-oe \
+ "
diff --git a/meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/local.conf b/meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/local.conf
new file mode 100644
index 0000000..69fee74
--- /dev/null
+++ b/meta-rcar-gen3-adas/docs/sample/conf/v3hsk/linaro-gcc/bsp/local.conf
@@ -0,0 +1,267 @@
+#
+# This file is your local configuration file and is where all local user settings
+# are placed. The comments in this file give some guide to the options a new user
+# to the system might want to change but pretty much any configuration option can
+# be set in this file. More adventurous users can look at local.conf.extended
+# which contains other examples of configuration which can be placed in this file
+# but new users likely won't need any of them initially.
+#
+# Lines starting with the '#' character are commented out and in some cases the
+# default values are provided as comments to show people example syntax. Enabling
+# the option is a question of removing the # character and making any change to the
+# variable as required.
+
+#
+# Machine Selection
+#
+# You need to select a specific machine to target the build with. There are a selection
+# of emulated machines available which can boot and run in the QEMU emulator:
+#
+#MACHINE ?= "qemuarm"
+#MACHINE ?= "qemuarm64"
+#MACHINE ?= "qemumips"
+#MACHINE ?= "qemumips64"
+#MACHINE ?= "qemuppc"
+#MACHINE ?= "qemux86"
+#MACHINE ?= "qemux86-64"
+#
+# There are also the following hardware board target machines included for
+# demonstration purposes:
+#
+#MACHINE ?= "beaglebone"
+#MACHINE ?= "genericx86"
+#MACHINE ?= "genericx86-64"
+#MACHINE ?= "mpc8315e-rdb"
+#MACHINE ?= "edgerouter"
+#
+# This sets the default machine to be qemux86 if no other machine is selected:
+MACHINE ??= "v3hsk"
+
+SOC_FAMILY = "r8a7798"
+
+#
+# Where to place downloads
+#
+# During a first build the system will download many different source code tarballs
+# from various upstream projects. This can take a while, particularly if your network
+# connection is slow. These are all stored in DL_DIR. When wiping and rebuilding you
+# can preserve this directory to speed up this part of subsequent builds. This directory
+# is safe to share between multiple builds on the same machine too.
+#
+# The default is a downloads directory under TOPDIR which is the build directory.
+#
+#DL_DIR ?= "${TOPDIR}/downloads"
+
+#
+# Where to place shared-state files
+#
+# BitBake has the capability to accelerate builds based on previously built output.
+# This is done using "shared state" files which can be thought of as cache objects
+# and this option determines where those files are placed.
+#
+# You can wipe out TMPDIR leaving this directory intact and the build would regenerate
+# from these files if no changes were made to the configuration. If changes were made
+# to the configuration, only shared state files where the state was still valid would
+# be used (done using checksums).
+#
+# The default is a sstate-cache directory under TOPDIR.
+#
+#SSTATE_DIR ?= "${TOPDIR}/sstate-cache"
+
+#
+# Where to place the build output
+#
+# This option specifies where the bulk of the building work should be done and
+# where BitBake should place its temporary files and output. Keep in mind that
+# this includes the extraction and compilation of many applications and the toolchain
+# which can use Gigabytes of hard disk space.
+#
+# The default is a tmp directory under TOPDIR.
+#
+#TMPDIR = "${TOPDIR}/tmp"
+
+#
+# Default policy config
+#
+# The distribution setting controls which policy settings are used as defaults.
+# The default value is fine for general Yocto project use, at least initially.
+# Ultimately when creating custom policy, people will likely end up subclassing
+# these defaults.
+#
+DISTRO ?= "poky"
+# As an example of a subclass there is a "bleeding" edge policy configuration
+# where many versions are set to the absolute latest code from the upstream
+# source control systems. This is just mentioned here as an example, its not
+# useful to most new users.
+# DISTRO ?= "poky-bleeding"
+
+#
+# Package Management configuration
+#
+# This variable lists which packaging formats to enable. Multiple package backends
+# can be enabled at once and the first item listed in the variable will be used
+# to generate the root filesystems.
+# Options are:
+# - 'package_deb' for debian style deb files
+# - 'package_ipk' for ipk files are used by opkg (a debian style embedded package manager)
+# - 'package_rpm' for rpm style packages
+# E.g.: PACKAGE_CLASSES ?= "package_rpm package_deb package_ipk"
+# We default to rpm:
+PACKAGE_CLASSES ?= "package_ipk"
+
+#
+# SDK target architecture
+#
+# This variable specifies the architecture to build SDK items for and means
+# you can build the SDK packages for architectures other than the machine you are
+# running the build on (i.e. building i686 packages on an x86_64 host).
+# Supported values are i686 and x86_64
+#SDKMACHINE ?= "i686"
+
+#
+# Extra image configuration defaults
+#
+# The EXTRA_IMAGE_FEATURES variable allows extra packages to be added to the generated
+# images. Some of these options are added to certain image types automatically. The
+# variable can contain the following options:
+# "dbg-pkgs" - add -dbg packages for all installed packages
+# (adds symbol information for debugging/profiling)
+# "dev-pkgs" - add -dev packages for all installed packages
+# (useful if you want to develop against libs in the image)
+# "ptest-pkgs" - add -ptest packages for all ptest-enabled packages
+# (useful if you want to run the package test suites)
+# "tools-sdk" - add development tools (gcc, make, pkgconfig etc.)
+# "tools-debug" - add debugging tools (gdb, strace)
+# "eclipse-debug" - add Eclipse remote debugging support
+# "tools-profile" - add profiling tools (oprofile, lttng, valgrind)
+# "tools-testapps" - add useful testing tools (ts_print, aplay, arecord etc.)
+# "debug-tweaks" - make an image suitable for development
+# e.g. ssh root access has a blank password
+# There are other application targets that can be used here too, see
+# meta/classes/image.bbclass and meta/classes/core-image.bbclass for more details.
+# We default to enabling the debugging tweaks.
+EXTRA_IMAGE_FEATURES ?= "debug-tweaks"
+
+#
+# Additional image features
+#
+# The following is a list of additional classes to use when building images which
+# enable extra features. Some available options which can be included in this variable
+# are:
+# - 'buildstats' collect build statistics
+# - 'image-mklibs' to reduce shared library files size for an image
+# - 'image-prelink' in order to prelink the filesystem image
+# - 'image-swab' to perform host system intrusion detection
+# NOTE: if listing mklibs & prelink both, then make sure mklibs is before prelink
+# NOTE: mklibs also needs to be explicitly enabled for a given image, see local.conf.extended
+# image-prelink disabled for now due to issues with IFUNC symbol relocation
+USER_CLASSES ?= "buildstats image-mklibs"
+
+#
+# Runtime testing of images
+#
+# The build system can test booting virtual machine images under qemu (an emulator)
+# after any root filesystems are created and run tests against those images. To
+# enable this uncomment this line. See classes/testimage(-auto).bbclass for
+# further details.
+#TEST_IMAGE = "1"
+#
+# Interactive shell configuration
+#
+# Under certain circumstances the system may need input from you and to do this it
+# can launch an interactive shell. It needs to do this since the build is
+# multithreaded and needs to be able to handle the case where more than one parallel
+# process may require the user's attention. The default is iterate over the available
+# terminal types to find one that works.
+#
+# Examples of the occasions this may happen are when resolving patches which cannot
+# be applied, to use the devshell or the kernel menuconfig
+#
+# Supported values are auto, gnome, xfce, rxvt, screen, konsole (KDE 3.x only), none
+# Note: currently, Konsole support only works for KDE 3.x due to the way
+# newer Konsole versions behave
+#OE_TERMINAL = "auto"
+# By default disable interactive patch resolution (tasks will just fail instead):
+PATCHRESOLVE = "noop"
+
+#
+# Disk Space Monitoring during the build
+#
+# Monitor the disk space during the build. If there is less that 1GB of space or less
+# than 100K inodes in any key build location (TMPDIR, DL_DIR, SSTATE_DIR), gracefully
+# shutdown the build. If there is less that 100MB or 1K inodes, perform a hard abort
+# of the build. The reason for this is that running completely out of space can corrupt
+# files and damages the build in ways which may not be easily recoverable.
+# It's necesary to monitor /tmp, if there is no space left the build will fail
+# with very exotic errors.
+BB_DISKMON_DIRS = "\
+ STOPTASKS,${TMPDIR},1G,100K \
+ STOPTASKS,${DL_DIR},1G,100K \
+ STOPTASKS,${SSTATE_DIR},1G,100K \
+ STOPTASKS,/tmp,100M,100K \
+ ABORT,${TMPDIR},100M,1K \
+ ABORT,${DL_DIR},100M,1K \
+ ABORT,${SSTATE_DIR},100M,1K \
+ ABORT,/tmp,10M,1K"
+
+#
+# Shared-state files from other locations
+#
+# As mentioned above, shared state files are prebuilt cache data objects which can
+# used to accelerate build time. This variable can be used to configure the system
+# to search other mirror locations for these objects before it builds the data itself.
+#
+# This can be a filesystem directory, or a remote url such as http or ftp. These
+# would contain the sstate-cache results from previous builds (possibly from other
+# machines). This variable works like fetcher MIRRORS/PREMIRRORS and points to the
+# cache locations to check for the shared objects.
+# NOTE: if the mirror uses the same structure as SSTATE_DIR, you need to add PATH
+# at the end as shown in the examples below. This will be substituted with the
+# correct path within the directory structure.
+#SSTATE_MIRRORS ?= "\
+#file://.* http://someserver.tld/share/sstate/PATH;downloadfilename=PATH \n \
+#file://.* file:///some/local/dir/sstate/PATH"
+
+
+#
+# Qemu configuration
+#
+# By default qemu will build with a builtin VNC server where graphical output can be
+# seen. The two lines below enable the SDL backend too. By default libsdl-native will
+# be built, if you want to use your host's libSDL instead of the minimal libsdl built
+# by libsdl-native then uncomment the ASSUME_PROVIDED line below.
+PACKAGECONFIG_append_pn-qemu-native = " sdl"
+PACKAGECONFIG_append_pn-nativesdk-qemu = " sdl"
+#ASSUME_PROVIDED += "libsdl-native"
+
+# CONF_VERSION is increased each time build/conf/ changes incompatibly and is used to
+# track the version of this file when it was generated. This can safely be ignored if
+# this doesn't mean anything to you.
+CONF_VERSION = "1"
+
+# Add systemd configuration
+DISTRO_FEATURES_append = " systemd"
+VIRTUAL-RUNTIME_init_manager = "systemd"
+
+# Linaro GCC
+GCCVERSION = "linaro-5.2"
+
+# add the static lib to SDK toolchain
+SDKIMAGE_FEATURES_append = " staticdev-pkgs"
+
+# Disable optee in meta-linaro layer
+BBMASK = "meta-linaro/meta-optee/recipes-security/optee"
+
+# Mask graphic Pkgs
+BBMASK .= "|gles-user-module|kernel-module-gles|wayland-kms|libgbm"
+# Mask MMP recipes
+BBMASK .= "|kernel-module-uvcs-drv|omx-user-module"
+
+# Add for gstreamer plugins ugly
+LICENSE_FLAGS_WHITELIST = "commercial"
+
+# Linux ICCOM driver (RCG3ZLIDL4001ZNO)
+# Linux ICCOM library (RCG3ZLILL4001ZNO)
+#DISTRO_FEATURES_append = " iccom"
+
+IMAGE_INSTALL_remove = "optee-linuxdriver optee-linuxdriver-armtz optee-client"
diff --git a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
index 253762c..0de1218 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
+++ b/meta-rcar-gen3-adas/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
@@ -4,6 +4,7 @@ COMPATIBLE_MACHINE_eagle = "eagle"
COMPATIBLE_MACHINE_v3msk = "v3msk"
COMPATIBLE_MACHINE_v3mzf = "v3mzf"
COMPATIBLE_MACHINE_condor = "condor"
+COMPATIBLE_MACHINE_v3hsk = "v3hsk"
ATFW_OPT_r8a7797 = "LSI=V3M RCAR_DRAM_SPLIT=0 RCAR_LOSSY_ENABLE=0 PMIC_ROHM_BD9571=0 RCAR_SYSTEM_SUSPEND=0 SPD=none"
ATFW_OPT_r8a7798 = "LSI=V3H RCAR_DRAM_SPLIT=0 RCAR_LOSSY_ENABLE=0 PMIC_ROHM_BD9571=0 RCAR_SYSTEM_SUSPEND=0 SPD=none RCAR_SECURE_BOOT=0"
@@ -27,3 +28,8 @@ do_deploy_append_condor() {
rm ${DEPLOYDIR}/bootparam_sa0.bin
rm ${DEPLOYDIR}/bootparam_sa0.srec
}
+
+do_deploy_append_v3hsk() {
+ rm ${DEPLOYDIR}/bootparam_sa0.bin
+ rm ${DEPLOYDIR}/bootparam_sa0.srec
+}
diff --git a/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb b/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb
index bc80d42..e990273 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb
+++ b/meta-rcar-gen3-adas/recipes-bsp/cr7-loader/cr7-loader_git.bb
@@ -15,7 +15,7 @@ SRCREV = "9570cd170e876801370560bb0c417816cbfe21d2"
PV = "v1.0+renesas+git"
-COMPATIBLE_MACHINE = "condor"
+COMPATIBLE_MACHINE = "condor|v3hsk"
PLATFORM = "rcar"
do_compile() {
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/00201-board-renesas-Add-V3HSK-board.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/00201-board-renesas-Add-V3HSK-board.patch
new file mode 100644
index 0000000..94067dc
--- /dev/null
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/00201-board-renesas-Add-V3HSK-board.patch
@@ -0,0 +1,548 @@
+From 519ee2d3ff6049263277b24dd8326a27a8d102e2 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Tue, 13 Feb 2018 17:17:39 +0300
+Subject: [PATCH] board: renesas: Add V3H Starter Kit board
+
+V3H Starter Kit is a board based on R-Car V3H SoC (R8A7798)
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+---
+ arch/arm/cpu/armv8/Kconfig | 4 +
+ board/renesas/v3hsk/Kconfig | 15 +++
+ board/renesas/v3hsk/MAINTAINERS | 6 +
+ board/renesas/v3hsk/Makefile | 10 ++
+ board/renesas/v3hsk/v3hsk.c | 263 ++++++++++++++++++++++++++++++++++++++++
+ configs/v3hsk_defconfig | 10 ++
+ include/configs/v3hsk.h | 160 ++++++++++++++++++++++++
+ 7 files changed, 468 insertions(+)
+ create mode 100644 board/renesas/v3hsk/Kconfig
+ create mode 100644 board/renesas/v3hsk/MAINTAINERS
+ create mode 100644 board/renesas/v3hsk/Makefile
+ create mode 100644 board/renesas/v3hsk/v3hsk.c
+ create mode 100644 configs/v3hsk_defconfig
+ create mode 100644 include/configs/v3hsk.h
+
+diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
+index a2706a6..7309838 100644
+--- a/arch/arm/cpu/armv8/Kconfig
++++ b/arch/arm/cpu/armv8/Kconfig
+@@ -28,6 +28,9 @@ config TARGET_V3MZF
+ config TARGET_CONDOR
+ bool "CONDOR board"
+
++config TARGET_V3HSK
++ bool "V3HSK board"
++
+ endchoice
+
+ config R8A7796X
+@@ -64,5 +67,6 @@ source "board/renesas/eagle/Kconfig"
+ source "board/renesas/v3msk/Kconfig"
+ source "board/renesas/condor/Kconfig"
+ source "board/renesas/v3mzf/Kconfig"
++source "board/renesas/v3hsk/Kconfig"
+
+ endif
+diff --git a/board/renesas/v3hsk/Kconfig b/board/renesas/v3hsk/Kconfig
+new file mode 100644
+index 0000000..2346ee8
+--- /dev/null
++++ b/board/renesas/v3hsk/Kconfig
+@@ -0,0 +1,15 @@
++if TARGET_V3HSK
++
++config SYS_SOC
++ default "rcar_gen3"
++
++config SYS_BOARD
++ default "v3hsk"
++
++config SYS_VENDOR
++ default "renesas"
++
++config SYS_CONFIG_NAME
++ default "v3hsk" if R8A7798
++
++endif
+diff --git a/board/renesas/v3hsk/MAINTAINERS b/board/renesas/v3hsk/MAINTAINERS
+new file mode 100644
+index 0000000..f9176b5
+--- /dev/null
++++ b/board/renesas/v3hsk/MAINTAINERS
+@@ -0,0 +1,6 @@
++CONDOR BOARD
++M: Cogent Embedded, Inc. <source@cogentembedded.com>
++S: Maintained
++F: board/renesas/v3hsk/
++F: include/configs/v3hsk.h
++F: configs/v3hsk_defconfig
+diff --git a/board/renesas/v3hsk/Makefile b/board/renesas/v3hsk/Makefile
+new file mode 100644
+index 0000000..0ac2642
+--- /dev/null
++++ b/board/renesas/v3hsk/Makefile
+@@ -0,0 +1,10 @@
++#
++# board/renesas/v3hsk/Makefile
++#
++# Copyright (C) 2018 Renesas Electronics Corp.
++# Copyright (C) 2018 Cogent Embedded, Inc.
++#
++# SPDX-License-Identifier: GPL-2.0+
++#
++
++obj-y := v3hsk.o ../rcar-gen3-common/common.o
+diff --git a/board/renesas/v3hsk/v3hsk.c b/board/renesas/v3hsk/v3hsk.c
+new file mode 100644
+index 0000000..df61428
+--- /dev/null
++++ b/board/renesas/v3hsk/v3hsk.c
+@@ -0,0 +1,263 @@
++/*
++ * board/renesas/v3hsk/v3hsk.c
++ * This is V3HSK board support.
++ *
++ * Copyright (C) 2018 Renesas Electronics Corp.
++ * Copyright (C) 2018 Cogent Embedded, Inc.
++ *
++ * SPDX-License-Identifier: GPL-2.0+
++ */
++
++#include <common.h>
++#include <malloc.h>
++#include <netdev.h>
++#include <dm.h>
++#include <dm/platform_data/serial_sh.h>
++#include <asm/processor.h>
++#include <asm/mach-types.h>
++#include <asm/io.h>
++#include <asm/errno.h>
++#include <asm/arch/sys_proto.h>
++#include <asm/gpio.h>
++#include <asm/arch/prr_depend.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/rcar_gen3.h>
++#include <asm/arch/rcar-mstp.h>
++#include <asm/arch/sh_sdhi.h>
++#include <i2c.h>
++#include <mmc.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++#define SCIF0_MSTP207 (1 << 7)
++#define GETHER_MSTP813 (1 << 13)
++#define RPC_MSTP917 (1 << 17)
++#define SD0_MSTP314 (1 << 14)
++
++#define SD0CKCR 0xE6150074
++
++#define PFC_PMMR 0xe6060000
++#define PFC_POC1 0xe6060384
++#define POC_MMC_3V3 0x00fff800
++
++void s_init(void)
++{
++ struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
++ struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
++
++ /* Watchdog init */
++ writel(0xA5A5A500, &rwdt->rwtcsra);
++ writel(0xA5A5A500, &swdt->swtcsra);
++}
++
++int board_early_init_f(void)
++{
++ int freq;
++
++ rcar_prr_init();
++
++ writel(0xa5a5ffff, 0xe6150900);
++ writel(0x5a5a0000, 0xe6150904);
++ mstp_clrbits_le32(MSTPSR1, SMSTPCR1, 0x02000000);
++ /* SCIF0 */
++ mstp_clrbits_le32(MSTPSR2, SMSTPCR2, SCIF0_MSTP207);
++ /* SDHI0/MMC */
++ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314);
++#if defined(CONFIG_RAVB)
++ /* RAVB Ethernet */
++ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, RAVB_MSTP812);
++#elif defined(CONFIG_SH_ETHER)
++ /* Gigabit Ethernet */
++ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, GETHER_MSTP813);
++#endif
++ /* QSPI/RPC */
++ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, RPC_MSTP917);
++
++ freq = rcar_get_sdhi_config_clk();
++ writel(freq, SD0CKCR);
++
++ return 0;
++}
++
++int board_init(void)
++{
++ /* address of boot parameters */
++ gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
++
++ /* Init PFC controller */
++ pinmux_init();
++#if defined(CONFIG_RAVB)
++ gpio_request(GPIO_GFN_AVB0_AVTP_CAPTURE, NULL);
++ gpio_request(GPIO_GFN_AVB0_AVTP_MATCH, NULL);
++ gpio_request(GPIO_FN_AVB0_LINK, NULL);
++ gpio_request(GPIO_FN_AVB0_PHY_INT, NULL);
++ /* gpio_request(GPIO_FN_AVB0_MAGIC, NULL); - PHY reset gpio */
++ gpio_request(GPIO_FN_AVB0_MDC, NULL);
++ gpio_request(GPIO_FN_AVB0_MDIO, NULL);
++ gpio_request(GPIO_FN_AVB0_TXCREFCLK, NULL);
++ gpio_request(GPIO_FN_AVB0_TD3, NULL);
++ gpio_request(GPIO_FN_AVB0_TD2, NULL);
++ gpio_request(GPIO_FN_AVB0_TD1, NULL);
++ gpio_request(GPIO_FN_AVB0_TD0, NULL);
++ gpio_request(GPIO_FN_AVB0_TXC, NULL);
++ gpio_request(GPIO_FN_AVB0_TX_CTL, NULL);
++ gpio_request(GPIO_FN_AVB0_RD3, NULL);
++ gpio_request(GPIO_FN_AVB0_RD2, NULL);
++ gpio_request(GPIO_FN_AVB0_RD1, NULL);
++ gpio_request(GPIO_FN_AVB0_RD0, NULL);
++ gpio_request(GPIO_FN_AVB0_RXC, NULL);
++ gpio_request(GPIO_FN_AVB0_RX_CTL, NULL);
++ gpio_request(GPIO_IFN_AVB0_AVTP_CAPTURE, NULL);
++ gpio_request(GPIO_FN_AVB0_AVTP_PPS, NULL);
++
++ /* PHY_RST */
++ gpio_request(GPIO_GP_1_16, NULL);
++ gpio_direction_output(GPIO_GP_1_16, 0);
++ mdelay(20);
++ gpio_set_value(GPIO_GP_1_16, 1);
++ udelay(1);
++#elif defined(CONFIG_SH_ETHER)
++ gpio_request(GPIO_FN_GETHER_LINK_A, NULL);
++ gpio_request(GPIO_FN_GETHER_PHY_INT_A, NULL);
++ /* gpio_request(GPIO_FN_GETHER_MAGIC, NULL); - PHY reset gpio */
++ gpio_request(GPIO_FN_GETHER_MDC_A, NULL);
++ gpio_request(GPIO_FN_GETHER_MDIO_A, NULL);
++ gpio_request(GPIO_FN_GETHER_TXCREFCLK, NULL);
++ gpio_request(GPIO_FN_GETHER_TXCREFCLK_MEGA, NULL);
++ gpio_request(GPIO_FN_GETHER_TD3, NULL);
++ gpio_request(GPIO_FN_GETHER_TD2, NULL);
++ gpio_request(GPIO_FN_GETHER_TD1, NULL);
++ gpio_request(GPIO_FN_GETHER_TD0, NULL);
++ gpio_request(GPIO_FN_GETHER_TXC, NULL);
++ gpio_request(GPIO_FN_GETHER_TX_CTL, NULL);
++ gpio_request(GPIO_FN_GETHER_RD3, NULL);
++ gpio_request(GPIO_FN_GETHER_RD2, NULL);
++ gpio_request(GPIO_FN_GETHER_RD1, NULL);
++ gpio_request(GPIO_FN_GETHER_RD0, NULL);
++ gpio_request(GPIO_FN_GETHER_RXC, NULL);
++ gpio_request(GPIO_FN_GETHER_RX_CTL, NULL);
++
++ /* PHY_RST */
++ gpio_request(GPIO_GP_4_22, NULL);
++ gpio_direction_output(GPIO_GP_4_22, 0);
++ mdelay(20);
++ gpio_set_value(GPIO_GP_4_22, 1);
++ udelay(1);
++#endif
++ /* QSPI/RPC */
++ gpio_request(GPIO_FN_QSPI0_SPCLK, NULL);
++ gpio_request(GPIO_FN_QSPI0_MOSI_IO0, NULL);
++ gpio_request(GPIO_FN_QSPI0_MISO_IO1, NULL);
++ gpio_request(GPIO_FN_QSPI0_IO2, NULL);
++ gpio_request(GPIO_FN_QSPI0_IO3, NULL);
++ gpio_request(GPIO_FN_QSPI0_SSL, NULL);
++ gpio_request(GPIO_FN_QSPI1_SPCLK, NULL);
++ gpio_request(GPIO_FN_QSPI1_MOSI_IO0, NULL);
++ gpio_request(GPIO_FN_QSPI1_MISO_IO1, NULL);
++ gpio_request(GPIO_FN_QSPI1_IO2, NULL);
++ gpio_request(GPIO_FN_QSPI1_IO3, NULL);
++ gpio_request(GPIO_FN_QSPI1_SSL, NULL);
++ gpio_request(GPIO_FN_RPC_RESET_N, NULL);
++ gpio_request(GPIO_FN_RPC_WP_N, NULL);
++ gpio_request(GPIO_FN_RPC_INT_N, NULL);
++
++ return 0;
++}
++
++#if defined(CONFIG_RAVB)
++#define MAHR 0xE68005C0
++#define MALR 0xE68005C8
++#elif defined(CONFIG_SH_ETHER)
++#define MAHR 0xE74005C0
++#define MALR 0xE74005C8
++#endif
++int board_eth_init(bd_t *bis)
++{
++ int ret = -ENODEV;
++
++ u32 val;
++ unsigned char enetaddr[6];
++
++ if (!eth_getenv_enetaddr("ethaddr", enetaddr))
++ return ret;
++
++ /* Set Mac address */
++ val = enetaddr[0] << 24 | enetaddr[1] << 16 |
++ enetaddr[2] << 8 | enetaddr[3];
++ writel(val, MAHR);
++
++ val = enetaddr[4] << 8 | enetaddr[5];
++ writel(val, MALR);
++#if defined(CONFIG_RAVB)
++ ret = ravb_initialize(bis);
++#elif defined(CONFIG_SH_ETHER)
++ ret = sh_eth_initialize(bis);
++#endif
++ return ret;
++}
++
++/* V3HSK has KSZ9031RNX */
++int board_phy_config(struct phy_device *phydev)
++{
++ return 0;
++}
++
++int board_mmc_init(bd_t *bis)
++{
++ int ret = -ENODEV;
++#ifdef CONFIG_SH_SDHI
++ u32 val;
++
++ /* SDHI2/eMMC */
++ gpio_request(GPIO_FN_MMC_D0, NULL);
++ gpio_request(GPIO_FN_MMC_D1, NULL);
++ gpio_request(GPIO_FN_MMC_D2, NULL);
++ gpio_request(GPIO_FN_MMC_D3, NULL);
++ gpio_request(GPIO_FN_MMC_D4, NULL);
++ gpio_request(GPIO_FN_MMC_D5, NULL);
++ gpio_request(GPIO_FN_MMC_D6, NULL);
++ gpio_request(GPIO_FN_MMC_D7, NULL);
++ gpio_request(GPIO_FN_MMC_CLK, NULL);
++ gpio_request(GPIO_FN_MMC_CMD, NULL);
++ gpio_request(GPIO_FN_MMC_CD, NULL);
++ gpio_request(GPIO_FN_MMC_WP, NULL);
++
++ val = readl(PFC_POC1);
++ val &= ~POC_MMC_3V3; /* POC = 1.8V */
++ writel(~val, PFC_PMMR);
++ writel(val, PFC_POC1);
++
++ ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI2_BASE, 0,
++ SH_SDHI_QUIRK_64BIT_BUF);
++#endif
++ return ret;
++}
++
++int dram_init(void)
++{
++ gd->ram_size = PHYS_SDRAM_1_SIZE;
++
++ return 0;
++}
++
++void dram_init_banksize(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
++}
++
++const struct rcar_sysinfo sysinfo = {
++ CONFIG_RCAR_BOARD_STRING
++};
++
++void reset_cpu(ulong addr)
++{
++}
++
++#if defined(CONFIG_DISPLAY_BOARDINFO)
++int checkboard(void)
++{
++ printf("Board: %s\n", sysinfo.board_string);
++ return 0;
++}
++#endif
+diff --git a/configs/v3hsk_defconfig b/configs/v3hsk_defconfig
+new file mode 100644
+index 0000000..938ffe9
+--- /dev/null
++++ b/configs/v3hsk_defconfig
+@@ -0,0 +1,10 @@
++CONFIG_ARM=y
++CONFIG_RCAR_GEN3=y
++CONFIG_DM_SERIAL=y
++CONFIG_TARGET_V3HSK=y
++CONFIG_R8A7798=y
++CONFIG_SPL=y
++CONFIG_SH_SDHI=y
++CONFIG_SPI_FLASH=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_BAR=y
+diff --git a/include/configs/v3hsk.h b/include/configs/v3hsk.h
+new file mode 100644
+index 0000000..6aa6625
+--- /dev/null
++++ b/include/configs/v3hsk.h
+@@ -0,0 +1,160 @@
++/*
++ * include/configs/v3hsk.h
++ * This file is V3HSK board configuration.
++ * CPU r8a7798.
++ *
++ * Copyright (C) 2018 Renesas Electronics Corp.
++ * Copyright (C) 2018 Cogent Embedded, Inc.
++ *
++ * SPDX-License-Identifier: GPL-2.0+
++ */
++
++#ifndef __V3HSK_H
++#define __V3HSK_H
++
++#undef DEBUG
++#define CONFIG_RCAR_BOARD_STRING "V3HSK"
++#define CONFIG_RCAR_TARGET_STRING "r8a7798"
++
++#include "rcar-gen3-common.h"
++
++//#define CONFIG_SYS_DCACHE_OFF
++//#define CONFIG_SYS_ICACHE_OFF
++
++/* SCIF */
++#define CONFIG_SCIF_CONSOLE
++#define CONFIG_CONS_SCIF0
++#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ
++
++/* [A] Hyper Flash */
++/* use to RPC(SPI Multi I/O Bus Controller) */
++
++ /* underconstruction */
++
++#define CONFIG_SYS_NO_FLASH
++#if defined(CONFIG_SYS_NO_FLASH)
++#define CONFIG_SPI
++#define CONFIG_RCAR_GEN3_QSPI
++#define CONFIG_SH_QSPI_BASE 0xEE200000
++#define CONFIG_CMD_SF
++#define CONFIG_CMD_SPI
++#define CONFIG_SPI_FLASH
++#define CONFIG_SPI_FLASH_SPANSION
++#else
++#undef CONFIG_CMD_SF
++#undef CONFIG_CMD_SPI
++#undef CONFIG_SPI_FLASH
++#undef CONFIG_SPI_FLASH_SPANSION
++#endif
++
++#if 0
++/* Ethernet RAVB */
++#define CONFIG_RAVB
++#define CONFIG_RAVB_PHY_ADDR 0x0
++#define CONFIG_RAVB_PHY_MODE PHY_INTERFACE_MODE_RGMII_ID
++#define CONFIG_NET_MULTI
++#define CONFIG_PHYLIB
++#define CONFIG_PHY_MICREL
++#define CONFIG_BITBANGMII
++#define CONFIG_BITBANGMII_MULTI
++#define CONFIG_SH_ETHER_BITBANG
++#else
++/* GETHER */
++#define CONFIG_NET_MULTI
++#define CONFIG_SH_ETHER
++#define CONFIG_SH_ETHER_USE_PORT 0
++#define CONFIG_SH_ETHER_PHY_ADDR 0x0
++#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII_ID
++#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
++#define CONFIG_SH_ETHER_CACHE_WRITEBACK
++#define CONFIG_SH_ETHER_CACHE_INVALIDATE
++#define CONFIG_PHYLIB
++#define CONFIG_PHY_MICREL
++#define CONFIG_BITBANGMII
++#define CONFIG_BITBANGMII_MULTI
++#endif
++
++/* Board Clock */
++/* XTAL_CLK : 33.33MHz */
++#define RCAR_XTAL_CLK 33333333u
++#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
++/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
++/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */
++#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
++#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
++#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
++#define CONFIG_S3D4_CLK_FREQ (266666666u/4)
++
++/* Generic Timer Definitions (use in assembler source) */
++#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
++
++/* Generic Interrupt Controller Definitions */
++#define GICD_BASE (0xF1010000)
++#define GICC_BASE (0xF1020000)
++#define CONFIG_GICV2
++
++/* i2c */
++#define CONFIG_SYS_I2C
++#define CONFIG_SYS_I2C_SH
++#define CONFIG_SYS_I2C_SLAVE 0x60
++#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1
++#define CONFIG_SYS_I2C_SH_SPEED0 400000
++#define CONFIG_SH_I2C_DATA_HIGH 4
++#define CONFIG_SH_I2C_DATA_LOW 5
++#define CONFIG_SH_I2C_CLOCK 10000000
++
++#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30
++
++/* USB */
++#undef CONFIG_CMD_USB
++
++/* SDHI */
++#define CONFIG_MMC
++#define CONFIG_CMD_MMC
++#define CONFIG_GENERIC_MMC
++#define CONFIG_SH_SDHI_FREQ 200000000
++#define CONFIG_SH_SDHI_MMC
++
++/* ENV setting */
++#define CONFIG_ENV_OVERWRITE
++#define CONFIG_ENV_SECT_SIZE (256 * 1024)
++#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
++#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
++
++//#define CONFIG_ENV_IS_IN_MMC
++#define CONFIG_ENV_IS_IN_SPI_FLASH
++
++#if defined(CONFIG_ENV_IS_IN_MMC)
++/* Environment in eMMC, at the end of 2nd "boot sector" */
++#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
++#define CONFIG_SYS_MMC_ENV_DEV 0
++#define CONFIG_SYS_MMC_ENV_PART 2
++#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
++/* Environment in QSPI */
++#define CONFIG_ENV_ADDR 0x700000
++#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
++#else
++#define CONFIG_ENV_IS_NOWHERE
++#endif
++
++/* Module clock supply/stop status bits */
++/* MFIS */
++#define CONFIG_SMSTP2_ENA 0x00002000
++/* serial(SCIF0) */
++#define CONFIG_SMSTP3_ENA 0x00000400
++/* INTC-AP, INTC-EX */
++#define CONFIG_SMSTP4_ENA 0x00000180
++
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "fdt_high=0xffffffffffffffff\0" \
++ "initrd_high=0xffffffffffffffff\0" \
++ "ethaddr=2E:11:22:33:44:55\0"
++
++#define CONFIG_BOOTARGS \
++ "root=/dev/nfs rw ip=dhcp"
++
++#define CONFIG_BOOTCOMMAND \
++ "bootp 0x48080000 Image; tftp 0x48000000 r8a7798-v3hsk.dtb; " \
++ "booti 0x48080000 - 0x48000000"
++
++#endif /* __V3HSK_H */
+--
+1.9.1
+
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend
index d912f32..146c392 100644
--- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend
+++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot_2015.04.bbappend
@@ -21,6 +21,7 @@ SRC_URI_append = " \
file://0018-arm-renesas-Add-Renesas-R8A7798-SoC-support.patch \
file://0019-board-renesas-Add-Condor-board.patch \
file://0020-board-renesas-Add-V3MZF-board.patch \
+ file://00201-board-renesas-Add-V3HSK-board.patch \
file://0021-ARM-rcar_gen3-Add-RPC-flash-definitions.patch \
file://0022-mtd-Add-RPC-HyperFlash-support.patch \
file://0023-board-renesas-salvator-x-Enable-RPC-clock.patch \
diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-mmngr/kernel-module-mmngr.bbappend b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-mmngr/kernel-module-mmngr.bbappend
index d3991b4..6f05e72 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-mmngr/kernel-module-mmngr.bbappend
+++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-mmngr/kernel-module-mmngr.bbappend
@@ -4,5 +4,6 @@ MMNGR_CFG_eagle = "MMNGR_V3MSK"
MMNGR_CFG_v3msk = "MMNGR_V3MSK"
MMNGR_CFG_condor = "MMNGR_V3MSK"
MMNGR_CFG_v3mzf = "MMNGR_V3MSK"
+MMNGR_CFG_v3hsk = "MMNGR_V3MSK"
SRC_URI_append = " file://0002-mmngr-Add-V3MSK-board.patch"
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
index 5e17f76..c4c19cb 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
@@ -29,10 +29,11 @@ Videobox Mini V2 board on R8A7797 ES1.0/2.0 SoC
Videobox2 board on R8A7795 ES1.x SoC
Videobox2 board on R8A7795 SoC
Condor board on R8A7798 SoC
+V3HSK board on R8A7798 SoC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
---
- arch/arm64/boot/dts/renesas/Makefile | 24 +
+ arch/arm64/boot/dts/renesas/Makefile | 25 +
arch/arm64/boot/dts/renesas/legacy/Makefile | 8 +
.../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1624 +++++++++++++++++++
.../renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts | 441 ++++++
@@ -81,6 +82,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts | 345 ++++
arch/arm64/boot/dts/renesas/r8a7797-v3mzf.dts | 424 +++++
arch/arm64/boot/dts/renesas/r8a7798-condor.dts | 963 ++++++++++++
+ arch/arm64/boot/dts/renesas/r8a7798-v3hsk.dts | 358 +++++
arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi | 462 ++++++
arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi | 30 +
arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi | 46 +
@@ -89,7 +91,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
arch/arm64/boot/dts/renesas/ulcb-vb.dtsi | 1610 +++++++++++++++++++
arch/arm64/boot/dts/renesas/ulcb-vb2.dtsi | 1660 ++++++++++++++++++++
arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi | 543 +++++++
- 57 files changed, 20147 insertions(+)
+ 58 files changed, 20506 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/legacy/Makefile
create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts
@@ -138,6 +140,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3mzf.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7798-condor.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7798-v3hsk.dts
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi
@@ -148,10 +151,10 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vbm.dtsi
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index f9c71df..6cdbdaf 100644
+index f9c71df..b37dae1 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -6,5 +6,29 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
+@@ -6,5 +6,30 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-xs.dtb
@@ -175,6 +178,7 @@ index f9c71df..6cdbdaf 100644
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vbm-v2.dtb r8a7797-es1-v3msk-vbm-v2.dtb
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3mzf.dtb
+dtb-$(CONFIG_ARCH_R8A7798) += r8a7798-condor.dtb
++dtb-$(CONFIG_ARCH_R8A7798) += r8a7798-v3hsk.dtb
+
+# ADAS legacy boards
+subdir-y := legacy
@@ -12576,7 +12580,7 @@ index 0000000..58f82bf
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
new file mode 100644
-index 0000000..c1e805d
+index 0000000..33c6c0d
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
@@ -0,0 +1,345 @@
@@ -12709,7 +12713,7 @@ index 0000000..c1e805d
+
+ port {
+ hdmi_con: endpoint {
-+ remote-endpoint = <&adv7511_out>;
++ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
@@ -14324,6 +14328,370 @@ index 0000000..4dd7a28
+ };
+ };
+};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7798-v3hsk.dts b/arch/arm64/boot/dts/renesas/r8a7798-v3hsk.dts
+new file mode 100644
+index 0000000..bf8abe6
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7798-v3hsk.dts
+@@ -0,0 +1,358 @@
++/*
++ * Device Tree Source for the V3H Starter Kit board on r8a7798
++ *
++ * Copyright (C) 2018 Renesas Electronics Corp.
++ * Copyright (C) 2018 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7798.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ model = "Renesas V3H Starter Kit board based on r8a7798";
++ compatible = "renesas,v3hsk", "renesas,r8a7798";
++
++ aliases {
++ serial0 = &scif0;
++ ethernet0 = &gether;
++ };
++
++ chosen {
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ stdout-path = "serial0:115200n8";
++ };
++
++
++ memory@48000000 {
++ device_type = "memory";
++ /* first 128MB is reserved for secure area. */
++ reg = <0x0 0x48000000 0x0 0x78000000>;
++ };
++
++ reserved-memory {
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ /* device specific region for Lossy Decompression */
++ lossy_decompress: linux,lossy_decompress {
++ no-map;
++ reg = <0x00000000 0x6c000000 0x0 0x03000000>;
++ };
++
++ /* global autoconfigured region for contiguous allocations */
++ linux,cma {
++ compatible = "shared-dma-pool";
++ reusable;
++ reg = <0x00000000 0x6f000000 0x0 0x10000000>;
++ linux,cma-default;
++ };
++
++ /* device specific region for contiguous allocations */
++ linux,multimedia {
++ compatible = "shared-dma-pool";
++ reusable;
++ reg = <0x00000000 0x7f000000 0x0 0x01000000>;
++ };
++ };
++
++ mmngr {
++ compatible = "renesas,mmngr";
++ memory-region = <&lossy_decompress>;
++ };
++
++ mmngrbuf {
++ compatible = "renesas,mmngrbuf";
++ };
++
++ vspm_if {
++ compatible = "renesas,vspm_if";
++ };
++
++ lvds-encoder {
++ compatible = "thine,thc63lvdm83d";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ lvds_enc_in: endpoint {
++ remote-endpoint = <&du_out_lvds0>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ lvds_enc_out: endpoint {
++ remote-endpoint = <&lvds_in>;
++ };
++ };
++ };
++ };
++
++ lvds {
++ compatible = "lvds-connector";
++
++ width-mm = <210>;
++ height-mm = <158>;
++
++ panel-timing {
++ clock-frequency = <65000000>;
++ hactive = <1280>;
++ vactive = <720>;
++ hsync-len = <40>;
++ hfront-porch = <80>;
++ hback-porch = <40>;
++ vfront-porch = <14>;
++ vback-porch = <14>;
++ vsync-len = <4>;
++ };
++
++ port {
++ lvds_in: endpoint {
++ remote-endpoint = <&lvds_enc_out>;
++ };
++ };
++ };
++
++ hdmi-out {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con: endpoint {
++ remote-endpoint = <&adv7511_out>;
++ };
++ };
++ };
++
++ dclkin_p0: clock-out0 {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <148500000>;
++ };
++
++ msiof_ref_clk: msiof-ref-clock {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <66666666>;
++ };
++
++ vcc_3v3: regulator0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-VCC3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vcc_vddq_vin0: regulator1 {
++ compatible = "regulator-fixed";
++ regulator-name = "VCC-VDDQ-VIN0";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++};
++
++&du {
++ status = "okay";
++
++ ports {
++ port@0 {
++ endpoint {
++ remote-endpoint = <&adv7511_in>;
++// remote-endpoint = <&lvds_in>;
++ };
++ };
++ };
++};
++
++&extal_clk {
++ clock-frequency = <16666666>;
++};
++
++&extalr_clk {
++ clock-frequency = <32768>;
++};
++
++&pfc {
++ pinctrl-0 = <&scif_clk_pins>;
++ pinctrl-names = "default";
++
++ scif0_pins: scif0 {
++ groups = "scif0_data";
++ function = "scif0";
++ };
++
++ scif_clk_pins: scif_clk {
++ groups = "scif_clk_b";
++ function = "scif_clk";
++ };
++
++ i2c0_pins: i2c0 {
++ groups = "i2c0";
++ function = "i2c0";
++ };
++
++ gether_pins: gether {
++ groups = "gether_mdc_a";
++ function = "gether";
++ };
++
++ sdhi2_pins_1v8: sdhi2_1v8 {
++ groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
++ function = "mmc";
++ power-source = <1800>;
++ };
++
++ sdhi2_pins_3v3: sdhi2_3v3 {
++ groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
++ function = "mmc";
++ power-source = <3300>;
++ };
++
++ tpu_pins: tpu {
++ /* GP1_19 pin; CP4 test point */
++ groups = "tpu_to0";
++ function = "tpu";
++ };
++};
++
++&scif0 {
++ pinctrl-0 = <&scif0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&scif_clk {
++ clock-frequency = <14745600>;
++ status = "okay";
++};
++
++&sdhi2 {
++ /* used for on-board eMMC */
++ pinctrl-0 = <&sdhi2_pins_3v3>;
++ pinctrl-1 = <&sdhi2_pins_1v8>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <&vcc_3v3>;
++ vqmmc-supply = <&vcc_vddq_vin0>;
++ mmc-hs200-1_8v;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
++
++&i2c0 {
++ pinctrl-0 = <&i2c0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ hdmi@39{
++ compatible = "adi,adv7511w";
++ #sound-dai-cells = <0>;
++ reg = <0x39>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7511_in: endpoint {
++ remote-endpoint = <&lvds_enc_out>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ adv7511_out: endpoint {
++ remote-endpoint = <&hdmi_con>;
++ };
++ };
++ };
++ };
++};
++
++&wdt0 {
++ timeout-sec = <60>;
++ status = "okay";
++};
++
++&cmt0 {
++ status = "okay";
++};
++
++&cmt1 {
++ status = "okay";
++};
++
++&cmt2 {
++ status = "okay";
++};
++
++&cmt3 {
++ status = "okay";
++};
++
++&tpu {
++ pinctrl-0 = <&tpu_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&tmu0 {
++ status = "okay";
++};
++
++&tmu1 {
++ status = "okay";
++};
++
++&tmu2 {
++ status = "okay";
++};
++
++&tmu3 {
++ status = "okay";
++};
++
++&tmu4 {
++ status = "okay";
++};
++
++&gether {
++ pinctrl-0 = <&gether_pins>;
++ pinctrl-names = "default";
++ renesas,no-ether-link;
++ phy-handle = <&gether_phy>;
++ status = "okay";
++ phy-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
++ phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
++
++ gether_phy: ethernet-phy@0 {
++ reg = <0>;
++ interrupt-parent = <&gpio4>;
++ interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
++ max-speed = <1000>;
++ };
++};
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi
new file mode 100644
index 0000000..a87c38b
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3hsk.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3hsk.cfg
new file mode 100644
index 0000000..9558ce6
--- /dev/null
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3hsk.cfg
@@ -0,0 +1,40 @@
+CONFIG_ARCH_R8A7798=y
+CONFIG_CAN=y
+CONFIG_CAN_PEAK_USB=y
+CONFIG_CAN_BCM=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+CONFIG_CAN_RCAR=y
+CONFIG_CAN_RCAR_CANFD=y
+CONFIG_DUMMY=y
+CONFIG_DRM_I2C_ADV7511=y
+CONFIG_GPIO_MAX732X=y
+CONFIG_GPIO_MAX732X_IRQ=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_VIDEO_ADV_DEBUG=y
+CONFIG_VIDEO_RCAR_VIN_LEGACY=y
+CONFIG_VIDEO_RCAR_CSI2_LEGACY=y
+# CONFIG_VIDEO_RCAR_VIN is not set
+# CONFIG_VIDEO_RCAR_CSI2 is not set
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_SCALE_CROP=y
+CONFIG_SOC_CAMERA_PLATFORM=y
+CONFIG_SOC_CAMERA_MAX9286=y
+CONFIG_SOC_CAMERA_TI9X4=y
+CONFIG_SOC_CAMERA_OV106XX=y
+CONFIG_VIDEO_RENESAS_IMR=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_TOUCHSCREEN_PROPERTIES=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_SERIAL_SH_SCI_DMA=y
+CONFIG_UIO=y
+CONFIG_SPI_SLAVE=y
+CONFIG_SPI_SLAVE_TIME=y
+CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y
+CONFIG_SENSORS_LM63=y
+CONFIG_SH_ETH=y
+CONFIG_BLK_DEV_NVME=m
+CONFIG_SATA_ACARD_AHCI=y
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend
index b73f77e..45eb436 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend
@@ -4,6 +4,7 @@ COMPATIBLE_MACHINE_eagle = "eagle"
COMPATIBLE_MACHINE_v3msk = "v3msk"
COMPATIBLE_MACHINE_condor = "condor"
COMPATIBLE_MACHINE_v3mzf = "v3mzf"
+COMPATIBLE_MACHINE_v3hsk = "v3hsk"
SRC_URI_append = " \
${@bb.utils.contains('MACHINE_FEATURES', 'h3ulcb-had', ' file://hyperflash.cfg', '', d)} \
@@ -92,6 +93,7 @@ SRC_URI_append_eagle = " file://eagle.cfg"
SRC_URI_append_v3msk = " file://v3msk.cfg"
SRC_URI_append_condor = " file://condor.cfg"
SRC_URI_append_v3mzf = " file://v3mzf.cfg"
+SRC_URI_append_v3hsk = " file://v3hsk.cfg"
KERNEL_DEVICETREE_append_h3ulcb = " \
renesas/r8a7795-es1-h3ulcb-view.dtb \
@@ -148,3 +150,7 @@ KERNEL_DEVICETREE_append_v3mzf = " \
KERNEL_DEVICETREE_append_condor = " \
renesas/r8a7798-condor.dtb \
"
+
+KERNEL_DEVICETREE_append_v3hsk = " \
+ renesas/r8a7798-v3hsk.dtb \
+"