diff options
Diffstat (limited to 'meta-rcar-gen3-adas/recipes-bsp/u-boot')
2 files changed, 30 insertions, 17 deletions
diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch index 8545634..050d98f 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0014-arm-renesas-Add-Renesas-R8A7797-SoC-support.patch @@ -3510,19 +3510,7 @@ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-comm index 0a959f7..ec20aba 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h -@@ -93,7 +93,11 @@ - #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } - - /* MEMORY */ -+#if defined(CONFIG_R8A7797) -+#define CONFIG_SYS_TEXT_BASE 0x58280000 -+#else - #define CONFIG_SYS_TEXT_BASE 0x50000000 -+#endif - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7fff0) - - -@@ -124,6 +128,14 @@ +@@ -124,6 +128,17 @@ #define PHYS_SDRAM_1_SIZE ((unsigned long)(0x80000000 - DRAM_RSV_SIZE)) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE @@ -3530,8 +3518,11 @@ index 0a959f7..ec20aba 100644 +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE) /* legacy */ +#define PHYS_SDRAM_1_SIZE ((unsigned long)(0x40000000 - DRAM_RSV_SIZE)) -+#define PHYS_SDRAM_2 0x0600000000 /* ext */ -+#define PHYS_SDRAM_2_SIZE ((unsigned long)0x80000000) ++ #if defined(CONFIG_TARGET_V3MSK) ++ #define PHYS_SDRAM_1_SIZE ((unsigned long)(0x80000000 - DRAM_RSV_SIZE)) ++ #else ++ #define PHYS_SDRAM_1_SIZE ((unsigned long)(0x40000000 - DRAM_RSV_SIZE)) ++ #endif +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE #else diff --git a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0041-board-renesas-ulcb-console-on-scif1.patch b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0041-board-renesas-ulcb-console-on-scif1.patch index 479f23f..ecbbfea 100644 --- a/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0041-board-renesas-ulcb-console-on-scif1.patch +++ b/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0041-board-renesas-ulcb-console-on-scif1.patch @@ -8,8 +8,9 @@ This is only for H3ULCB.HAD Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> --- - include/configs/h3ulcb.h | 4 ++-- - 1 file changed, 1 insertions(+), 1 deletions(-) + include/configs/h3ulcb.h | 4 ++-- + board/renesas/ulcb/ulcb.c | 3 +++ + 2 file changed, 4 insertions(+), 1 deletions(-) diff --git a/include/configs/h3ulcb.h b/include/configs/h3ulcb.h index b9be845..3da2e5a 100644 @@ -23,6 +24,27 @@ index b9be845..3da2e5a 100644 +#define CONFIG_CONS_SCIF1 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ +diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c +index 0d8752f..1be01cf 100644 +--- a/board/renesas/ulcb/ulcb.c ++++ b/board/renesas/ulcb/ulcb.c +@@ -29,6 +29,7 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++#define SCIF1_MSTP206 (1 << 6) + #define SCIF2_MSTP310 (1 << 10) + #define ETHERAVB_MSTP812 (1 << 12) + #define DVFS_MSTP926 (1 << 26) +@@ -49,6 +50,8 @@ int board_early_init_f(void) + + rcar_prr_init(); + ++ /* SCIF1 */ ++ mstp_clrbits_le32(SMSTPCR2, SMSTPCR2, SCIF1_MSTP206); + /* SCIF2 */ + mstp_clrbits_le32(SMSTPCR3, SMSTPCR3, SCIF2_MSTP310); + /* EHTERAVB */ -- 1.9.1 |