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Diffstat (limited to 'meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch')
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch632
1 files changed, 596 insertions, 36 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
index b15a4fb..7b34dce 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
@@ -19,12 +19,13 @@ Videobox board on R8A7795 SoC
Eagle board on R8A7797 SoC
V3MSK board on R8A7797 SoC
Kingfisher board on R8A7797 SoC
+Videobox board on R8A7797 SoC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
---
- arch/arm64/boot/dts/renesas/Makefile | 16 +
+ arch/arm64/boot/dts/renesas/Makefile | 17 +
arch/arm64/boot/dts/renesas/legacy/Makefile | 8 +
- .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1717 +++++++++++++++++++
+ .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1710 +++++++++++++++++++
.../renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts | 441 +++++
.../dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts | 1724 +++++++++++++++++++
.../dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts | 465 +++++
@@ -51,14 +52,15 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
.../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts | 287 ++++
.../boot/dts/renesas/r8a7796-salvator-x-view.dts | 318 ++++
arch/arm64/boot/dts/renesas/r8a7797-eagle.dts | 561 ++++++
- arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts | 541 ++++++
- arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts | 294 ++++
+ arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts | 567 +++++++
+ arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts | 498 ++++++
+ arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts | 320 ++++
arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi | 518 ++++++
arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi | 30 +
arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi | 46 +
- arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 1531 +++++++++++++++++
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 1529 +++++++++++++++++
arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi | 515 ++++++
- 36 files changed, 17285 insertions(+)
+ 37 files changed, 17827 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/legacy/Makefile
create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts
@@ -88,6 +90,7 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-eagle.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf-most.dtsi
@@ -96,10 +99,10 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 32fb4d9..fd17456 100644
+index 32fb4d9..52d783b 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -4,5 +4,21 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+@@ -4,5 +4,22 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
@@ -115,6 +118,7 @@ index 32fb4d9..fd17456 100644
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-eagle.dtb
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk.dtb
+dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-kf.dtb
++dtb-$(CONFIG_ARCH_R8A7797) += r8a7797-v3msk-vb.dtb
+
+# ADAS legacy boards
+subdir-y := legacy
@@ -137,7 +141,7 @@ index 0000000..7f25079
+clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
new file mode 100644
-index 0000000..ec6d86d
+index 0000000..2fee788
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
@@ -0,0 +1,1710 @@
@@ -14078,10 +14082,10 @@ index 0000000..f71addf
+
diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts
new file mode 100644
-index 0000000..9837e17
+index 0000000..4467ab3
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-kf.dts
-@@ -0,0 +1,541 @@
+@@ -0,0 +1,567 @@
+/*
+ * Device Tree Source for the V3MSK Kingfisher board on r8a7797
+ *
@@ -14099,6 +14103,54 @@ index 0000000..9837e17
+ model = "Renesas V3MSK Kingfisher board based on r8a7797";
+};
+
++&canfd {
++ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ channel0 {
++ status = "okay";
++ };
++
++ channel1 {
++ status = "okay";
++ };
++};
++
++&csi2_40 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_40_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
++};
++
+&i2c0 {
+ /* i2c0 might conflict with pc9548 reset pin on Kingfisher (uncomment if h/w not patched) */
+// status = "disabled";
@@ -14460,6 +14512,18 @@ index 0000000..9837e17
+ };
+};
+
++&pfc {
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++
++ canfd1_pins: canfd1 {
++ groups = "canfd1_data";
++ function = "canfd1";
++ };
++};
++
+&vin0 {
+ status = "okay";
+
@@ -14589,6 +14653,45 @@ index 0000000..9837e17
+ };
+ };
+};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts
+new file mode 100644
+index 0000000..edc41ad
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk-vb.dts
+@@ -0,0 +1,498 @@
++/*
++ * Device Tree Source for the V3MSK Videobox board on r8a7797
++ *
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7797-v3msk.dts"
++
++/ {
++ model = "Renesas V3MSK Videobox board based on r8a7797";
++
++ aliases {
++ serial1 = &scif3;
++ };
++};
++
++&canfd {
++ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ channel0 {
++ status = "okay";
++ };
++
++ channel1 {
++ status = "okay";
++ };
++};
+
+&csi2_40 {
+ status = "okay";
@@ -14623,12 +14726,443 @@ index 0000000..9837e17
+ };
+ };
+};
++
++&i2c1 {
++ pinctrl-0 = <&i2c1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ clock-frequency = <400000>;
++
++ i2cswitch1: i2c-switch@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++
++ ov106xx@0 {
++ compatible = "ovti,ov106xx";
++ reg = <0x60>;
++
++ port@0 {
++ ov106xx_in0: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin0ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ ov106xx_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ };
++ };
++
++ ov106xx@1 {
++ compatible = "ovti,ov106xx";
++ reg = <0x61>;
++
++ port@0 {
++ ov106xx_in1: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin1ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ ov106xx_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ };
++ };
++
++ ov106xx@2 {
++ compatible = "ovti,ov106xx";
++ reg = <0x62>;
++
++ port@0 {
++ ov106xx_in2: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin2ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ ov106xx_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++
++ ov106xx@3 {
++ compatible = "ovti,ov106xx";
++ reg = <0x63>;
++
++ port@0 {
++ ov106xx_in3: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin3ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ ov106xx_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++
++ max9286-max9271@0 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des0ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ max9286_des0ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ max9286_des0ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ max9286_des0ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ max9286_csi0ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ ti964-ti9x3@0 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti964_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti964_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ ti964_des0ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ ti964_des0ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ ti964_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++
++ gpio_exp_6c: gpio@6c {
++ compatible = "maxim,max7325";
++ reg = <0x6c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ virq {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video VIRQ";
++ };
++ des_cfg {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video CNFG0";
++ };
++ pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR_SHDN";
++ };
++ cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR0";
++ };
++ cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR1";
++ };
++ cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR2";
++ };
++ cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video PWR3";
++ };
++ des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video DES_SHDN";
++ };
++ fpdl_shdn {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video FPDL_SHDN";
++ };
++ };
++ };
++ };
++};
++
++&gpio0 {
++ can0stby {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "CAN0STBY";
++ };
++
++ can1_load {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can1_120R_load";
++ };
++};
++
++&gpio2 {
++ can0_load {
++ gpio-hog;
++ gpios = <16 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "can0_120R_load";
++ };
++};
++
++&pfc {
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++
++ canfd1_pins: canfd1 {
++ groups = "canfd1_data";
++ function = "canfd1";
++ };
++
++ i2c1_pins: i2c1 {
++ groups = "i2c1";
++ function = "i2c1";
++ };
++
++ scif3_pins: scif3 {
++ groups = "scif3_data";
++ function = "scif3";
++ };
++};
++
++&scif3 {
++ pinctrl-0 = <&scif3_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&vin0 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin0ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ };
++ port@1 {
++ csi0ep0: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin0_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ vin0_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ };
++ };
++};
++
++&vin1 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin1ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <1>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ csi0ep1: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin1_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ vin1_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ };
++ };
++};
++
++&vin2 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin2ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <2>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ };
++ port@1 {
++ csi0ep2: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin2_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ vin2_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++};
++
++&vin3 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin3ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <3>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ csi0ep3: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin3_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ vin3_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++};
diff --git a/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
new file mode 100644
-index 0000000..61f7e8b
+index 0000000..fb2976e
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7797-v3msk.dts
-@@ -0,0 +1,294 @@
+@@ -0,0 +1,320 @@
+/*
+ * Device Tree Source for the V3M Starter Kit board on r8a7797
+ *
@@ -14733,15 +15267,16 @@ index 0000000..61f7e8b
+ height-mm = <158>;
+
+ panel-timing {
-+ clock-frequency = <133000000>;
-+ hactive = <1024>;
-+ vactive = <768>;
-+ hsync-len = <136>;
-+ hfront-porch = <20>;
-+ hback-porch = <160>;
-+ vfront-porch = <3>;
-+ vback-porch = <29>;
-+ vsync-len = <6>;
++ /* 1280x800 @60Hz */
++ clock-frequency = <65000000>;
++ hactive = <1280>;
++ vactive = <800>;
++ hsync-len = <40>;
++ hfront-porch = <80>;
++ hback-porch = <40>;
++ vfront-porch = <14>;
++ vback-porch = <14>;
++ vsync-len = <4>;
+ };
+
+ port {
@@ -14773,6 +15308,24 @@ index 0000000..61f7e8b
+ #clock-cells = <0>;
+ clock-frequency = <66666666>;
+ };
++
++ vcc_3v3: regulator0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-VCC3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vcc_vddq_vin0: regulator1 {
++ compatible = "regulator-fixed";
++ regulator-name = "VCC-VDDQ-VIN0";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
+};
+
+&du {
@@ -14816,11 +15369,6 @@ index 0000000..61f7e8b
+ function = "i2c0";
+ };
+
-+ i2c3_pins: i2c3 {
-+ groups = "i2c3";
-+ function = "i2c3";
-+ };
-+
+ avb_pins: avb {
+ groups = "avb0_mdc";
+ function = "avb0";
@@ -14830,6 +15378,12 @@ index 0000000..61f7e8b
+ groups = "du_rgb666", "du_sync", "du_clk_out_0", "du_disp";
+ function = "du";
+ };
++
++ sdhi2_pins_3v3: sdhi2_3v3 {
++ groups = "mmc_data8", "mmc_ctrl";
++ function = "mmc";
++ power-source = <3300>;
++ };
+};
+
+&scif0 {
@@ -14884,14 +15438,6 @@ index 0000000..61f7e8b
+ };
+};
+
-+&i2c3 {
-+ pinctrl-0 = <&i2c3_pins>;
-+ pinctrl-names = "default";
-+
-+ status = "okay";
-+ clock-frequency = <400000>;
-+};
-+
+&wdt0 {
+ status = "okay";
+};
@@ -14923,6 +15469,20 @@ index 0000000..61f7e8b
+ max-speed = <1000>;
+ };
+};
++
++&sdhi2 {
++ /* used for on-board eMMC */
++ pinctrl-0 = <&sdhi2_pins_3v3>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_3v3>;
++ vqmmc-supply = <&vcc_vddq_vin0>;
++ no-1-8-v;
++ cap-mmc-highspeed;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-cn11.dtsi
new file mode 100644
index 0000000..4ca502f
@@ -15537,7 +16097,7 @@ index 0000000..b854216
+};
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
new file mode 100644
-index 0000000..3990648
+index 0000000..8ffafb2
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
@@ -0,0 +1,1529 @@