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Diffstat (limited to 'meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch')
-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch8065
1 files changed, 6627 insertions, 1438 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
index 4983f5a..261afe1 100644
--- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch
@@ -19,36 +19,46 @@ Videobox board on R8A7795 SoC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
---
- arch/arm64/boot/dts/renesas/Makefile | 14 +
+ arch/arm64/boot/dts/renesas/Makefile | 13 +
+ arch/arm64/boot/dts/renesas/legacy/Makefile | 7 +
+ .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts | 1717 ++++++++++++++++++
+ .../renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts | 440 +++++
+ .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts | 1720 ++++++++++++++++++
+ .../dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts | 464 +++++
+ .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts | 1214 +++++++++++++
+ .../dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts | 464 +++++
.../dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts | 22 +
.../dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts | 23 +
.../boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi | 225 +++
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts | 445 +++++
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 1707 +++++++++++++++++++
- .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts | 1787 ++++++++++++++++++++
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 1910 ++++++++++++++++++++
+ .../boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts | 1787 ++++++++++++++++++
.../boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts | 546 ++++++
.../dts/renesas/r8a7795-es1-salvator-x-view.dts | 552 ++++++
.../boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts | 22 +
.../boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts | 23 +
.../arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi | 219 +++
- .../boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts | 469 +++++
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts | 1712 +++++++++++++++++++
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts | 1787 ++++++++++++++++++++
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts | 1906 +++++++++++++++++++
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts | 1787 ++++++++++++++++++
.../arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts | 546 ++++++
.../boot/dts/renesas/r8a7795-salvator-x-view.dts | 552 ++++++
- .../boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts | 469 +++++
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts | 1284 ++++++++++++++
- .../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts | 287 ++++
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts | 1400 ++++++++++++++
+ .../arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts | 287 +++
.../boot/dts/renesas/r8a7796-salvator-x-view.dts | 318 ++++
arch/arm64/boot/dts/renesas/ulcb-kf-cmos.dtsi | 75 +
- arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi | 75 +
+ arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi | 77 +
arch/arm64/boot/dts/renesas/ulcb-kf-sd3.dtsi | 44 +
arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi | 515 ++++++
- 25 files changed, 13718 insertions(+)
+ 29 files changed, 18875 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/legacy/Makefile
+ create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts
+ create mode 100644 arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-view.dts
@@ -56,12 +66,10 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-alfa.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had-beta.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-had.dtsi
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-salvator-x-view.dts
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-view.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x-view.dts
@@ -71,37 +79,49 @@ Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
create mode 100644 arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
-index 32fb4d9..c9b3e96 100644
+index 32fb4d9..9bb5848 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -4,5 +4,19 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+@@ -4,5 +4,18 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
+# ADAS boards
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf-v1.dtb
+dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x-view.dtb
+dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb r8a7796-m3ulcb-kf-v1.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb
-+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb r8a7795-h3ulcb-kf-v1.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x-view.dtb r8a7795-es1-salvator-x-view.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-view.dtb r8a7795-es1-h3ulcb-view.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-had-alfa.dtb r8a7795-h3ulcb-had-beta.dtb r8a7795-es1-h3ulcb-had-alfa.dtb r8a7795-es1-h3ulcb-had-beta.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb r8a7795-es1-h3ulcb-kf.dtb
+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-vb.dtb r8a7795-es1-h3ulcb-vb.dtb
+
++# ADAS legacy boards
++subdir-y := legacy
++
always := $(dtb-y)
clean-files := *.dtb
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
+diff --git a/arch/arm64/boot/dts/renesas/legacy/Makefile b/arch/arm64/boot/dts/renesas/legacy/Makefile
new file mode 100644
-index 0000000..6b13f07
+index 0000000..f7de935
--- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
-@@ -0,0 +1,22 @@
++++ b/arch/arm64/boot/dts/renesas/legacy/Makefile
+@@ -0,0 +1,7 @@
++# Legacy KF board: V0, V1 (V2 is the same as V1), V3 is latest and deployed in default directory
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf-v0.dtb r8a7795-es1-h3ulcb-kf-v1.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf-v0.dtb r8a7796-m3ulcb-kf-v1.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf-v0.dtb r8a7795-h3ulcb-kf-v1.dtb
++
++always := $(dtb-y)
++clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
+new file mode 100644
+index 0000000..b3ac95aa4
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v0.dts
+@@ -0,0 +1,1717 @@
+/*
-+ * Device Tree Source for the H3ULCB.HAD board Alfa side on r8a7795 ES1.x
++ * Device Tree Source for the H3ULCB Kingfisher V0 board on r8a7795 ES1.x
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
@@ -111,25 +131,1720 @@ index 0000000..6b13f07
+ * kind, whether express or implied.
+ */
+
-+#include "r8a7795-es1-h3ulcb-had.dtsi"
++#include "../r8a7795-es1-h3ulcb.dts"
+
+/ {
-+ model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795";
++ model = "Renesas H3ULCB Kingfisher V0 board based on r8a7795";
++
++ aliases {
++ serial1 = &hscif4;
++ };
++
++ snd_clk: snd_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <24576000>;
++ clock-output-names = "scki";
++ };
++
++ wlan_en: regulator@4 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vcc_sdhi3: regulator@41 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vccq_sdhi3: regulator@5 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 VccQ";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ codec_en_reg: regulator@6 {
++ compatible = "regulator-fixed";
++ regulator-name = "codec-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_20 15 0>;
++
++ /* delay - CHECK */
++ startup-delay-us = <70000>;
++ enable-active-high;
++ };
++
++ amp_en_reg: regulator@7 {
++ compatible = "regulator-fixed";
++ regulator-name = "amp-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_20 0 0>;
++
++ startup-delay-us = <0>;
++ enable-active-high;
++ };
++
++ lvds_switch: regulator@8 {
++ compatible = "regulator-fixed";
++ regulator-name = "lvds_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio1 24 0>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ sdio_switch: regulator@9 {
++ compatible = "regulator-fixed";
++ regulator-name = "wifi_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_20 5 0>;
++ enable-active-low;
++ regulator-always-on;
++ };
++
++ sound_switch: regulator@10 {
++ compatible = "regulator-fixed";
++ regulator-name = "pcm3168a_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_21 5 0>;
++ enable-active-low;
++ regulator-always-on;
++ };
++
++ radio_switch: regulator@11 {
++ compatible = "regulator-fixed";
++ regulator-name = "radio_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ kim {
++ compatible = "kim";
++ nshutdown_gpio = <343>; /* pca9535@i2c2.0x20 pin 3 */
++ /* serial1 */
++ dev_name = "/dev/ttySC1";
++ flow_cntrl = <1>;
++ /* int div 8 hscif@26.6666656MHz */
++ baud_rate = <3333332>;
++ };
++
++ btwilink {
++ compatible = "btwilink";
++ };
++
++ sound_ext: sound@0 {
++ pinctrl-0 = <&sound_0_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "left_j";
++ simple-audio-card,name = "pcm3168a";
++
++ simple-audio-card,bitclock-master = <&sound_ext_master>;
++ simple-audio-card,frame-master = <&sound_ext_master>;
++ sound_ext_master: simple-audio-card,cpu@0 {
++ sound-dai = <&rcar_sound 0>;
++ dai-tdm-slot-num = <8>;
++ dai-tdm-slot-width = <32>;
++ };
++
++ simple-audio-card,codec@0 {
++ sound-dai = <&pcm3168a>;
++ dai-tdm-slot-num = <8>;
++ dai-tdm-slot-width = <32>;
++ system-clock-frequency = <24576000>;
++ };
++ };
++
++ /delete-node/sound;
++
++ rsnd_ak4613: sound@1 {
++ pinctrl-0 = <&sound_1_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "left_j";
++ simple-audio-card,name = "ak4613";
++
++ simple-audio-card,bitclock-master = <&sndcpu>;
++ simple-audio-card,frame-master = <&sndcpu>;
++
++ sndcpu: simple-audio-card,cpu@1 {
++ sound-dai = <&rcar_sound 1>;
++ };
++
++ sndcodec: simple-audio-card,codec@1 {
++ sound-dai = <&ak4613>;
++ };
++ };
++
++ sound_radio: sound@2 {
++ pinctrl-0 = <&sound_2_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "i2s";
++ simple-audio-card,name = "radio";
++
++ simple-audio-card,bitclock-master = <&sound_radio_master>;
++ simple-audio-card,frame-master = <&sound_radio_master>;
++ simple-audio-card,cpu@2 {
++ sound-dai = <&rcar_sound 2>;
++ };
++
++ sound_radio_master: simple-audio-card,codec@2 {
++ sound-dai = <&radio>;
++ system-clock-frequency = <12288000>;
++ };
++ };
++
++ lvds-encoder {
++ compatible = "thine,thc63lvdm83d";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ port@0 {
++ reg = <0>;
++ lvds_enc_in: endpoint {
++ remote-endpoint = <&du_out_lvds0>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ lvds_enc_out: endpoint {
++ remote-endpoint = <&lvds_in>;
++ };
++ };
++ };
++ };
++
++ lvds {
++ compatible = "lvds-connector";
++
++ width-mm = <210>;
++ height-mm = <158>;
++
++ panel-timing {
++ /* 1280x800 @60Hz */
++ clock-frequency = <65000000>;
++ hactive = <1280>;
++ vactive = <800>;
++ hsync-len = <40>;
++ hfront-porch = <80>;
++ hback-porch = <40>;
++ vfront-porch = <14>;
++ vback-porch = <14>;
++ vsync-len = <4>;
++ };
++
++ port {
++ lvds_in: endpoint {
++ remote-endpoint = <&lvds_enc_out>;
++ };
++ };
++ };
++
++ radio: si468x@0 {
++ compatible = "si,si468x-pcm";
++ status = "okay";
++
++ #sound-dai-cells = <0>;
++ };
++};
++
++&pfc {
++ hscif4_pins: hscif4 {
++ groups = "hscif4_data_a", "hscif4_ctrl";
++ function = "hscif4";
++ };
++
++ sdhi3_pins_3v3: sd3_3v3 {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ power-source = <3300>;
++ };
++
++ sound_0_pins: sound0 {
++ groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++ function = "ssi";
++ };
++
++ sound_1_pins: sound1 {
++ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++ function = "ssi";
++ };
++
++ sound_2_pins: sound2 {
++ groups = "ssi6_ctrl", "ssi6_data";
++ function = "ssi";
++ };
++
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
++
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ can1_pins: can1 {
++ groups = "can1_data";
++ function = "can1";
++ };
++
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++
++ canfd1_pins: canfd1 {
++ groups = "canfd1_data";
++ function = "canfd1";
++ };
++};
++
++&du {
++ ports {
++ port@3 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
++ };
++ };
++ };
++};
++
++&gpio0 {
++ video_a_irq {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A irq";
++ };
++
++ video_b_irq {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B irq";
++ };
++
++ gpioext_2_20_irq {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "0x20@i2c2 irq";
++ };
++};
++
++&gpio1 {
++ gpioext_2_21_irq {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "0x21@i2c2 irq";
++ };
++
++ wifi_irq {
++ gpio-hog;
++ gpios = <25 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "wifi irq";
++ };
++};
++
++&gpio5 {
++ touch_irq {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "touch irq";
++ };
++
++ /* From TI forum */
++ /* BT_AUD_OUT should be pulled low when WL_EN is activated. */
++ /* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
++ bt_strap {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "BT strap pin";
++ };
++};
++
++&gpio7 {
++ gpioext_2_21_irq {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "0x21@i2c4 irq";
++ };
++};
++
++&hscif4 {
++ pinctrl-0 = <&hscif4_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++
++ gpio_ext_20: pca9535@20 {
++ compatible = "nxp,pca9535";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio0>;
++ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ gpio_ext_21: pca9535@21 {
++ compatible = "nxp,pca9535";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio1>;
++ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ i2cswitch2: pca9548@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ /* BCM node(s) */
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* USB3.0 HUB node(s) */
++ };
++
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ /* Power amp node(s) */
++ };
++
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* Radio node(s) */
++ };
++
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++ /* A2B node(s) */
++ };
++
++ i2c@5 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <5>;
++ /* PCIe node(s) */
++ };
++
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ /* LVDS display node(s) */
++
++ polytouch: edt-ft5x06@38 {
++ compatible = "edt,edt-ft5x06";
++ reg = <0x38>;
++ interrupt-parent = <&gpio5>;
++ interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
++ };
++ };
++
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ /* Audio, GPS and Gyro node(s) */
++
++ pcm3168a: audio-codec@44 {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm3168a";
++ reg = <0x44>;
++ clocks = <&snd_clk>;
++ clock-names = "scki";
++ tdm;
++ VDD1-supply = <&codec_en_reg>;
++ VDD2-supply = <&codec_en_reg>;
++ VCCAD1-supply = <&codec_en_reg>;
++ VCCAD2-supply = <&codec_en_reg>;
++ VCCDA1-supply = <&amp_en_reg>;
++ VCCDA2-supply = <&amp_en_reg>;
++ };
++
++ lsm9ds0_acc_mag@1d {
++ compatible = "st,lsm9ds0_accel_magn";
++ reg = <0x1d>;
++ };
++
++ lsm9ds0_gyr@6b {
++ compatible = "st,lsm9ds0_gyro";
++ reg = <0x6b>;
++ };
++
++ /* GPS@ 0x42 */
++ };
++ };
++};
++
++&i2c4 {
++ gpio_ext_22: pca9535@21 {
++ compatible = "nxp,pca9535";
++ reg = <0x22>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio7>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++ cmos_pwdn {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS PWDN";
++ };
++ cmos_rst {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS RST";
++ };
++ /* pin 12 - CAM_CLK */
++ rpi_cam_io_1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO1";
++ };
++ /* pin 11 - CAM_GPIO - assume pwdn */
++ rpi_cam_io_0 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO0";
++ };
++ };
++
++ i2cswitch4: pca9548@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ /* SAM node(s) */
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* Slot A (CN10) */
++
++ ov106xx@0 {
++ compatible = "ovti,ov106xx";
++ reg = <0x60>;
++
++ port@0 {
++ ov106xx_in0: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin0ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ ov106xx_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ ov106xx_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
++ };
++ };
++ };
++
++ ov106xx@1 {
++ compatible = "ovti,ov106xx";
++ reg = <0x61>;
++
++ port@0 {
++ ov106xx_in1: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin1ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ ov106xx_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ ov106xx_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
++ };
++ };
++ };
++
++ ov106xx@2 {
++ compatible = "ovti,ov106xx";
++ reg = <0x62>;
++
++ port@0 {
++ ov106xx_in2: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin2ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ ov106xx_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++
++ ov106xx@3 {
++ compatible = "ovti,ov106xx";
++ reg = <0x63>;
++
++ port@0 {
++ ov106xx_in3: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin3ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ ov106xx_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++
++ /* DS90UB964 @ 0x3a */
++ ti964-ti9x3@0 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti964_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti964_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ ti964_des0ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ ti964_des0ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ ti964_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* DS90UB954 @ 0x38 */
++ ti954-ti9x3@0 {
++ compatible = "ti,ti954-ti9x3";
++ reg = <0x38>;
++ /* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
++ ti,sensor_delay = <350>;
++ ti,links = <2>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti954_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti954_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ ti954_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* MAX9286 @ 0x2c */
++ max9286-max9271@0 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des0ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ max9286_des0ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ max9286_des0ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ max9286_des0ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ max9286_csi0ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ /* Slot B (CN11) */
++
++ ov106xx@4 {
++ compatible = "ovti,ov106xx";
++ reg = <0x64>;
++
++ port@0 {
++ ov106xx_in4: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin4ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep0>;
++ };
++ ov106xx_ti964_des1ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep0>;
++ };
++ ov106xx_ti954_des1ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep0>;
++ };
++ };
++ };
++
++ ov106xx@5 {
++ compatible = "ovti,ov106xx";
++ reg = <0x65>;
++
++ port@0 {
++ ov106xx_in5: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin5ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep1>;
++ };
++ ov106xx_ti964_des1ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep1>;
++ };
++ ov106xx_ti954_des1ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep1>;
++ };
++ };
++ };
++
++ ov106xx@6 {
++ compatible = "ovti,ov106xx";
++ reg = <0x66>;
++
++ port@0 {
++ ov106xx_in6: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin6ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep2>;
++ };
++ ov106xx_ti964_des1ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep2>;
++ };
++ };
++ };
++
++ ov106xx@7 {
++ compatible = "ovti,ov106xx";
++ reg = <0x67>;
++
++ port@0 {
++ ov106xx_in7: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin7ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep3>;
++ };
++ ov106xx_ti964_des1ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep3>;
++ };
++ };
++ };
++
++ /* DS90UB964 @ 0x3a */
++ ti964-ti9x3@1 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti964_des1ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ ti964_des1ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ ti964_des1ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in6>;
++ };
++ ti964_des1ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in7>;
++ };
++ };
++ port@1 {
++ ti964_csi2ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++
++ /* DS90UB954 @ 0x38 */
++ ti954-ti9x3@1 {
++ compatible = "ti,ti954-ti9x3";
++ reg = <0x38>;
++ /* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
++ ti,sensor_delay = <350>;
++ ti,links = <2>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti954_des1ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ ti954_des1ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ };
++ port@1 {
++ ti954_csi2ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++
++ /* MAX9286 @ 0x2c */
++ max9286-max9271@1 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des1ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ max9286_des1ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ max9286_des1ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in6>;
++ };
++ max9286_des1ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in7>;
++ };
++ };
++ port@1 {
++ max9286_csi2ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ /* Slot B (CN11) */
++
++ video_b_ext0: pca9535@27 {
++ compatible = "nxp,pca9535";
++ reg = <0x27>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_b_des_cfg1 {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg1";
++ };
++ video_b_des_cfg0 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg0";
++ };
++ video_b_pwr_shdn {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR_SHDN";
++ };
++ video_b_cam_pwr0 {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR0";
++ };
++ video_b_cam_pwr1 {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR1";
++ };
++ video_b_cam_pwr2 {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR2";
++ };
++ video_b_cam_pwr3 {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR3";
++ };
++ video_b_des_shdn {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B DES_SHDN";
++ };
++ video_b_des_led {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B led";
++ };
++ };
++
++ video_b_ext1: max7325@5c {
++ compatible = "maxim,max7325";
++ reg = <0x5c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_b_des_cfg2 {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg2";
++ };
++ video_b_des_cfg1 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg1";
++ };
++ video_b_des_cfg0 {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg0";
++ };
++ video_b_pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR_SHDN";
++ };
++ video_b_cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR0";
++ };
++ video_b_cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR1";
++ };
++ video_b_cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR2";
++ };
++ video_b_cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR3";
++ };
++ video_b_des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B DES_SHDN";
++ };
++ video_b_led {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B LED";
++ };
++ };
++ };
++
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ /* Slot A (CN10) */
++
++ video_a_ext0: pca9535@26 {
++ compatible = "nxp,pca9535";
++ reg = <0x26>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_des_led {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A led";
++ };
++ };
++
++ video_a_ext1: max7325@5c {
++ compatible = "maxim,max7325";
++ reg = <0x5c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg2 {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg2";
++ };
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_led {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A LED";
++ };
++ };
++ };
++ };
++};
++
++&pcie_bus_clk {
++ clock-frequency = <100000000>;
++ status = "okay";
+};
+
+&pciec0 {
+ status = "okay";
++};
+
-+ /* Root complex */
++&pciec1 {
++ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
++
++&vin0 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin0ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ };
++ port@1 {
++ csi0ep0: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin0_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ vin0_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ vin0_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
++ };
++ };
++ };
++};
++
++&vin1 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin1ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <1>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ csi0ep1: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin1_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ vin1_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ vin1_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
++ };
++ };
++ };
++};
++
++&vin2 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin2ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <2>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ };
++ port@1 {
++ csi0ep2: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin2_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ vin2_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++};
++
++&vin3 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin3ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <3>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ csi0ep3: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin3_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ vin3_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++};
++
++&vin4 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin4ep0: endpoint {
++ csi,select = "csi41";
++ virtual,channel = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep0: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin4_max9286_des1ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep0>;
++ };
++ vin4_ti964_des1ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep0>;
++ };
++ vin4_ti954_des1ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep0>;
++ };
++ };
++ };
++};
++
++&vin5 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin5ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <1>;
++ remote-endpoint = <&ov106xx_in5>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep1: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin5_max9286_des1ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep1>;
++ };
++ vin5_ti964_des1ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep1>;
++ };
++ vin5_ti954_des1ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep1>;
++ };
++ };
++ };
++};
++
++&vin6 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin6ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <2>;
++ remote-endpoint = <&ov106xx_in6>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep2: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin6_max9286_des1ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep2>;
++ };
++ vin6_ti964_des1ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep2>;
++ };
++ };
++ };
++};
++
++&vin7 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin7ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <3>;
++ remote-endpoint = <&ov106xx_in7>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep3: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin7_max9286_des1ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep3>;
++ };
++ vin7_ti964_des1ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep3>;
++ };
++ };
++ };
++};
++
++&csi2_40 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_40_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
++};
++
++&csi2_41 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_41_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
++};
++
++&rcar_sound {
++ pinctrl-0 = <&sound_clk_pins>;
++
++ /* Multi DAI */
++ #sound-dai-cells = <1>;
++
++ rcar_sound,dai {
++ dai0 {
++ playback = <&ssi7>;
++ capture = <&ssi8>;
++ };
++
++ dai1 {
++ playback = <&ssi0 &src0 &dvc0>;
++ capture = <&ssi1 &src1 &dvc1>;
++ };
++
++ dai2 {
++ capture = <&ssi6>;
++ };
++ };
++};
++
++&sdhi3 {
++ pinctrl-0 = <&sdhi3_pins_3v3>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&wlan_en>;
++ vqmmc-supply = <&vccq_sdhi3>;
++ keep-power-in-suspend;
++ enable-sdio-wakeup;
++ bus-width = <4>;
++ no-1-8-v;
++ non-removable;
++ cap-power-off-card;
++ max-frequency = <26000000>;
++ status = "okay";
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1837";
++ reg = <2>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++ };
++};
++
++&usb2_phy0 {
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&hsusb {
++ status = "okay";
++};
++
++&ehci0 {
++ status = "okay";
++};
++
++&ohci0 {
++ status = "okay";
++};
++
++&xhci0 {
++ status = "okay";
++};
++
++&msiof1 {
++ status = "disabled";
++};
++
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++ pinctrl-0 = <&can1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++ pinctrl-names = "default";
++ status = "disabled";
++
++ channel0 {
++ status = "okay";
++ };
++
++ channel1 {
++ status = "okay";
++ };
++};
++
++&ssi8 {
++ shared-pin;
++};
++
++/* uncomment to enable CN48 on VIN4 */
++//#include "../ulcb-kf-rpi.dtsi"
++/* uncomment to enable CN47: SD on SDHI3 */
++//#include "../ulcb-kf-sd3.dtsi"
++/* uncomment to override CN29 (CMOS camera) on VIN5 */
++//#include "../ulcb-kf-cmos.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts
new file mode 100644
-index 0000000..2f8b274
+index 0000000..1672384
--- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
-@@ -0,0 +1,23 @@
++++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-es1-h3ulcb-kf-v1.dts
+@@ -0,0 +1,440 @@
+/*
-+ * Device Tree Source for the H3ULCB.HAD board Beta side on r8a7795 ES1.x
++ * Device Tree Source for the H3ULCB Kingfisher V1 board on r8a7795 ES1.x
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
@@ -139,257 +1854,2169 @@ index 0000000..2f8b274
+ * kind, whether express or implied.
+ */
+
-+#include "r8a7795-es1-h3ulcb-had.dtsi"
++#include "r8a7795-es1-h3ulcb-kf-v0.dts"
+
+/ {
-+ model = "Renesas H3ULCB.HAD board Beta side based on r8a7795";
++ model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795";
++
++ aliases {
++ serial1 = &hscif0;
++ serial2 = &hscif1;
++ serial3 = &scif1;
++ };
++
++ wlan_en: regulator@4 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ codec_en_reg: regulator@6 {
++ compatible = "regulator-fixed";
++ regulator-name = "codec-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 15 0>;
++
++ /* delay - CHECK */
++ startup-delay-us = <70000>;
++ enable-active-high;
++ };
++
++ amp_en_reg: regulator@7 {
++ compatible = "regulator-fixed";
++ regulator-name = "amp-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 0 0>;
++
++ startup-delay-us = <0>;
++ enable-active-high;
++ };
++
++ /delete-node/regulator@8;
++
++ sdio_switch: regulator@9 {
++ compatible = "regulator-fixed";
++ regulator-name = "wifi_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_74 5 0>;
++ enable-active-low;
++ regulator-always-on;
++ };
++
++ /delete-node/regulator@10;
++
++ radio_switch: regulator@11 {
++ compatible = "regulator-fixed";
++ regulator-name = "radio_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ kim {
++ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
++ };
++
++ hdmi-out {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con: endpoint {
++ remote-endpoint = <&adv7513_out>;
++ };
++ };
++ };
+};
+
-+&pciec0 {
++&pfc {
++ /delete-node/hscif4;
++
++ scif1_pins: scif1 {
++ groups = "scif1_data_b";
++ function = "scif1";
++ };
++
++ hscif0_pins: hscif0 {
++ groups = "hscif0_data", "hscif0_ctrl";
++ function = "hscif0";
++ };
++
++ hscif1_pins: hscif1 {
++ groups = "hscif1_data_a", "hscif1_ctrl_a";
++ function = "hscif1";
++ };
++
++ du_pins: du {
++ groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++ function = "du";
++ };
++};
++
++&du {
++ pinctrl-0 = <&du_pins>;
++ pinctrl-names = "default";
++
++ ports {
++ port@0 {
++ endpoint {
++ remote-endpoint = <&adv7513_in>;
++ };
++ };
++ };
++};
++
++&gpio0 {
++ /delete-node/video_a_irq;
++ /delete-node/video_b_irq;
++ /delete-node/gpioext_2_20_irq;
++};
++
++&gpio1 {
++ /delete-node/gpioext_2_21_irq;
++ /delete-node/wifi_irq;
++};
++
++&gpio2 {
++ bl_pwm {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "BL PWM 100%";
++ };
++};
++
++&gpio5 {
++ /delete-node/touch_irq;
++ /delete-node/bt_strap;
++};
++
++&gpio7 {
++ /delete-node/gpioext_2_21_irq;
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++
+ status = "okay";
++};
+
-+ /* Endpoint */
-+ endpoint;
++&hscif0 {
++ pinctrl-0 = <&hscif0_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
++
++&hscif1 {
++ pinctrl-0 = <&hscif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&hscif4 {
++ /delete-property/pinctrl-0;
++ /delete-property/pinctrl-names;
++
++ status = "disabled";
++};
++
++&i2c2 {
++ /delete-node/pca9535@20;
++ /delete-node/pca9535@21;
++
++ gpio_ext_74: pca9539@74 {
++ compatible = "nxp,pca9539";
++ reg = <0x74>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++ hub_pwen {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB pwen";
++ };
++ hub_rst {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB rst";
++ };
++ otg_offvbus {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "OTG off VBUSn";
++ };
++ otg_extlpn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "OTG EXTLPn";
++ };
++ otg_stat1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat1";
++ };
++ otg_stat2 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat2";
++ };
++ };
++
++ gpio_ext_75: pca9539@75 {
++ compatible = "nxp,pca9539";
++ reg = <0x75>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++ gps_rst {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "GPS rst";
++ };
++ fpdl_shdn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "FPDLink shdn";
++ };
++ };
++};
++
++&i2cswitch2 {
++ reg = <0x71>;
++ reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
++
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++
++ hdmi@3d {
++ compatible = "adi,adv7511w";
++ reg = <0x3d>;
++ interrupt-parent = <&gpio2>;
++ interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++ pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++ adi,clock-delay = <1200>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7513_in: endpoint {
++ remote-endpoint = <&du_out_rgb>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ adv7513_out: endpoint {
++ remote-endpoint = <&hdmi_con>;
++ };
++ };
++ };
++ };
++ };
++};
++
++&i2c4 {
++ /delete-node/pca9535@21;
++
++ gpio_ext_76: pca9539@76 {
++ compatible = "nxp,pca9539";
++ reg = <0x76>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio7>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++ port_b_a0 {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B A0";
++ };
++ port_b_a1 {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B A1";
++ };
++ port_a_a0 {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A A0";
++ };
++ port_a_a1 {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A A1";
++ };
++ cmos_pwdn {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS PWDN";
++ };
++ cmos_rst {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS RST";
++ };
++ /* pin 12 - CAM_CLK */
++ rpi_cam_io_1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO1";
++ };
++ /* pin 11 - CAM_GPIO - assume pwdn */
++ rpi_cam_io_0 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO0";
++ };
++ sam_rst {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "SAM RST";
++ };
++ sam_pwr {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "SAM PWR";
++ };
++ /* 0 - FPDLink output, 1 - LVDS output */
++ lvds_vs_fpdl {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LVDS switch";
++ };
++ };
++
++ gpio_ext_77: pca9539@77 {
++ compatible = "nxp,pca9539";
++ reg = <0x77>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio5>;
++ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++ mpcie_wake {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "mPCIe WAKE#";
++ };
++ mpcie_wdisable {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "mPCIe W_DISABLE";
++ };
++ mpcie_clreq {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe CLKREQ#";
++ };
++ mpcie_ovc {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe OVC";
++ };
++ };
++};
++
++&i2cswitch4 {
++ reg = <0x71>;
++ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++};
++
++&wlcore {
++ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++};
+diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts
new file mode 100644
-index 0000000..d50ff7a
+index 0000000..2a7ded7
--- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
-@@ -0,0 +1,225 @@
++++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v0.dts
+@@ -0,0 +1,1720 @@
+/*
-+ * Device Tree Source for the H3ULCB.HAD board on r8a7795 ES1.x
++ * Device Tree Source for the H3ULCB Kingfisher V0 board on r8a7795
+ *
-+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
-+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
-+/*
-+ * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides)
-+ * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0)
-+ */
-+
-+#include "r8a7795-es1-h3ulcb-view.dts"
++#include "../r8a7795-h3ulcb.dts"
+
+/ {
-+ model = "Renesas H3ULCB.HAD board based on r8a7795";
++ model = "Renesas H3ULCB Kingfisher V0 board based on r8a7795";
+
+ aliases {
-+ serial1 = &scif1;
-+ spi1 = &spi0_gpio;
-+ spi2 = &spi1_gpio;
++ serial1 = &hscif4;
+ };
+
-+ chosen {
-+ stdout-path = "serial1:115200n8";
++ snd_clk: snd_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <24576000>;
++ clock-output-names = "scki";
+ };
+
-+ spi0_gpio: spi_gpio@0 {
-+ compatible = "spi-gpio";
-+ num-chipselects = <1>;
-+ gpio-sck = <&gpio5 17 0>;
-+ gpio-mosi = <&gpio5 20 0>;
-+ gpio-miso = <&gpio5 22 0>;
-+ cs-gpios = <&gpio5 19 0>;
++ wlan_en: regulator@4 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vcc_sdhi3: regulator@41 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vccq_sdhi3: regulator@5 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 VccQ";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ codec_en_reg: regulator@6 {
++ compatible = "regulator-fixed";
++ regulator-name = "codec-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_20 15 0>;
++
++ /* delay - CHECK */
++ startup-delay-us = <70000>;
++ enable-active-high;
++ };
++
++ amp_en_reg: regulator@7 {
++ compatible = "regulator-fixed";
++ regulator-name = "amp-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_20 0 0>;
++
++ startup-delay-us = <0>;
++ enable-active-high;
++ };
++
++ lvds_switch: regulator@8 {
++ compatible = "regulator-fixed";
++ regulator-name = "lvds_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio1 24 0>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ sdio_switch: regulator@9 {
++ compatible = "regulator-fixed";
++ regulator-name = "wifi_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_20 5 0>;
++ enable-active-low;
++ regulator-always-on;
++ };
++
++ sound_switch: regulator@10 {
++ compatible = "regulator-fixed";
++ regulator-name = "pcm3168a_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_21 5 0>;
++ enable-active-low;
++ regulator-always-on;
++ };
++
++ radio_switch: regulator@11 {
++ compatible = "regulator-fixed";
++ regulator-name = "radio_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ kim {
++ compatible = "kim";
++ nshutdown_gpio = <343>; /* pca9535@i2c2.0x20 pin 3 */
++ /* serial1 */
++ dev_name = "/dev/ttySC1";
++ flow_cntrl = <1>;
++ /* int div 8 hscif@26.6666656MHz */
++ baud_rate = <3333332>;
++ };
++
++ btwilink {
++ compatible = "btwilink";
++ };
++
++ sound_ext: sound@0 {
++ pinctrl-0 = <&sound_0_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "left_j";
++ simple-audio-card,name = "pcm3168a";
++
++ simple-audio-card,bitclock-master = <&sound_ext_master>;
++ simple-audio-card,frame-master = <&sound_ext_master>;
++ sound_ext_master: simple-audio-card,cpu@0 {
++ sound-dai = <&rcar_sound 0>;
++ dai-tdm-slot-num = <8>;
++ dai-tdm-slot-width = <32>;
++ };
++
++ simple-audio-card,codec@0 {
++ sound-dai = <&pcm3168a>;
++ dai-tdm-slot-num = <8>;
++ dai-tdm-slot-width = <32>;
++ system-clock-frequency = <24576000>;
++ };
++ };
++
++ /delete-node/sound;
++
++ rsnd_ak4613: sound@1 {
++ pinctrl-0 = <&sound_1_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "left_j";
++ simple-audio-card,name = "ak4613";
++
++ simple-audio-card,bitclock-master = <&sndcpu>;
++ simple-audio-card,frame-master = <&sndcpu>;
++
++ sndcpu: simple-audio-card,cpu@1 {
++ sound-dai = <&rcar_sound 1>;
++ };
++
++ sndcodec: simple-audio-card,codec@1 {
++ sound-dai = <&ak4613>;
++ };
++ };
++
++ sound_radio: sound@2 {
++ pinctrl-0 = <&sound_2_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "i2s";
++ simple-audio-card,name = "radio";
++
++ simple-audio-card,bitclock-master = <&sound_radio_master>;
++ simple-audio-card,frame-master = <&sound_radio_master>;
++ simple-audio-card,cpu@2 {
++ sound-dai = <&rcar_sound 2>;
++ };
++
++ sound_radio_master: simple-audio-card,codec@2 {
++ sound-dai = <&radio>;
++ system-clock-frequency = <12288000>;
++ };
++ };
++
++ lvds-encoder {
++ compatible = "thine,thc63lvdm83d";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ port@0 {
++ reg = <0>;
++ lvds_enc_in: endpoint {
++ remote-endpoint = <&du_out_lvds0>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ lvds_enc_out: endpoint {
++ remote-endpoint = <&lvds_in>;
++ };
++ };
++ };
++ };
++
++ lvds {
++ compatible = "lvds-connector";
++
++ width-mm = <210>;
++ height-mm = <158>;
++
++ panel-timing {
++ /* 1280x800 @60Hz */
++ clock-frequency = <65000000>;
++ hactive = <1280>;
++ vactive = <800>;
++ hsync-len = <40>;
++ hfront-porch = <80>;
++ hback-porch = <40>;
++ vfront-porch = <14>;
++ vback-porch = <14>;
++ vsync-len = <4>;
++ };
++
++ port {
++ lvds_in: endpoint {
++ remote-endpoint = <&lvds_enc_out>;
++ };
++ };
++ };
++
++ radio: si468x@0 {
++ compatible = "si,si468x-pcm";
++ status = "okay";
++
++ #sound-dai-cells = <0>;
++ };
++};
++
++&pfc {
++ hscif4_pins: hscif4 {
++ groups = "hscif4_data_a", "hscif4_ctrl";
++ function = "hscif4";
++ };
++
++ sdhi3_pins_3v3: sd3_3v3 {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ power-source = <3300>;
++ };
++
++ sound_0_pins: sound0 {
++ groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++ function = "ssi";
++ };
++
++ sound_1_pins: sound1 {
++ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++ function = "ssi";
++ };
++
++ sound_2_pins: sound2 {
++ groups = "ssi6_ctrl", "ssi6_data";
++ function = "ssi";
++ };
++
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
++
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ can1_pins: can1 {
++ groups = "can1_data";
++ function = "can1";
++ };
++
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++
++ canfd1_pins: canfd1 {
++ groups = "canfd1_data";
++ function = "canfd1";
++ };
++};
++
++&du {
++ ports {
++ port@3 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
++ };
++ };
++ };
++};
++
++&gpio0 {
++ video_a_irq {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A irq";
++ };
++
++ video_b_irq {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B irq";
++ };
++
++ gpioext_2_20_irq {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "0x20@i2c2 irq";
++ };
++};
++
++&gpio1 {
++ gpioext_2_21_irq {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "0x21@i2c2 irq";
++ };
++
++ wifi_irq {
++ gpio-hog;
++ gpios = <25 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "wifi irq";
++ };
++};
++
++&gpio5 {
++ touch_irq {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "touch irq";
++ };
++
++ /* From TI forum */
++ /* BT_AUD_OUT should be pulled low when WL_EN is activated. */
++ /* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
++ bt_strap {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "BT strap pin";
++ };
++};
++
++&gpio7 {
++ gpioext_2_21_irq {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "0x21@i2c4 irq";
++ };
++};
++
++&hscif4 {
++ pinctrl-0 = <&hscif4_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++
++ gpio_ext_20: pca9535@20 {
++ compatible = "nxp,pca9535";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio0>;
++ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ gpio_ext_21: pca9535@21 {
++ compatible = "nxp,pca9535";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio1>;
++ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ i2cswitch2: pca9548@74 {
++ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
+
-+ spidev@0 {
-+ compatible = "spi-gpio";
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
+ reg = <0>;
-+ spi-max-frequency = <2000000>;
-+ spi-cpha;
-+ spi-cpol;
++ /* BCM node(s) */
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* USB3.0 HUB node(s) */
++ };
++
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ /* Power amp node(s) */
++ };
++
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* Radio node(s) */
++ };
++
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++ /* A2B node(s) */
++ };
++
++ i2c@5 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <5>;
++ /* PCIe node(s) */
++ };
++
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ /* LVDS display node(s) */
++
++ polytouch: edt-ft5x06@38 {
++ compatible = "edt,edt-ft5x06";
++ reg = <0x38>;
++ interrupt-parent = <&gpio5>;
++ interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
++ };
++ };
++
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ /* Audio, GPS and Gyro node(s) */
++
++ pcm3168a: audio-codec@44 {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm3168a";
++ reg = <0x44>;
++ clocks = <&snd_clk>;
++ clock-names = "scki";
++ tdm;
++ VDD1-supply = <&codec_en_reg>;
++ VDD2-supply = <&codec_en_reg>;
++ VCCAD1-supply = <&codec_en_reg>;
++ VCCAD2-supply = <&codec_en_reg>;
++ VCCDA1-supply = <&amp_en_reg>;
++ VCCDA2-supply = <&amp_en_reg>;
++ };
++
++ lsm9ds0_acc_mag@1d {
++ compatible = "st,lsm9ds0_accel_magn";
++ reg = <0x1d>;
++ };
++
++ lsm9ds0_gyr@6b {
++ compatible = "st,lsm9ds0_gyro";
++ reg = <0x6b>;
++ };
++
++ /* GPS@ 0x42 */
+ };
+ };
++};
+
-+ spi1_gpio: spi_gpio@1 {
-+ compatible = "spi-gpio";
-+ num-chipselects = <1>;
-+ gpio-sck = <&gpio6 8 0>;
-+ gpio-mosi = <&gpio6 7 0>;
-+ gpio-miso = <&gpio6 10 0>;
-+ cs-gpios = <&gpio6 5 0>;
++&i2c4 {
++ gpio_ext_22: pca9535@21 {
++ compatible = "nxp,pca9535";
++ reg = <0x22>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio7>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++ cmos_pwdn {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS PWDN";
++ };
++ cmos_rst {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS RST";
++ };
++ /* pin 12 - CAM_CLK */
++ rpi_cam_io_1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO1";
++ };
++ /* pin 11 - CAM_GPIO - assume pwdn */
++ rpi_cam_io_0 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO0";
++ };
++ };
++
++ i2cswitch4: pca9548@74 {
++ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
++ reg = <0x74>;
++ reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
+
-+ spidev@0 {
-+ compatible = "spi-gpio";
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
+ reg = <0>;
-+ spi-max-frequency = <2000000>;
-+ spi-cpha;
-+ spi-cpol;
++ /* SAM node(s) */
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* Slot A (CN10) */
++
++ ov106xx@0 {
++ compatible = "ovti,ov106xx";
++ reg = <0x60>;
++
++ port@0 {
++ ov106xx_in0: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin0ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ ov106xx_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ ov106xx_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
++ };
++ };
++ };
++
++ ov106xx@1 {
++ compatible = "ovti,ov106xx";
++ reg = <0x61>;
++
++ port@0 {
++ ov106xx_in1: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin1ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ ov106xx_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ ov106xx_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
++ };
++ };
++ };
++
++ ov106xx@2 {
++ compatible = "ovti,ov106xx";
++ reg = <0x62>;
++
++ port@0 {
++ ov106xx_in2: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin2ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ ov106xx_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++
++ ov106xx@3 {
++ compatible = "ovti,ov106xx";
++ reg = <0x63>;
++
++ port@0 {
++ ov106xx_in3: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin3ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ ov106xx_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++
++ /* DS90UB964 @ 0x3a */
++ ti964-ti9x3@0 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti964_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti964_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ ti964_des0ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ ti964_des0ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ ti964_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* DS90UB954 @ 0x38 */
++ ti954-ti9x3@0 {
++ compatible = "ti,ti954-ti9x3";
++ reg = <0x38>;
++ /* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
++ ti,sensor_delay = <350>;
++ ti,links = <2>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti954_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti954_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ ti954_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* MAX9286 @ 0x2c */
++ max9286-max9271@0 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des0ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ max9286_des0ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ max9286_des0ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ max9286_des0ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ max9286_csi0ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ /* Slot B (CN11) */
++
++ ov106xx@4 {
++ compatible = "ovti,ov106xx";
++ reg = <0x64>;
++
++ port@0 {
++ ov106xx_in4: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin4ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep0>;
++ };
++ ov106xx_ti964_des1ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep0>;
++ };
++ ov106xx_ti954_des1ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep0>;
++ };
++ };
++ };
++
++ ov106xx@5 {
++ compatible = "ovti,ov106xx";
++ reg = <0x65>;
++
++ port@0 {
++ ov106xx_in5: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin5ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep1>;
++ };
++ ov106xx_ti964_des1ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep1>;
++ };
++ ov106xx_ti954_des1ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep1>;
++ };
++ };
++ };
++
++ ov106xx@6 {
++ compatible = "ovti,ov106xx";
++ reg = <0x66>;
++
++ port@0 {
++ ov106xx_in6: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin6ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep2>;
++ };
++ ov106xx_ti964_des1ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep2>;
++ };
++ };
++ };
++
++ ov106xx@7 {
++ compatible = "ovti,ov106xx";
++ reg = <0x67>;
++
++ port@0 {
++ ov106xx_in7: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin7ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des1ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep3>;
++ };
++ ov106xx_ti964_des1ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep3>;
++ };
++ };
++ };
++
++ /* DS90UB964 @ 0x3a */
++ ti964-ti9x3@1 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti964_des1ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ ti964_des1ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ ti964_des1ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in6>;
++ };
++ ti964_des1ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in7>;
++ };
++ };
++ port@1 {
++ ti964_csi2ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++
++ /* DS90UB954 @ 0x38 */
++ ti954-ti9x3@1 {
++ compatible = "ti,ti954-ti9x3";
++ reg = <0x38>;
++ /* gpios = <&video_b_ext1 10 GPIO_ACTIVE_HIGH>; */
++ ti,sensor_delay = <350>;
++ ti,links = <2>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti954_des1ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ ti954_des1ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ };
++ port@1 {
++ ti954_csi2ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++
++ /* MAX9286 @ 0x2c */
++ max9286-max9271@1 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des1ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in4>;
++ };
++ max9286_des1ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in5>;
++ };
++ max9286_des1ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in6>;
++ };
++ max9286_des1ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in7>;
++ };
++ };
++ port@1 {
++ max9286_csi2ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ };
++ };
++
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* MOST node(s) */
++ };
++
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ /* Slot B (CN11) */
++
++ video_b_ext0: pca9535@27 {
++ compatible = "nxp,pca9535";
++ reg = <0x27>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_b_des_cfg1 {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg1";
++ };
++ video_b_des_cfg0 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg0";
++ };
++ video_b_pwr_shdn {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR_SHDN";
++ };
++ video_b_cam_pwr0 {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR0";
++ };
++ video_b_cam_pwr1 {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR1";
++ };
++ video_b_cam_pwr2 {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR2";
++ };
++ video_b_cam_pwr3 {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR3";
++ };
++ video_b_des_shdn {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B DES_SHDN";
++ };
++ video_b_des_led {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B led";
++ };
++ };
++
++ video_b_ext1: max7325@5c {
++ compatible = "maxim,max7325";
++ reg = <0x5c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_b_des_cfg2 {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg2";
++ };
++ video_b_des_cfg1 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg1";
++ };
++ video_b_des_cfg0 {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-B cfg0";
++ };
++ video_b_pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR_SHDN";
++ };
++ video_b_cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR0";
++ };
++ video_b_cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR1";
++ };
++ video_b_cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR2";
++ };
++ video_b_cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B PWR3";
++ };
++ video_b_des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B DES_SHDN";
++ };
++ video_b_led {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B LED";
++ };
++ };
++ };
++
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ /* Slot A (CN10) */
++
++ video_a_ext0: pca9535@26 {
++ compatible = "nxp,pca9535";
++ reg = <0x26>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_des_led {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A led";
++ };
++ };
++
++ video_a_ext1: max7325@5c {
++ compatible = "maxim,max7325";
++ reg = <0x5c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg2 {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg2";
++ };
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_led {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A LED";
++ };
++ };
+ };
+ };
++};
+
-+ hdmi1-out {
-+ compatible = "hdmi-connector";
-+ type = "a";
++&pcie_bus_clk {
++ clock-frequency = <100000000>;
++ status = "okay";
++};
+
-+ port {
-+ hdmi1_con: endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi1_out>;
++&pciec0 {
++ status = "okay";
++};
++
++&pciec1 {
++ status = "okay";
++};
++
++&vin0 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin0ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ };
++ port@1 {
++ csi0ep0: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin0_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ vin0_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ vin0_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
+ };
+ };
+ };
+};
+
-+&du {
++&vin1 {
++ status = "okay";
++
+ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin1ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <1>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
+ port@1 {
-+ endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi0_in>;
++ csi0ep1: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
+ };
+ };
+ port@2 {
-+ endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi1_in>;
++ vin1_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ vin1_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ vin1_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
+ };
+ };
+ };
+};
+
-+&hdmi1 {
++&vin2 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
++
+ port@0 {
-+ reg = <0>;
-+ rcar_dw_hdmi1_in: endpoint {
-+ remote-endpoint = <&du_out_hdmi1>;
++ vin2ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <2>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in2>;
+ };
+ };
+ port@1 {
-+ reg = <1>;
-+ rcar_dw_hdmi1_out: endpoint {
-+ remote-endpoint = <&hdmi1_con>;
++ csi0ep2: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin2_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ vin2_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
+ };
+ };
+ };
+};
+
-+&pfc {
-+ scif1_pins: scif1 {
-+ groups = "scif1_data_a";
-+ function = "scif1";
++&vin3 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin3ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <3>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ csi0ep3: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin3_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ vin3_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
+ };
++};
+
-+ msiof0_pins: spi1 {
-+ groups = "msiof0_clk", "msiof0_rxd", "msiof0_txd",
-+ "msiof0_ss1";
-+ function = "msiof0";
++&vin4 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin4ep0: endpoint {
++ csi,select = "csi41";
++ virtual,channel = <0>;
++ remote-endpoint = <&ov106xx_in4>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep0: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin4_max9286_des1ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep0>;
++ };
++ vin4_ti964_des1ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep0>;
++ };
++ vin4_ti954_des1ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep0>;
++ };
++ };
+ };
++};
+
-+ msiof1_pins: spi2 {
-+ groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a",
-+ "msiof1_ss1_a";
-+ function = "msiof1";
++&vin5 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin5ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <1>;
++ remote-endpoint = <&ov106xx_in5>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep1: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin5_max9286_des1ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep1>;
++ };
++ vin5_ti964_des1ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep1>;
++ };
++ vin5_ti954_des1ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des1ep1>;
++ };
++ };
+ };
++};
+
-+ sound_clk_pins: sound-clk {
-+ groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
-+ "audio_clkout_a" /*, "audio_clkout3_a"*/;
-+ function = "audio_clk";
++&vin6 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin6ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <2>;
++ remote-endpoint = <&ov106xx_in6>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep2: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin6_max9286_des1ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep2>;
++ };
++ vin6_ti964_des1ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep2>;
++ };
++ };
+ };
++};
+
-+ usb31_pins: usb31 {
-+ groups = "usb31";
-+ function = "usb31";
++&vin7 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin7ep0: endpoint@0 {
++ csi,select = "csi41";
++ virtual,channel = <3>;
++ remote-endpoint = <&ov106xx_in7>;
++ data-lanes = <1 2 3 4>;
++ };
++ };
++ port@1 {
++ csi2ep3: endpoint {
++ remote-endpoint = <&csi2_41_ep>;
++ };
++ };
++ port@2 {
++ vin7_max9286_des1ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des1ep3>;
++ };
++ vin7_ti964_des1ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des1ep3>;
++ };
++ };
+ };
++};
+
-+ can0_pins: can0 {
-+ groups = "can0_data_a";
-+ function = "can0";
++&csi2_40 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
+ };
+
-+ canfd0_pins: canfd0 {
-+ groups = "canfd0_data_a";
-+ function = "canfd0";
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_40_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
+ };
+};
+
-+&scif1 {
-+ pinctrl-0 = <&scif1_pins>;
-+ pinctrl-names = "default";
++&csi2_41 {
+ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_41_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
+};
+
-+&avb {
-+ /delete-property/phy-handle;
-+ /delete-property/phy-gpios;
-+ /delete-node/ethernet-phy@0;
++&rcar_sound {
++ pinctrl-0 = <&sound_clk_pins>;
+
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
++ /* Multi DAI */
++ #sound-dai-cells = <1>;
++
++ rcar_sound,dai {
++ dai0 {
++ playback = <&ssi7>;
++ capture = <&ssi8>;
++ };
++
++ dai1 {
++ playback = <&ssi0 &src0 &dvc0>;
++ capture = <&ssi1 &src1 &dvc1>;
++ };
++
++ dai2 {
++ capture = <&ssi6>;
++ };
+ };
+};
+
-+&msiof0 {
-+ pinctrl-0 = <&msiof0_pins>;
++&sdhi3 {
++ pinctrl-0 = <&sdhi3_pins_3v3>;
+ pinctrl-names = "default";
-+ status = "disabled";
-+ cs-gpios = <&gpio5 19 0>;
+
-+ spidev@0 {
-+ compatible = "renesas,sh-msiof";
-+ reg = <0>;
-+ spi-max-frequency = <66666666>;
-+ spi-cpha;
-+ spi-cpol;
++ vmmc-supply = <&wlan_en>;
++ vqmmc-supply = <&vccq_sdhi3>;
++ keep-power-in-suspend;
++ enable-sdio-wakeup;
++ bus-width = <4>;
++ no-1-8-v;
++ non-removable;
++ cap-power-off-card;
++ max-frequency = <26000000>;
++ status = "okay";
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1837";
++ reg = <2>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
+ };
+};
+
++&usb2_phy0 {
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&ehci0 {
++ status = "okay";
++};
++
++&ohci0 {
++ status = "okay";
++};
++
++&xhci0 {
++ status = "okay";
++};
++
+&msiof1 {
+ status = "disabled";
-+ cs-gpios = <&gpio6 5 0>;
+};
+
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
-+ status = "disabled";
++ status = "okay";
+
+ renesas,can-clock-select = <0x0>;
-+ gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
-+ &gpio2 7 GPIO_ACTIVE_LOW /* standby */
-+ >;
+};
+
-+&canfd {
-+ pinctrl-0 = <&canfd0_pins>;
++&can1 {
++ pinctrl-0 = <&can1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ renesas,can-clock-select = <0x0>;
-+ gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
-+ &gpio2 7 GPIO_ACTIVE_LOW /* standby */
-+ >;
++};
++
++&canfd {
++ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++ pinctrl-names = "default";
++ status = "disabled";
+
+ channel0 {
+ status = "okay";
+ };
++
++ channel1 {
++ status = "okay";
++ };
+};
+
-+&xhci1 {
-+ status = "okay";
-+ pinctrl-0 = <&usb31_pins>;
-+ pinctrl-names = "default";
++&ssi8 {
++ shared-pin;
+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
++
++/* uncomment to enable CN47: SD on SDHI3 */
++//#include "../ulcb-kf-sd3.dtsi"
++/* CN48 (Raspberry Pi) on VIN4 */
++//#include "../ulcb-kf-rpi.dtsi"
++/* CN29: (CMOS camera) on VIN5 */
++//#include "../ulcb-kf-cmos.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts
new file mode 100644
-index 0000000..408bf2e
+index 0000000..119f58c
--- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf-v1.dts
-@@ -0,0 +1,445 @@
++++ b/arch/arm64/boot/dts/renesas/legacy/r8a7795-h3ulcb-kf-v1.dts
+@@ -0,0 +1,464 @@
+/*
-+ * Device Tree Source for the H3ULCB Kingfisher V1 board on r8a7795 ES1.x
++ * Device Tree Source for the H3ULCB Kingfisher V1 board
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
@@ -399,7 +4026,7 @@ index 0000000..408bf2e
+ * kind, whether express or implied.
+ */
+
-+#include "r8a7795-es1-h3ulcb-kf.dts"
++#include "r8a7795-h3ulcb-kf-v0.dts"
+
+/ {
+ model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795";
@@ -470,6 +4097,25 @@ index 0000000..408bf2e
+ regulator-always-on;
+ };
+
++ mpcie_3v3: regulator@12 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ mpcie_1v8: regulator@13 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>;
++ startup-delay-us = <200000>;
++ enable-active-high;
++ };
++
+ kim {
+ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
+ };
@@ -520,11 +4166,6 @@ index 0000000..408bf2e
+ remote-endpoint = <&adv7513_in>;
+ };
+ };
-+ port@1 {
-+ endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi0_in>;
-+ };
-+ };
+ };
+};
+
@@ -833,14 +4474,19 @@ index 0000000..408bf2e
+&wlcore {
+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
++
++&pciec1 {
++ pcie3v3-supply = <&mpcie_3v3>;
++ pcie1v8-supply = <&mpcie_1v8>;
++};
+diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts
new file mode 100644
-index 0000000..897da81
+index 0000000..0ac577a
--- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
-@@ -0,0 +1,1707 @@
++++ b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v0.dts
+@@ -0,0 +1,1214 @@
+/*
-+ * Device Tree Source for the H3ULCB Kingfisher board on r8a7795 ES1.x
++ * Device Tree Source for the M3ULCB Kingfisher V0 board on r8a7796
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
@@ -850,10 +4496,10 @@ index 0000000..897da81
+ * kind, whether express or implied.
+ */
+
-+#include "r8a7795-es1-h3ulcb.dts"
++#include "../r8a7796-m3ulcb.dts"
+
+/ {
-+ model = "Renesas H3ULCB Kingfisher board based on r8a7795";
++ model = "Renesas M3ULCB Kingfisher V0 board based on r8a7796";
+
+ aliases {
+ serial1 = &hscif4;
@@ -1147,6 +4793,16 @@ index 0000000..897da81
+ };
+};
+
++&du {
++ ports {
++ port@2 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
++ };
++ };
++ };
++};
++
+&gpio0 {
+ video_a_irq {
+ gpio-hog;
@@ -1330,7 +4986,7 @@ index 0000000..897da81
+ };
+
+ lsm9ds0_acc_mag@1d {
-+ compatible = "st,lsm9ds0_acc_magn";
++ compatible = "st,lsm9ds0_accel_magn";
+ reg = <0x1d>;
+ };
+
@@ -1605,6 +5261,2158 @@ index 0000000..897da81
+ };
+ };
+
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* MOST node(s) */
++ };
++
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ /* Slot A (CN10) */
++
++ video_a_ext0: pca9535@26 {
++ compatible = "nxp,pca9535";
++ reg = <0x26>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <15 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_des_led {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A led";
++ };
++ };
++
++ video_a_ext1: max7325@5c {
++ compatible = "maxim,max7325";
++ reg = <0x5c>;
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ video_a_des_cfg2 {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg2";
++ };
++ video_a_des_cfg1 {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg1";
++ };
++ video_a_des_cfg0 {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "Video-A cfg0";
++ };
++ video_a_pwr_shdn {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR_SHDN";
++ };
++ video_a_cam_pwr0 {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR0";
++ };
++ video_a_cam_pwr1 {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR1";
++ };
++ video_a_cam_pwr2 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR2";
++ };
++ video_a_cam_pwr3 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A PWR3";
++ };
++ video_a_des_shdn {
++ gpio-hog;
++ gpios = <13 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A DES_SHDN";
++ };
++ video_a_led {
++ gpio-hog;
++ gpios = <12 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A LED";
++ };
++ };
++ };
++ };
++};
++
++&pcie_bus_clk {
++ clock-frequency = <100000000>;
++ status = "okay";
++};
++
++&pciec0 {
++ status = "okay";
++};
++
++&pciec1 {
++ status = "okay";
++};
++
++&vin0 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin0ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ };
++ port@1 {
++ csi0ep0: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin0_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ vin0_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ vin0_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
++ };
++ };
++ };
++};
++
++&vin1 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin1ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <1>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ csi0ep1: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin1_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ vin1_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ vin1_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
++ };
++ };
++ };
++};
++
++&vin2 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin2ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <2>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ };
++ port@1 {
++ csi0ep2: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin2_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ vin2_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++};
++
++&vin3 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ vin3ep0: endpoint {
++ csi,select = "csi40";
++ virtual,channel = <3>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ csi0ep3: endpoint {
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ port@2 {
++ vin3_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ vin3_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++};
++
++&csi2_40 {
++ status = "okay";
++
++ virtual,channel {
++ csi2_vc0 {
++ data,type = "ycbcr422";
++ receive,vc = <0>;
++ };
++ csi2_vc1 {
++ data,type = "ycbcr422";
++ receive,vc = <1>;
++ };
++ csi2_vc2 {
++ data,type = "ycbcr422";
++ receive,vc = <2>;
++ };
++ csi2_vc3 {
++ data,type = "ycbcr422";
++ receive,vc = <3>;
++ };
++ };
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ csi2_40_ep: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ csi-rate = <300>;
++ };
++ };
++};
++
++&rcar_sound {
++ pinctrl-0 = <&sound_clk_pins>;
++
++ /* Multi DAI */
++ #sound-dai-cells = <1>;
++
++ rcar_sound,dai {
++ dai0 {
++ playback = <&ssi7>;
++ capture = <&ssi8>;
++ };
++
++ dai1 {
++ playback = <&ssi0 &src0 &dvc0>;
++ capture = <&ssi1 &src1 &dvc1>;
++ };
++
++ dai2 {
++ capture = <&ssi6>;
++ };
++ };
++};
++
++&sdhi3 {
++ pinctrl-0 = <&sdhi3_pins_3v3>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&wlan_en>;
++ vqmmc-supply = <&vccq_sdhi3>;
++ keep-power-in-suspend;
++ enable-sdio-wakeup;
++ bus-width = <4>;
++ no-1-8-v;
++ non-removable;
++ cap-power-off-card;
++ max-frequency = <26000000>;
++ status = "okay";
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1837";
++ reg = <2>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++ };
++};
++
++&usb2_phy0 {
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&hsusb {
++ status = "okay";
++};
++
++&ehci0 {
++ status = "okay";
++};
++
++&ohci0 {
++ status = "okay";
++};
++
++&xhci0 {
++ status = "okay";
++};
++
++&msiof1 {
++ status = "disabled";
++};
++
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ renesas,can-clock-select = <0x0>;
++};
++
++&can1 {
++ pinctrl-0 = <&can1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ renesas,can-clock-select = <0x0>;
++};
++
++&canfd {
++ pinctrl-0 = <&canfd0_pins &canfd1_pins>;
++ pinctrl-names = "default";
++ status = "disabled";
++
++ channel0 {
++ status = "okay";
++ };
++
++ channel1 {
++ status = "okay";
++ };
++};
++
++&ssi8 {
++ shared-pin;
++};
++
++/* uncomment to enable CN47: SD on SDHI3 */
++//#include "../ulcb-kf-sd3.dtsi"
++/* CN48 (Raspberry Pi) on VIN4 */
++#include "../ulcb-kf-rpi.dtsi"
++/* CN29: (CMOS camera) on VIN5 */
++#include "../ulcb-kf-cmos.dtsi"
+diff --git a/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts
+new file mode 100644
+index 0000000..1344152
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/legacy/r8a7796-m3ulcb-kf-v1.dts
+@@ -0,0 +1,464 @@
++/*
++ * Device Tree Source for the M3ULCB Kingfisher V1 board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7796-m3ulcb-kf-v0.dts"
++
++/ {
++ model = "Renesas M3ULCB Kingfisher V1 board based on r8a7796";
++
++ aliases {
++ serial1 = &hscif0;
++ serial2 = &hscif1;
++ serial3 = &scif1;
++ };
++
++ wlan_en: regulator@4 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ codec_en_reg: regulator@6 {
++ compatible = "regulator-fixed";
++ regulator-name = "codec-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 15 0>;
++
++ /* delay - CHECK */
++ startup-delay-us = <70000>;
++ enable-active-high;
++ };
++
++ amp_en_reg: regulator@7 {
++ compatible = "regulator-fixed";
++ regulator-name = "amp-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 0 0>;
++
++ startup-delay-us = <0>;
++ enable-active-high;
++ };
++
++ /delete-node/regulator@8;
++
++ sdio_switch: regulator@9 {
++ compatible = "regulator-fixed";
++ regulator-name = "wifi_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_74 5 0>;
++ enable-active-low;
++ regulator-always-on;
++ };
++
++ /delete-node/regulator@10;
++
++ radio_switch: regulator@11 {
++ compatible = "regulator-fixed";
++ regulator-name = "radio_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ mpcie_3v3: regulator@12 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ mpcie_1v8: regulator@13 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>;
++ startup-delay-us = <200000>;
++ enable-active-high;
++ };
++
++ kim {
++ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
++ };
++
++ hdmi-out {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con: endpoint {
++ remote-endpoint = <&adv7513_out>;
++ };
++ };
++ };
++};
++
++&pfc {
++ /delete-node/hscif4;
++
++ scif1_pins: scif1 {
++ groups = "scif1_data_b";
++ function = "scif1";
++ };
++
++ hscif0_pins: hscif0 {
++ groups = "hscif0_data", "hscif0_ctrl";
++ function = "hscif0";
++ };
++
++ hscif1_pins: hscif1 {
++ groups = "hscif1_data_a", "hscif1_ctrl_a";
++ function = "hscif1";
++ };
++
++ du_pins: du {
++ groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++ function = "du";
++ };
++};
++
++&du {
++ pinctrl-0 = <&du_pins>;
++ pinctrl-names = "default";
++
++ ports {
++ port@0 {
++ endpoint {
++ remote-endpoint = <&adv7513_in>;
++ };
++ };
++ };
++};
++
++&gpio0 {
++ /delete-node/video_a_irq;
++ /delete-node/video_b_irq;
++ /delete-node/gpioext_2_20_irq;
++};
++
++&gpio1 {
++ /delete-node/gpioext_2_21_irq;
++ /delete-node/wifi_irq;
++};
++
++&gpio2 {
++ bl_pwm {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "BL PWM 100%";
++ };
++};
++
++&gpio5 {
++ /delete-node/touch_irq;
++ /delete-node/bt_strap;
++};
++
++&gpio7 {
++ /delete-node/gpioext_2_21_irq;
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&hscif0 {
++ pinctrl-0 = <&hscif0_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
++};
++
++&hscif1 {
++ pinctrl-0 = <&hscif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&hscif4 {
++ /delete-property/pinctrl-0;
++ /delete-property/pinctrl-names;
++
++ status = "disabled";
++};
++
++&i2c2 {
++ /delete-node/pca9535@20;
++ /delete-node/pca9535@21;
++
++ gpio_ext_74: pca9539@74 {
++ compatible = "nxp,pca9539";
++ reg = <0x74>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++ hub_pwen {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB pwen";
++ };
++ hub_rst {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB rst";
++ };
++ otg_offvbus {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "OTG off VBUSn";
++ };
++ otg_extlpn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "OTG EXTLPn";
++ };
++ otg_stat1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat1";
++ };
++ otg_stat2 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat2";
++ };
++ };
++
++ gpio_ext_75: pca9539@75 {
++ compatible = "nxp,pca9539";
++ reg = <0x75>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++ gps_rst {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "GPS rst";
++ };
++ fpdl_shdn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "FPDLink shdn";
++ };
++ };
++};
++
++&i2cswitch2 {
++ reg = <0x71>;
++ reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
++
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++
++ hdmi@3d {
++ compatible = "adi,adv7511w";
++ reg = <0x3d>;
++ interrupt-parent = <&gpio2>;
++ interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++ pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++ adi,clock-delay = <1200>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7513_in: endpoint {
++ remote-endpoint = <&du_out_rgb>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ adv7513_out: endpoint {
++ remote-endpoint = <&hdmi_con>;
++ };
++ };
++ };
++ };
++ };
++};
++
++&i2c4 {
++ /delete-node/pca9535@21;
++
++ gpio_ext_76: pca9539@76 {
++ compatible = "nxp,pca9539";
++ reg = <0x76>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio7>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++ port_b_a0 {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B A0";
++ };
++ port_b_a1 {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B A1";
++ };
++ port_a_a0 {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A A0";
++ };
++ port_a_a1 {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A A1";
++ };
++ cmos_pwdn {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS PWDN";
++ };
++ cmos_rst {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS RST";
++ };
++ /* pin 12 - CAM_CLK */
++ rpi_cam_io_1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO1";
++ };
++ /* pin 11 - CAM_GPIO - assume pwdn */
++ rpi_cam_io_0 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO0";
++ };
++ sam_rst {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "SAM RST";
++ };
++ sam_pwr {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "SAM PWR";
++ };
++ /* 0 - FPDLink output, 1 - LVDS output */
++ lvds_vs_fpdl {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LVDS switch";
++ };
++ };
++
++ gpio_ext_77: pca9539@77 {
++ compatible = "nxp,pca9539";
++ reg = <0x77>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio5>;
++ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++ mpcie_wake {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "mPCIe WAKE#";
++ };
++ mpcie_wdisable {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "mPCIe W_DISABLE";
++ };
++ mpcie_clreq {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe CLKREQ#";
++ };
++ mpcie_ovc {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe OVC";
++ };
++ };
++};
++
++&i2cswitch4 {
++ reg = <0x71>;
++ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++};
++
++&wlcore {
++ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
++};
++
++&pciec1 {
++ pcie3v3-supply = <&mpcie_3v3>;
++ pcie1v8-supply = <&mpcie_1v8>;
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
+new file mode 100644
+index 0000000..6b13f07
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-alfa.dts
+@@ -0,0 +1,22 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board Alfa side on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb-had.dtsi"
++
++/ {
++ model = "Renesas H3ULCB.HAD board Alfa side based on r8a7795";
++};
++
++&pciec0 {
++ status = "okay";
++
++ /* Root complex */
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
+new file mode 100644
+index 0000000..2f8b274
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had-beta.dts
+@@ -0,0 +1,23 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board Beta side on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb-had.dtsi"
++
++/ {
++ model = "Renesas H3ULCB.HAD board Beta side based on r8a7795";
++};
++
++&pciec0 {
++ status = "okay";
++
++ /* Endpoint */
++ endpoint;
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
+new file mode 100644
+index 0000000..d50ff7a
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-had.dtsi
+@@ -0,0 +1,225 @@
++/*
++ * Device Tree Source for the H3ULCB.HAD board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/*
++ * MSIOF0 - /dev/spidev1.0 connected to FPGA ethernet switch (both sides)
++ * MSIOF1 - /dev/spidev2.0 connected to RH850 (sideA to CSIH1, sideB to CSIH0)
++ */
++
++#include "r8a7795-es1-h3ulcb-view.dts"
++
++/ {
++ model = "Renesas H3ULCB.HAD board based on r8a7795";
++
++ aliases {
++ serial1 = &scif1;
++ spi1 = &spi0_gpio;
++ spi2 = &spi1_gpio;
++ };
++
++ chosen {
++ stdout-path = "serial1:115200n8";
++ };
++
++ spi0_gpio: spi_gpio@0 {
++ compatible = "spi-gpio";
++ num-chipselects = <1>;
++ gpio-sck = <&gpio5 17 0>;
++ gpio-mosi = <&gpio5 20 0>;
++ gpio-miso = <&gpio5 22 0>;
++ cs-gpios = <&gpio5 19 0>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ spidev@0 {
++ compatible = "spi-gpio";
++ reg = <0>;
++ spi-max-frequency = <2000000>;
++ spi-cpha;
++ spi-cpol;
++ };
++ };
++
++ spi1_gpio: spi_gpio@1 {
++ compatible = "spi-gpio";
++ num-chipselects = <1>;
++ gpio-sck = <&gpio6 8 0>;
++ gpio-mosi = <&gpio6 7 0>;
++ gpio-miso = <&gpio6 10 0>;
++ cs-gpios = <&gpio6 5 0>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ spidev@0 {
++ compatible = "spi-gpio";
++ reg = <0>;
++ spi-max-frequency = <2000000>;
++ spi-cpha;
++ spi-cpol;
++ };
++ };
++
++ hdmi1-out {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi1_con: endpoint {
++ remote-endpoint = <&rcar_dw_hdmi1_out>;
++ };
++ };
++ };
++};
++
++&du {
++ ports {
++ port@1 {
++ endpoint {
++ remote-endpoint = <&rcar_dw_hdmi0_in>;
++ };
++ };
++ port@2 {
++ endpoint {
++ remote-endpoint = <&rcar_dw_hdmi1_in>;
++ };
++ };
++ };
++};
++
++&hdmi1 {
++ status = "okay";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ port@0 {
++ reg = <0>;
++ rcar_dw_hdmi1_in: endpoint {
++ remote-endpoint = <&du_out_hdmi1>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ rcar_dw_hdmi1_out: endpoint {
++ remote-endpoint = <&hdmi1_con>;
++ };
++ };
++ };
++};
++
++&pfc {
++ scif1_pins: scif1 {
++ groups = "scif1_data_a";
++ function = "scif1";
++ };
++
++ msiof0_pins: spi1 {
++ groups = "msiof0_clk", "msiof0_rxd", "msiof0_txd",
++ "msiof0_ss1";
++ function = "msiof0";
++ };
++
++ msiof1_pins: spi2 {
++ groups = "msiof1_clk_a", "msiof1_rxd_a", "msiof1_txd_a",
++ "msiof1_ss1_a";
++ function = "msiof1";
++ };
++
++ sound_clk_pins: sound-clk {
++ groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
++ "audio_clkout_a" /*, "audio_clkout3_a"*/;
++ function = "audio_clk";
++ };
++
++ usb31_pins: usb31 {
++ groups = "usb31";
++ function = "usb31";
++ };
++
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&avb {
++ /delete-property/phy-handle;
++ /delete-property/phy-gpios;
++ /delete-node/ethernet-phy@0;
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++};
++
++&msiof0 {
++ pinctrl-0 = <&msiof0_pins>;
++ pinctrl-names = "default";
++ status = "disabled";
++ cs-gpios = <&gpio5 19 0>;
++
++ spidev@0 {
++ compatible = "renesas,sh-msiof";
++ reg = <0>;
++ spi-max-frequency = <66666666>;
++ spi-cpha;
++ spi-cpol;
++ };
++};
++
++&msiof1 {
++ status = "disabled";
++ cs-gpios = <&gpio6 5 0>;
++};
++
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "disabled";
++
++ renesas,can-clock-select = <0x0>;
++ gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
++ &gpio2 7 GPIO_ACTIVE_LOW /* standby */
++ >;
++};
++
++&canfd {
++ pinctrl-0 = <&canfd0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++
++ renesas,can-clock-select = <0x0>;
++ gpios = <&gpio2 6 GPIO_ACTIVE_HIGH /* enable - shared with camera board */
++ &gpio2 7 GPIO_ACTIVE_LOW /* standby */
++ >;
++
++ channel0 {
++ status = "okay";
++ };
++};
++
++&xhci1 {
++ status = "okay";
++ pinctrl-0 = <&usb31_pins>;
++ pinctrl-names = "default";
++};
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+new file mode 100644
+index 0000000..f117af0
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+@@ -0,0 +1,1910 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board on r8a7795 ES1.x
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb.dts"
++
++/ {
++ model = "Renesas H3ULCB Kingfisher board based on r8a7795";
++
++ aliases {
++ serial1 = &hscif0;
++ serial2 = &hscif1;
++ serial3 = &scif1;
++ };
++
++ snd_clk: snd_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <24576000>;
++ clock-output-names = "scki";
++ };
++
++ wlan_en: regulator@4 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vcc_sdhi3: regulator@41 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio4 17 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vccq_sdhi3: regulator@5 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 VccQ";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ codec_en_reg: regulator@6 {
++ compatible = "regulator-fixed";
++ regulator-name = "codec-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 15 0>;
++
++ /* delay - CHECK */
++ startup-delay-us = <70000>;
++ enable-active-high;
++ };
++
++ amp_en_reg: regulator@7 {
++ compatible = "regulator-fixed";
++ regulator-name = "amp-en-regulator";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio_ext_74 0 0>;
++
++ startup-delay-us = <0>;
++ enable-active-high;
++ };
++
++ sdio_switch: regulator@9 {
++ compatible = "regulator-fixed";
++ regulator-name = "wifi_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_74 5 0>;
++ enable-active-low;
++ regulator-always-on;
++ };
++
++ radio_switch: regulator@11 {
++ compatible = "regulator-fixed";
++ regulator-name = "radio_on";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ regulator-always-on;
++ };
++
++ mpcie_3v3: regulator@12 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ mpcie_1v8: regulator@13 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>;
++ startup-delay-us = <200000>;
++ enable-active-high;
++ };
++
++ kim {
++ compatible = "kim";
++ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
++ /* serial1 */
++ dev_name = "/dev/ttySC1";
++ flow_cntrl = <1>;
++ /* int div 8 hscif@26.6666656MHz */
++ baud_rate = <3333332>;
++ };
++
++ btwilink {
++ compatible = "btwilink";
++ };
++
++ sound_ext: sound@0 {
++ pinctrl-0 = <&sound_0_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "left_j";
++ simple-audio-card,name = "pcm3168a";
++
++ simple-audio-card,bitclock-master = <&sound_ext_master>;
++ simple-audio-card,frame-master = <&sound_ext_master>;
++ sound_ext_master: simple-audio-card,cpu@0 {
++ sound-dai = <&rcar_sound 0>;
++ dai-tdm-slot-num = <8>;
++ dai-tdm-slot-width = <32>;
++ };
++
++ simple-audio-card,codec@0 {
++ sound-dai = <&pcm3168a>;
++ dai-tdm-slot-num = <8>;
++ dai-tdm-slot-width = <32>;
++ system-clock-frequency = <24576000>;
++ };
++ };
++
++ /delete-node/sound;
++
++ rsnd_ak4613: sound@1 {
++ pinctrl-0 = <&sound_1_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "left_j";
++ simple-audio-card,name = "ak4613";
++
++ simple-audio-card,bitclock-master = <&sndcpu>;
++ simple-audio-card,frame-master = <&sndcpu>;
++
++ sndcpu: simple-audio-card,cpu@1 {
++ sound-dai = <&rcar_sound 1>;
++ };
++
++ sndcodec: simple-audio-card,codec@1 {
++ sound-dai = <&ak4613>;
++ };
++ };
++
++ sound_radio: sound@2 {
++ pinctrl-0 = <&sound_2_pins>;
++ pinctrl-names = "default";
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "i2s";
++ simple-audio-card,name = "radio";
++
++ simple-audio-card,bitclock-master = <&sound_radio_master>;
++ simple-audio-card,frame-master = <&sound_radio_master>;
++ simple-audio-card,cpu@2 {
++ sound-dai = <&rcar_sound 2>;
++ };
++
++ sound_radio_master: simple-audio-card,codec@2 {
++ sound-dai = <&radio>;
++ system-clock-frequency = <12288000>;
++ };
++ };
++
++ lvds-encoder {
++ compatible = "thine,thc63lvdm83d";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ port@0 {
++ reg = <0>;
++ lvds_enc_in: endpoint {
++ remote-endpoint = <&du_out_lvds0>;
++ };
++ };
++ port@1 {
++ reg = <1>;
++ lvds_enc_out: endpoint {
++ remote-endpoint = <&lvds_in>;
++ };
++ };
++ };
++ };
++
++ lvds {
++ compatible = "lvds-connector";
++
++ width-mm = <210>;
++ height-mm = <158>;
++
++ panel-timing {
++ /* 1280x800 @60Hz */
++ clock-frequency = <65000000>;
++ hactive = <1280>;
++ vactive = <800>;
++ hsync-len = <40>;
++ hfront-porch = <80>;
++ hback-porch = <40>;
++ vfront-porch = <14>;
++ vback-porch = <14>;
++ vsync-len = <4>;
++ };
++
++ port {
++ lvds_in: endpoint {
++ remote-endpoint = <&lvds_enc_out>;
++ };
++ };
++ };
++
++ hdmi-out {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con: endpoint {
++ remote-endpoint = <&adv7513_out>;
++ };
++ };
++ };
++
++ radio: si468x@0 {
++ compatible = "si,si468x-pcm";
++ status = "okay";
++
++ #sound-dai-cells = <0>;
++ };
++};
++
++&pfc {
++ scif1_pins: scif1 {
++ groups = "scif1_data_b";
++ function = "scif1";
++ };
++
++ hscif0_pins: hscif0 {
++ groups = "hscif0_data", "hscif0_ctrl";
++ function = "hscif0";
++ };
++
++ hscif1_pins: hscif1 {
++ groups = "hscif1_data_a", "hscif1_ctrl_a";
++ function = "hscif1";
++ };
++
++ du_pins: du {
++ groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++ function = "du";
++ };
++
++ sdhi3_pins_3v3: sd3_3v3 {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ power-source = <3300>;
++ };
++
++ sdhi3_pins_1v8: sd3_1v8 {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ power-source = <1800>;
++ };
++
++ sound_0_pins: sound0 {
++ groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
++ function = "ssi";
++ };
++
++ sound_1_pins: sound1 {
++ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data_a";
++ function = "ssi";
++ };
++
++ sound_2_pins: sound2 {
++ groups = "ssi6_ctrl", "ssi6_data";
++ function = "ssi";
++ };
++
++ sound_3_pins: sound3 {
++ groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++ function = "ssi";
++ };
++
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
++
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ can1_pins: can1 {
++ groups = "can1_data";
++ function = "can1";
++ };
++
++ canfd0_pins: canfd0 {
++ groups = "canfd0_data_a";
++ function = "canfd0";
++ };
++
++ canfd1_pins: canfd1 {
++ groups = "canfd1_data";
++ function = "canfd1";
++ };
++};
++
++&du {
++ pinctrl-0 = <&du_pins>;
++ pinctrl-names = "default";
++
++ ports {
++ port@0 {
++ endpoint {
++ remote-endpoint = <&adv7513_in>;
++ };
++ };
++ port@3 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
++ };
++ };
++ };
++};
++
++&gpio2 {
++ bl_pwm {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "BL PWM 100%";
++ };
++};
++
++&gpio6 {
++ audio_sw {
++ gpio-hog;
++ gpios = <21 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Onboard MCh Audio";
++ };
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&hscif0 {
++ pinctrl-0 = <&hscif0_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
++};
++
++&hscif1 {
++ pinctrl-0 = <&hscif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++
++ gpio_ext_74: pca9539@74 {
++ compatible = "nxp,pca9539";
++ reg = <0x74>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++ hub_pwen {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB pwen";
++ };
++ hub_rst {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB rst";
++ };
++ otg_offvbus {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "OTG off VBUSn";
++ };
++ otg_extlpn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "OTG EXTLPn";
++ };
++ otg_stat1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat1";
++ };
++ otg_stat2 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat2";
++ };
++ };
++
++ gpio_ext_75: pca9539@75 {
++ compatible = "nxp,pca9539";
++ reg = <0x75>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++ gps_rst {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "GPS rst";
++ };
++ fpdl_shdn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "FPDLink shdn";
++ };
++ };
++
++ i2cswitch2: pca9548@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x71>;
++ reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ /* BCM node(s) */
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* USB3.0 HUB node(s) */
++ };
++
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ /* Power amp node(s) */
++ };
++
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* Radio node(s) */
++ };
++
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++
++ hdmi@3d {
++ compatible = "adi,adv7511w";
++ reg = <0x3d>;
++ interrupt-parent = <&gpio2>;
++ interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++ pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++ adi,clock-delay = <1200>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7513_in: endpoint {
++ remote-endpoint = <&du_out_rgb>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ adv7513_out: endpoint {
++ remote-endpoint = <&hdmi_con>;
++ };
++ };
++ };
++ };
++ };
++
++ i2c@5 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <5>;
++ /* PCIe node(s) */
++ };
++
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ /* LVDS display node(s) */
++
++ polytouch: edt-ft5x06@38 {
++ compatible = "edt,edt-ft5x06";
++ reg = <0x38>;
++ interrupt-parent = <&gpio5>;
++ interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
++ };
++ };
++
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ /* Audio, GPS and Gyro node(s) */
++
++ pcm3168a: audio-codec@44 {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm3168a";
++ reg = <0x44>;
++ clocks = <&snd_clk>;
++ clock-names = "scki";
++ tdm;
++ VDD1-supply = <&codec_en_reg>;
++ VDD2-supply = <&codec_en_reg>;
++ VCCAD1-supply = <&codec_en_reg>;
++ VCCAD2-supply = <&codec_en_reg>;
++ VCCDA1-supply = <&amp_en_reg>;
++ VCCDA2-supply = <&amp_en_reg>;
++ };
++
++ lsm9ds0_acc_mag@1d {
++ compatible = "st,lsm9ds0_accel_magn";
++ reg = <0x1d>;
++ };
++
++ lsm9ds0_gyr@6b {
++ compatible = "st,lsm9ds0_gyro";
++ reg = <0x6b>;
++ };
++
++ /* GPS@ 0x42 */
++ };
++ };
++};
++
++&i2c4 {
++ gpio_ext_76: pca9539@76 {
++ compatible = "nxp,pca9539";
++ reg = <0x76>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio7>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++
++ port_b_a0 {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B A0";
++ };
++ port_b_a1 {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B A1";
++ };
++ port_a_a0 {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A A0";
++ };
++ port_a_a1 {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A A1";
++ };
++ cmos_pwdn {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS PWDN";
++ };
++ cmos_rst {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "CMOS RST";
++ };
++ /* pin 12 - CAM_CLK */
++ rpi_cam_io_1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO1";
++ };
++ /* pin 11 - CAM_GPIO - assume pwdn */
++ rpi_cam_io_0 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "RaspB_IO0";
++ };
++ sam_rst {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "SAM RST";
++ };
++ sam_pwr {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "SAM PWR";
++ };
++ /* 0 - FPDLink output, 1 - LVDS output */
++ lvds_vs_fpdl {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LVDS switch";
++ };
++ };
++
++ gpio_ext_77: pca9539@77 {
++ compatible = "nxp,pca9539";
++ reg = <0x77>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio5>;
++ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++ mpcie_wake {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "mPCIe WAKE#";
++ };
++ mpcie_wdisable {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "mPCIe W_DISABLE";
++ };
++ mpcie_clreq {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe CLKREQ#";
++ };
++ mpcie_ovc {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe OVC";
++ };
++ };
++
++ i2cswitch4: pca9548@74 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x71>;
++ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ /* SAM node(s) */
++ };
++
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ /* Slot A (CN10) */
++
++ ov106xx@0 {
++ compatible = "ovti,ov106xx";
++ reg = <0x60>;
++
++ port@0 {
++ ov106xx_in0: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin0ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep0: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep0>;
++ };
++ ov106xx_ti964_des0ep0: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep0>;
++ };
++ ov106xx_ti954_des0ep0: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep0>;
++ };
++ };
++ };
++
++ ov106xx@1 {
++ compatible = "ovti,ov106xx";
++ reg = <0x61>;
++
++ port@0 {
++ ov106xx_in1: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin1ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep1: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep1>;
++ };
++ ov106xx_ti964_des0ep1: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep1>;
++ };
++ ov106xx_ti954_des0ep1: endpoint@2 {
++ remote-endpoint = <&ti954_des0ep1>;
++ };
++ };
++ };
++
++ ov106xx@2 {
++ compatible = "ovti,ov106xx";
++ reg = <0x62>;
++
++ port@0 {
++ ov106xx_in2: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin2ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep2: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep2>;
++ };
++ ov106xx_ti964_des0ep2: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep2>;
++ };
++ };
++ };
++
++ ov106xx@3 {
++ compatible = "ovti,ov106xx";
++ reg = <0x63>;
++
++ port@0 {
++ ov106xx_in3: endpoint {
++ clock-lanes = <0>;
++ data-lanes = <1 2 3 4>;
++ remote-endpoint = <&vin3ep0>;
++ };
++ };
++ port@1 {
++ ov106xx_max9286_des0ep3: endpoint@0 {
++ remote-endpoint = <&max9286_des0ep3>;
++ };
++ ov106xx_ti964_des0ep3: endpoint@1 {
++ remote-endpoint = <&ti964_des0ep3>;
++ };
++ };
++ };
++
++ /* DS90UB964 @ 0x3a */
++ ti964-ti9x3@0 {
++ compatible = "ti,ti964-ti9x3";
++ reg = <0x3a>;
++ ti,sensor_delay = <350>;
++ ti,links = <4>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti964_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti964_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ ti964_des0ep2: endpoint@2 {
++ ti9x3-addr = <0x0e>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ ti964_des0ep3: endpoint@3 {
++ ti9x3-addr = <0x0f>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ ti964_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* DS90UB954 @ 0x38 */
++ ti954-ti9x3@0 {
++ compatible = "ti,ti954-ti9x3";
++ reg = <0x38>;
++ /* gpios = <&video_a_ext1 10 GPIO_ACTIVE_HIGH>; */
++ ti,sensor_delay = <350>;
++ ti,links = <2>;
++ ti,lanes = <4>;
++ ti,forwarding-mode = "round-robin";
++ ti,cable-mode = "coax";
++
++ port@0 {
++ ti954_des0ep0: endpoint@0 {
++ ti9x3-addr = <0x0c>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ ti954_des0ep1: endpoint@1 {
++ ti9x3-addr = <0x0d>;
++ dvp-order = <0>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ };
++ port@1 {
++ ti954_csi0ep0: endpoint {
++ csi-rate = <1450>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++
++ /* MAX9286 @ 0x2c */
++ max9286-max9271@0 {
++ compatible = "maxim,max9286-max9271";
++ reg = <0x2c>;
++ maxim,sensor_delay = <350>;
++ maxim,links = <4>;
++ maxim,lanes = <4>;
++ maxim,resetb-gpio = <1>;
++ maxim,fsync-mode = "automatic";
++ maxim,timeout = <100>;
++
++ port@0 {
++ max9286_des0ep0: endpoint@0 {
++ max9271-addr = <0x50>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in0>;
++ };
++ max9286_des0ep1: endpoint@1 {
++ max9271-addr = <0x51>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in1>;
++ };
++ max9286_des0ep2: endpoint@2 {
++ max9271-addr = <0x52>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in2>;
++ };
++ max9286_des0ep3: endpoint@3 {
++ max9271-addr = <0x53>;
++ dvp-order = <1>;
++ remote-endpoint = <&ov106xx_in3>;
++ };
++ };
++ port@1 {
++ max9286_csi0ep0: endpoint {
++ csi-rate = <700>;
++ remote-endpoint = <&csi2_40_ep>;
++ };
++ };
++ };
++ };
++
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -1814,6 +7622,13 @@ index 0000000..897da81
+ };
+ };
+
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* MOST node(s) */
++ };
++
+ i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -2432,15 +8247,16 @@ index 0000000..897da81
+};
+
+&rcar_sound {
-+ pinctrl-0 = <&sound_clk_pins>;
++ pinctrl-0 = <&sound_clk_pins &sound_3_pins>;
++ pinctrl-names = "default";
+
+ /* Multi DAI */
+ #sound-dai-cells = <1>;
+
+ rcar_sound,dai {
+ dai0 {
-+ playback = <&ssi7>;
-+ capture = <&ssi8>;
++ playback = <&ssi3>;
++ capture = <&ssi4>;
+ };
+
+ dai1 {
@@ -2451,12 +8267,18 @@ index 0000000..897da81
+ dai2 {
+ capture = <&ssi6>;
+ };
++
++ dai3 {
++ playback = <&ssi7>;
++ capture = <&ssi8>;
++ };
+ };
+};
+
+&sdhi3 {
+ pinctrl-0 = <&sdhi3_pins_3v3>;
-+ pinctrl-names = "default";
++ pinctrl-1 = <&sdhi3_pins_1v8>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&wlan_en>;
+ vqmmc-supply = <&vccq_sdhi3>;
@@ -2475,7 +8297,7 @@ index 0000000..897da81
+ compatible = "ti,wl1837";
+ reg = <2>;
+ interrupt-parent = <&gpio1>;
-+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
@@ -2536,19 +8358,24 @@ index 0000000..897da81
+ };
+};
+
-+&ssi8 {
++&ssi4 {
+ shared-pin;
+};
+
-+/* uncomment to enable CN48 on VIN4 */
-+//#include "ulcb-kf-rpi.dtsi"
++&pciec1 {
++ pcie3v3-supply = <&mpcie_3v3>;
++ pcie1v8-supply = <&mpcie_1v8>;
++};
++
+/* uncomment to enable CN47: SD on SDHI3 */
+//#include "ulcb-kf-sd3.dtsi"
-+/* uncomment to override CN29 (CMOS camera) on VIN5 */
++/* CN48 (Raspberry Pi) on VIN4 */
++//#include "ulcb-kf-rpi.dtsi"
++/* CN29: (CMOS camera) on VIN5 */
+//#include "ulcb-kf-cmos.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
new file mode 100644
-index 0000000..bf550b7
+index 0000000..e5734aa
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-vb.dts
@@ -0,0 +1,1787 @@
@@ -5731,487 +11558,12 @@ index 0000000..4a00426
+ status = "okay";
+ };
+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
-new file mode 100644
-index 0000000..f3e5bda
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf-v1.dts
-@@ -0,0 +1,469 @@
-+/*
-+ * Device Tree Source for the H3ULCB Kingfisher V1 board
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7795-h3ulcb-kf.dts"
-+
-+/ {
-+ model = "Renesas H3ULCB Kingfisher V1 board based on r8a7795";
-+
-+ aliases {
-+ serial1 = &hscif0;
-+ serial2 = &hscif1;
-+ serial3 = &scif1;
-+ };
-+
-+ wlan_en: regulator@4 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "wlan-en-regulator";
-+
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+
-+ gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ };
-+
-+ codec_en_reg: regulator@6 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "codec-en-regulator";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+
-+ gpio = <&gpio_ext_74 15 0>;
-+
-+ /* delay - CHECK */
-+ startup-delay-us = <70000>;
-+ enable-active-high;
-+ };
-+
-+ amp_en_reg: regulator@7 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "amp-en-regulator";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+
-+ gpio = <&gpio_ext_74 0 0>;
-+
-+ startup-delay-us = <0>;
-+ enable-active-high;
-+ };
-+
-+ /delete-node/regulator@8;
-+
-+ sdio_switch: regulator@9 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "wifi_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_74 5 0>;
-+ enable-active-low;
-+ regulator-always-on;
-+ };
-+
-+ /delete-node/regulator@10;
-+
-+ radio_switch: regulator@11 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "radio_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ mpcie_3v3: regulator@12 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "mPCIe 3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ };
-+
-+ mpcie_1v8: regulator@13 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "mPCIe 1v8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>;
-+ startup-delay-us = <200000>;
-+ enable-active-high;
-+ };
-+
-+ kim {
-+ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
-+ };
-+
-+ hdmi-out {
-+ compatible = "hdmi-connector";
-+ type = "a";
-+
-+ port {
-+ hdmi_con: endpoint {
-+ remote-endpoint = <&adv7513_out>;
-+ };
-+ };
-+ };
-+};
-+
-+&pfc {
-+ /delete-node/hscif4;
-+
-+ scif1_pins: scif1 {
-+ groups = "scif1_data_b";
-+ function = "scif1";
-+ };
-+
-+ hscif0_pins: hscif0 {
-+ groups = "hscif0_data", "hscif0_ctrl";
-+ function = "hscif0";
-+ };
-+
-+ hscif1_pins: hscif1 {
-+ groups = "hscif1_data_a", "hscif1_ctrl_a";
-+ function = "hscif1";
-+ };
-+
-+ du_pins: du {
-+ groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
-+ function = "du";
-+ };
-+};
-+
-+&du {
-+ pinctrl-0 = <&du_pins>;
-+ pinctrl-names = "default";
-+
-+ ports {
-+ port@0 {
-+ endpoint {
-+ remote-endpoint = <&adv7513_in>;
-+ };
-+ };
-+ port@1 {
-+ endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi0_in>;
-+ };
-+ };
-+ };
-+};
-+
-+&gpio0 {
-+ /delete-node/video_a_irq;
-+ /delete-node/video_b_irq;
-+ /delete-node/gpioext_2_20_irq;
-+};
-+
-+&gpio1 {
-+ /delete-node/gpioext_2_21_irq;
-+ /delete-node/wifi_irq;
-+};
-+
-+&gpio2 {
-+ bl_pwm {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "BL PWM 100%";
-+ };
-+};
-+
-+&gpio5 {
-+ /delete-node/touch_irq;
-+ /delete-node/bt_strap;
-+};
-+
-+&gpio7 {
-+ /delete-node/gpioext_2_21_irq;
-+};
-+
-+&scif1 {
-+ pinctrl-0 = <&scif1_pins>;
-+ pinctrl-names = "default";
-+
-+ status = "okay";
-+};
-+
-+&hscif0 {
-+ pinctrl-0 = <&hscif0_pins>;
-+ pinctrl-names = "default";
-+ uart-has-rtscts;
-+
-+ status = "okay";
-+};
-+
-+&hscif1 {
-+ pinctrl-0 = <&hscif1_pins>;
-+ pinctrl-names = "default";
-+
-+ status = "okay";
-+};
-+
-+&hscif4 {
-+ /delete-property/pinctrl-0;
-+ /delete-property/pinctrl-names;
-+
-+ status = "disabled";
-+};
-+
-+&i2c2 {
-+ /delete-node/pca9535@20;
-+ /delete-node/pca9535@21;
-+
-+ gpio_ext_74: pca9539@74 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x74>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio6>;
-+ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
-+
-+ hub_pwen {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "HUB pwen";
-+ };
-+ hub_rst {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "HUB rst";
-+ };
-+ otg_offvbus {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "OTG off VBUSn";
-+ };
-+ otg_extlpn {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "OTG EXTLPn";
-+ };
-+ otg_stat1 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "OTG Stat1";
-+ };
-+ otg_stat2 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "OTG Stat2";
-+ };
-+ };
-+
-+ gpio_ext_75: pca9539@75 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x75>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio6>;
-+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
-+
-+ gps_rst {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "GPS rst";
-+ };
-+ fpdl_shdn {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "FPDLink shdn";
-+ };
-+ };
-+};
-+
-+&i2cswitch2 {
-+ reg = <0x71>;
-+ reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
-+
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+
-+ hdmi@3d {
-+ compatible = "adi,adv7511w";
-+ reg = <0x3d>;
-+ interrupt-parent = <&gpio2>;
-+ interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
-+ pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
-+
-+ adi,input-depth = <8>;
-+ adi,input-colorspace = "rgb";
-+ adi,input-clock = "1x";
-+ adi,input-style = <1>;
-+ adi,input-justification = "evenly";
-+ adi,clock-delay = <1200>;
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ reg = <0>;
-+ adv7513_in: endpoint {
-+ remote-endpoint = <&du_out_rgb>;
-+ };
-+ };
-+
-+ port@1 {
-+ reg = <1>;
-+ adv7513_out: endpoint {
-+ remote-endpoint = <&hdmi_con>;
-+ };
-+ };
-+ };
-+ };
-+ };
-+};
-+
-+&i2c4 {
-+ /delete-node/pca9535@21;
-+
-+ gpio_ext_76: pca9539@76 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x76>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio7>;
-+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+ port_b_a0 {
-+ gpio-hog;
-+ gpios = <0 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-B A0";
-+ };
-+ port_b_a1 {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B A1";
-+ };
-+ port_a_a0 {
-+ gpio-hog;
-+ gpios = <2 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-A A0";
-+ };
-+ port_a_a1 {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A A1";
-+ };
-+ cmos_pwdn {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "CMOS PWDN";
-+ };
-+ cmos_rst {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "CMOS RST";
-+ };
-+ /* pin 12 - CAM_CLK */
-+ rpi_cam_io_1 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "RaspB_IO1";
-+ };
-+ /* pin 11 - CAM_GPIO - assume pwdn */
-+ rpi_cam_io_0 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "RaspB_IO0";
-+ };
-+ sam_rst {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "SAM RST";
-+ };
-+ sam_pwr {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "SAM PWR";
-+ };
-+ /* 0 - FPDLink output, 1 - LVDS output */
-+ lvds_vs_fpdl {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "LVDS switch";
-+ };
-+ };
-+
-+ gpio_ext_77: pca9539@77 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x77>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio5>;
-+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
-+
-+ mpcie_wake {
-+ gpio-hog;
-+ gpios = <0 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "mPCIe WAKE#";
-+ };
-+ mpcie_wdisable {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "mPCIe W_DISABLE";
-+ };
-+ mpcie_clreq {
-+ gpio-hog;
-+ gpios = <2 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe CLKREQ#";
-+ };
-+ mpcie_ovc {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe OVC";
-+ };
-+ };
-+};
-+
-+&i2cswitch4 {
-+ reg = <0x71>;
-+ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
-+};
-+
-+&wlcore {
-+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+};
-+
-+&pciec1 {
-+ pcie3v3-supply = <&mpcie_3v3>;
-+ pcie1v8-supply = <&mpcie_1v8>;
-+};
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
new file mode 100644
-index 0000000..71e8881
+index 0000000..5b61059
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
-@@ -0,0 +1,1712 @@
+@@ -0,0 +1,1906 @@
+/*
+ * Device Tree Source for the H3ULCB Kingfisher board on r8a7795
+ *
@@ -6229,7 +11581,9 @@ index 0000000..71e8881
+ model = "Renesas H3ULCB Kingfisher board based on r8a7795";
+
+ aliases {
-+ serial1 = &hscif4;
++ serial1 = &hscif0;
++ serial2 = &hscif1;
++ serial3 = &scif1;
+ };
+
+ snd_clk: snd_clk {
@@ -6246,7 +11600,7 @@ index 0000000..71e8881
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
-+ gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
++ gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
@@ -6275,7 +11629,7 @@ index 0000000..71e8881
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
-+ gpio = <&gpio_ext_20 15 0>;
++ gpio = <&gpio_ext_74 15 0>;
+
+ /* delay - CHECK */
+ startup-delay-us = <70000>;
@@ -6288,55 +11642,54 @@ index 0000000..71e8881
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
-+ gpio = <&gpio_ext_20 0 0>;
++ gpio = <&gpio_ext_74 0 0>;
+
+ startup-delay-us = <0>;
+ enable-active-high;
+ };
+
-+ lvds_switch: regulator@8 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "lvds_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio1 24 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
+ sdio_switch: regulator@9 {
+ compatible = "regulator-fixed";
+ regulator-name = "wifi_on";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_20 5 0>;
++ gpio = <&gpio_ext_74 5 0>;
+ enable-active-low;
+ regulator-always-on;
+ };
+
-+ sound_switch: regulator@10 {
++ radio_switch: regulator@11 {
+ compatible = "regulator-fixed";
-+ regulator-name = "pcm3168a_on";
++ regulator-name = "radio_on";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_21 5 0>;
-+ enable-active-low;
++ gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
+ regulator-always-on;
+ };
+
-+ radio_switch: regulator@11 {
++ mpcie_3v3: regulator@12 {
+ compatible = "regulator-fixed";
-+ regulator-name = "radio_on";
++ regulator-name = "mPCIe 3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
++ gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ mpcie_1v8: regulator@13 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>;
++ startup-delay-us = <200000>;
+ enable-active-high;
-+ regulator-always-on;
+ };
+
+ kim {
+ compatible = "kim";
-+ nshutdown_gpio = <343>; /* pca9535@i2c2.0x20 pin 3 */
++ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
+ /* serial1 */
+ dev_name = "/dev/ttySC1";
+ flow_cntrl = <1>;
@@ -6461,6 +11814,17 @@ index 0000000..71e8881
+ };
+ };
+
++ hdmi-out {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con: endpoint {
++ remote-endpoint = <&adv7513_out>;
++ };
++ };
++ };
++
+ radio: si468x@0 {
+ compatible = "si,si468x-pcm";
+ status = "okay";
@@ -6470,9 +11834,24 @@ index 0000000..71e8881
+};
+
+&pfc {
-+ hscif4_pins: hscif4 {
-+ groups = "hscif4_data_a", "hscif4_ctrl";
-+ function = "hscif4";
++ scif1_pins: scif1 {
++ groups = "scif1_data_b";
++ function = "scif1";
++ };
++
++ hscif0_pins: hscif0 {
++ groups = "hscif0_data", "hscif0_ctrl";
++ function = "hscif0";
++ };
++
++ hscif1_pins: hscif1 {
++ groups = "hscif1_data_a", "hscif1_ctrl_a";
++ function = "hscif1";
++ };
++
++ du_pins: du {
++ groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++ function = "du";
+ };
+
+ sdhi3_pins_3v3: sd3_3v3 {
@@ -6488,12 +11867,12 @@ index 0000000..71e8881
+ };
+
+ sound_0_pins: sound0 {
-+ groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++ groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
+ function = "ssi";
+ };
+
+ sound_1_pins: sound1 {
-+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data_a";
+ function = "ssi";
+ };
+
@@ -6502,6 +11881,11 @@ index 0000000..71e8881
+ function = "ssi";
+ };
+
++ sound_3_pins: sound3 {
++ groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++ function = "ssi";
++ };
++
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
@@ -6528,77 +11912,60 @@ index 0000000..71e8881
+ };
+};
+
-+&gpio0 {
-+ video_a_irq {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A irq";
-+ };
-+
-+ video_b_irq {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B irq";
-+ };
++&du {
++ pinctrl-0 = <&du_pins>;
++ pinctrl-names = "default";
+
-+ gpioext_2_20_irq {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x20@i2c2 irq";
++ ports {
++ port@0 {
++ endpoint {
++ remote-endpoint = <&adv7513_in>;
++ };
++ };
++ port@3 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
++ };
++ };
+ };
+};
+
-+&gpio1 {
-+ gpioext_2_21_irq {
++&gpio2 {
++ bl_pwm {
+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x21@i2c2 irq";
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "BL PWM 100%";
+ };
++};
+
-+ wifi_irq {
++&gpio6 {
++ audio_sw {
+ gpio-hog;
-+ gpios = <25 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "wifi irq";
++ gpios = <21 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Onboard MCh Audio";
+ };
+};
+
-+&gpio5 {
-+ touch_irq {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "touch irq";
-+ };
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
+
-+ /* From TI forum */
-+ /* BT_AUD_OUT should be pulled low when WL_EN is activated. */
-+ /* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
-+ bt_strap {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "BT strap pin";
-+ };
++ status = "okay";
+};
+
-+&gpio7 {
-+ gpioext_2_21_irq {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x21@i2c4 irq";
-+ };
++&hscif0 {
++ pinctrl-0 = <&hscif0_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
+};
+
-+&hscif4 {
-+ pinctrl-0 = <&hscif4_pins>;
++&hscif1 {
++ pinctrl-0 = <&hscif1_pins>;
+ pinctrl-names = "default";
-+ uart-has-rtscts;
+
+ status = "okay";
+};
@@ -6606,32 +11973,82 @@ index 0000000..71e8881
+&i2c2 {
+ clock-frequency = <100000>;
+
-+ gpio_ext_20: pca9535@20 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x20>;
++ gpio_ext_74: pca9539@74 {
++ compatible = "nxp,pca9539";
++ reg = <0x74>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
-+ interrupt-parent = <&gpio0>;
-+ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ interrupt-parent = <&gpio6>;
++ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++ hub_pwen {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB pwen";
++ };
++ hub_rst {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB rst";
++ };
++ otg_offvbus {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "OTG off VBUSn";
++ };
++ otg_extlpn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "OTG EXTLPn";
++ };
++ otg_stat1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat1";
++ };
++ otg_stat2 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat2";
++ };
+ };
+
-+ gpio_ext_21: pca9535@21 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x21>;
++ gpio_ext_75: pca9539@75 {
++ compatible = "nxp,pca9539";
++ reg = <0x75>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
-+ interrupt-parent = <&gpio1>;
-+ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ interrupt-parent = <&gpio6>;
++ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++ gps_rst {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "GPS rst";
++ };
++ fpdl_shdn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "FPDLink shdn";
++ };
+ };
+
+ i2cswitch2: pca9548@74 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++ reg = <0x71>;
++ reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+
+ i2c@0 {
+ #address-cells = <1>;
@@ -6665,7 +12082,40 @@ index 0000000..71e8881
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
-+ /* A2B node(s) */
++
++ hdmi@3d {
++ compatible = "adi,adv7511w";
++ reg = <0x3d>;
++ interrupt-parent = <&gpio2>;
++ interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++ pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++ adi,clock-delay = <1200>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7513_in: endpoint {
++ remote-endpoint = <&du_out_rgb>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ adv7513_out: endpoint {
++ remote-endpoint = <&hdmi_con>;
++ };
++ };
++ };
++ };
+ };
+
+ i2c@5 {
@@ -6711,7 +12161,7 @@ index 0000000..71e8881
+ };
+
+ lsm9ds0_acc_mag@1d {
-+ compatible = "st,lsm9ds0_acc_magn";
++ compatible = "st,lsm9ds0_accel_magn";
+ reg = <0x1d>;
+ };
+
@@ -6726,15 +12176,39 @@ index 0000000..71e8881
+};
+
+&i2c4 {
-+ gpio_ext_22: pca9535@21 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x22>;
++ gpio_ext_76: pca9539@76 {
++ compatible = "nxp,pca9539";
++ reg = <0x76>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio7>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+
++ port_b_a0 {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B A0";
++ };
++ port_b_a1 {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B A1";
++ };
++ port_a_a0 {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A A0";
++ };
++ port_a_a1 {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A A1";
++ };
+ cmos_pwdn {
+ gpio-hog;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
@@ -6761,14 +12235,68 @@ index 0000000..71e8881
+ output-high;
+ line-name = "RaspB_IO0";
+ };
++ sam_rst {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "SAM RST";
++ };
++ sam_pwr {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "SAM PWR";
++ };
++ /* 0 - FPDLink output, 1 - LVDS output */
++ lvds_vs_fpdl {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LVDS switch";
++ };
++ };
++
++ gpio_ext_77: pca9539@77 {
++ compatible = "nxp,pca9539";
++ reg = <0x77>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio5>;
++ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++ mpcie_wake {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "mPCIe WAKE#";
++ };
++ mpcie_wdisable {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "mPCIe W_DISABLE";
++ };
++ mpcie_clreq {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe CLKREQ#";
++ };
++ mpcie_ovc {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe OVC";
++ };
+ };
+
+ i2cswitch4: pca9548@74 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
++ reg = <0x71>;
++ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
+
+ i2c@0 {
+ #address-cells = <1>;
@@ -7195,6 +12723,13 @@ index 0000000..71e8881
+ };
+ };
+
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ /* MOST node(s) */
++ };
++
+ i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -7813,15 +13348,16 @@ index 0000000..71e8881
+};
+
+&rcar_sound {
-+ pinctrl-0 = <&sound_clk_pins>;
++ pinctrl-0 = <&sound_clk_pins &sound_3_pins>;
++ pinctrl-names = "default";
+
+ /* Multi DAI */
+ #sound-dai-cells = <1>;
+
+ rcar_sound,dai {
+ dai0 {
-+ playback = <&ssi7>;
-+ capture = <&ssi8>;
++ playback = <&ssi3>;
++ capture = <&ssi4>;
+ };
+
+ dai1 {
@@ -7832,6 +13368,11 @@ index 0000000..71e8881
+ dai2 {
+ capture = <&ssi6>;
+ };
++
++ dai3 {
++ playback = <&ssi7>;
++ capture = <&ssi8>;
++ };
+ };
+};
+
@@ -7857,7 +13398,7 @@ index 0000000..71e8881
+ compatible = "ti,wl1837";
+ reg = <2>;
+ interrupt-parent = <&gpio1>;
-+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
@@ -7914,19 +13455,24 @@ index 0000000..71e8881
+ };
+};
+
-+&ssi8 {
++&ssi4 {
+ shared-pin;
+};
+
-+/* uncomment to enable CN48 on VIN4 */
-+//#include "ulcb-kf-rpi.dtsi"
++&pciec1 {
++ pcie3v3-supply = <&mpcie_3v3>;
++ pcie1v8-supply = <&mpcie_1v8>;
++};
++
+/* uncomment to enable CN47: SD on SDHI3 */
+//#include "ulcb-kf-sd3.dtsi"
-+/* uncomment to override CN29 (CMOS camera) on VIN5 */
++/* CN48 (Raspberry Pi) on VIN4 */
++//#include "ulcb-kf-rpi.dtsi"
++/* CN29: (CMOS camera) on VIN5 */
+//#include "ulcb-kf-cmos.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
new file mode 100644
-index 0000000..480f7d9
+index 0000000..98b6a08
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-vb.dts
@@ -0,0 +1,1787 @@
@@ -10827,487 +16373,12 @@ index 0000000..fb12a39f3
+ pinctrl-names = "default";
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
-new file mode 100644
-index 0000000..9264680
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf-v1.dts
-@@ -0,0 +1,469 @@
-+/*
-+ * Device Tree Source for the M3ULCB Kingfisher V1 board
-+ *
-+ * Copyright (C) 2017 Renesas Electronics Corp.
-+ * Copyright (C) 2017 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include "r8a7796-m3ulcb-kf.dts"
-+
-+/ {
-+ model = "Renesas M3ULCB Kingfisher V1 board based on r8a7796";
-+
-+ aliases {
-+ serial1 = &hscif0;
-+ serial2 = &hscif1;
-+ serial3 = &scif1;
-+ };
-+
-+ wlan_en: regulator@4 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "wlan-en-regulator";
-+
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+
-+ gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ };
-+
-+ codec_en_reg: regulator@6 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "codec-en-regulator";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+
-+ gpio = <&gpio_ext_74 15 0>;
-+
-+ /* delay - CHECK */
-+ startup-delay-us = <70000>;
-+ enable-active-high;
-+ };
-+
-+ amp_en_reg: regulator@7 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "amp-en-regulator";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+
-+ gpio = <&gpio_ext_74 0 0>;
-+
-+ startup-delay-us = <0>;
-+ enable-active-high;
-+ };
-+
-+ /delete-node/regulator@8;
-+
-+ sdio_switch: regulator@9 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "wifi_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_74 5 0>;
-+ enable-active-low;
-+ regulator-always-on;
-+ };
-+
-+ /delete-node/regulator@10;
-+
-+ radio_switch: regulator@11 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "radio_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
-+ mpcie_3v3: regulator@12 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "mPCIe 3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ };
-+
-+ mpcie_1v8: regulator@13 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "mPCIe 1v8";
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>;
-+ startup-delay-us = <200000>;
-+ enable-active-high;
-+ };
-+
-+ kim {
-+ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
-+ };
-+
-+ hdmi-out {
-+ compatible = "hdmi-connector";
-+ type = "a";
-+
-+ port {
-+ hdmi_con: endpoint {
-+ remote-endpoint = <&adv7513_out>;
-+ };
-+ };
-+ };
-+};
-+
-+&pfc {
-+ /delete-node/hscif4;
-+
-+ scif1_pins: scif1 {
-+ groups = "scif1_data_b";
-+ function = "scif1";
-+ };
-+
-+ hscif0_pins: hscif0 {
-+ groups = "hscif0_data", "hscif0_ctrl";
-+ function = "hscif0";
-+ };
-+
-+ hscif1_pins: hscif1 {
-+ groups = "hscif1_data_a", "hscif1_ctrl_a";
-+ function = "hscif1";
-+ };
-+
-+ du_pins: du {
-+ groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
-+ function = "du";
-+ };
-+};
-+
-+&du {
-+ pinctrl-0 = <&du_pins>;
-+ pinctrl-names = "default";
-+
-+ ports {
-+ port@0 {
-+ endpoint {
-+ remote-endpoint = <&adv7513_in>;
-+ };
-+ };
-+ port@1 {
-+ endpoint {
-+ remote-endpoint = <&rcar_dw_hdmi0_in>;
-+ };
-+ };
-+ };
-+};
-+
-+&gpio0 {
-+ /delete-node/video_a_irq;
-+ /delete-node/video_b_irq;
-+ /delete-node/gpioext_2_20_irq;
-+};
-+
-+&gpio1 {
-+ /delete-node/gpioext_2_21_irq;
-+ /delete-node/wifi_irq;
-+};
-+
-+&gpio2 {
-+ bl_pwm {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "BL PWM 100%";
-+ };
-+};
-+
-+&gpio5 {
-+ /delete-node/touch_irq;
-+ /delete-node/bt_strap;
-+};
-+
-+&gpio7 {
-+ /delete-node/gpioext_2_21_irq;
-+};
-+
-+&scif1 {
-+ pinctrl-0 = <&scif1_pins>;
-+ pinctrl-names = "default";
-+
-+ status = "okay";
-+};
-+
-+&hscif0 {
-+ pinctrl-0 = <&hscif0_pins>;
-+ pinctrl-names = "default";
-+ uart-has-rtscts;
-+
-+ status = "okay";
-+};
-+
-+&hscif1 {
-+ pinctrl-0 = <&hscif1_pins>;
-+ pinctrl-names = "default";
-+
-+ status = "okay";
-+};
-+
-+&hscif4 {
-+ /delete-property/pinctrl-0;
-+ /delete-property/pinctrl-names;
-+
-+ status = "disabled";
-+};
-+
-+&i2c2 {
-+ /delete-node/pca9535@20;
-+ /delete-node/pca9535@21;
-+
-+ gpio_ext_74: pca9539@74 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x74>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio6>;
-+ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
-+
-+ hub_pwen {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "HUB pwen";
-+ };
-+ hub_rst {
-+ gpio-hog;
-+ gpios = <7 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "HUB rst";
-+ };
-+ otg_offvbus {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "OTG off VBUSn";
-+ };
-+ otg_extlpn {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "OTG EXTLPn";
-+ };
-+ otg_stat1 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "OTG Stat1";
-+ };
-+ otg_stat2 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "OTG Stat2";
-+ };
-+ };
-+
-+ gpio_ext_75: pca9539@75 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x75>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio6>;
-+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
-+
-+ gps_rst {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "GPS rst";
-+ };
-+ fpdl_shdn {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "FPDLink shdn";
-+ };
-+ };
-+};
-+
-+&i2cswitch2 {
-+ reg = <0x71>;
-+ reset-gpios= <&gpio5 3 GPIO_ACTIVE_LOW>;
-+
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+
-+ hdmi@3d {
-+ compatible = "adi,adv7511w";
-+ reg = <0x3d>;
-+ interrupt-parent = <&gpio2>;
-+ interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
-+ pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
-+
-+ adi,input-depth = <8>;
-+ adi,input-colorspace = "rgb";
-+ adi,input-clock = "1x";
-+ adi,input-style = <1>;
-+ adi,input-justification = "evenly";
-+ adi,clock-delay = <1200>;
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ reg = <0>;
-+ adv7513_in: endpoint {
-+ remote-endpoint = <&du_out_rgb>;
-+ };
-+ };
-+
-+ port@1 {
-+ reg = <1>;
-+ adv7513_out: endpoint {
-+ remote-endpoint = <&hdmi_con>;
-+ };
-+ };
-+ };
-+ };
-+ };
-+};
-+
-+&i2c4 {
-+ /delete-node/pca9535@21;
-+
-+ gpio_ext_76: pca9539@76 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x76>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio7>;
-+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+
-+ port_b_a0 {
-+ gpio-hog;
-+ gpios = <0 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-B A0";
-+ };
-+ port_b_a1 {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-B A1";
-+ };
-+ port_a_a0 {
-+ gpio-hog;
-+ gpios = <2 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "Video-A A0";
-+ };
-+ port_a_a1 {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "Video-A A1";
-+ };
-+ cmos_pwdn {
-+ gpio-hog;
-+ gpios = <8 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "CMOS PWDN";
-+ };
-+ cmos_rst {
-+ gpio-hog;
-+ gpios = <9 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "CMOS RST";
-+ };
-+ /* pin 12 - CAM_CLK */
-+ rpi_cam_io_1 {
-+ gpio-hog;
-+ gpios = <10 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "RaspB_IO1";
-+ };
-+ /* pin 11 - CAM_GPIO - assume pwdn */
-+ rpi_cam_io_0 {
-+ gpio-hog;
-+ gpios = <11 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "RaspB_IO0";
-+ };
-+ sam_rst {
-+ gpio-hog;
-+ gpios = <4 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "SAM RST";
-+ };
-+ sam_pwr {
-+ gpio-hog;
-+ gpios = <5 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "SAM PWR";
-+ };
-+ /* 0 - FPDLink output, 1 - LVDS output */
-+ lvds_vs_fpdl {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "LVDS switch";
-+ };
-+ };
-+
-+ gpio_ext_77: pca9539@77 {
-+ compatible = "nxp,pca9539";
-+ reg = <0x77>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ interrupt-parent = <&gpio5>;
-+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
-+
-+ mpcie_wake {
-+ gpio-hog;
-+ gpios = <0 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "mPCIe WAKE#";
-+ };
-+ mpcie_wdisable {
-+ gpio-hog;
-+ gpios = <1 GPIO_ACTIVE_HIGH>;
-+ output-high;
-+ line-name = "mPCIe W_DISABLE";
-+ };
-+ mpcie_clreq {
-+ gpio-hog;
-+ gpios = <2 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe CLKREQ#";
-+ };
-+ mpcie_ovc {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "mPCIe OVC";
-+ };
-+ };
-+};
-+
-+&i2cswitch4 {
-+ reg = <0x71>;
-+ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
-+};
-+
-+&wlcore {
-+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
-+};
-+
-+&pciec1 {
-+ pcie3v3-supply = <&mpcie_3v3>;
-+ pcie1v8-supply = <&mpcie_1v8>;
-+};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
new file mode 100644
-index 0000000..5a6c38b
+index 0000000..a037f16
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
-@@ -0,0 +1,1284 @@
+@@ -0,0 +1,1400 @@
+/*
+ * Device Tree Source for the M3ULCB Kingfisher board on r8a7796
+ *
@@ -11325,7 +16396,9 @@ index 0000000..5a6c38b
+ model = "Renesas M3ULCB Kingfisher board based on r8a7796";
+
+ aliases {
-+ serial1 = &hscif4;
++ serial1 = &hscif0;
++ serial2 = &hscif1;
++ serial3 = &scif1;
+ };
+
+ snd_clk: snd_clk {
@@ -11342,7 +16415,7 @@ index 0000000..5a6c38b
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
-+ gpio = <&gpio_ext_20 4 GPIO_ACTIVE_HIGH>;
++ gpio = <&gpio_ext_74 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
@@ -11371,7 +16444,7 @@ index 0000000..5a6c38b
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
-+ gpio = <&gpio_ext_20 15 0>;
++ gpio = <&gpio_ext_74 15 0>;
+
+ /* delay - CHECK */
+ startup-delay-us = <70000>;
@@ -11384,55 +16457,54 @@ index 0000000..5a6c38b
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
-+ gpio = <&gpio_ext_20 0 0>;
++ gpio = <&gpio_ext_74 0 0>;
+
+ startup-delay-us = <0>;
+ enable-active-high;
+ };
+
-+ lvds_switch: regulator@8 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "lvds_on";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio1 24 0>;
-+ enable-active-high;
-+ regulator-always-on;
-+ };
-+
+ sdio_switch: regulator@9 {
+ compatible = "regulator-fixed";
+ regulator-name = "wifi_on";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_20 5 0>;
++ gpio = <&gpio_ext_74 5 0>;
+ enable-active-low;
+ regulator-always-on;
+ };
+
-+ sound_switch: regulator@10 {
++ radio_switch: regulator@11 {
+ compatible = "regulator-fixed";
-+ regulator-name = "pcm3168a_on";
++ regulator-name = "radio_on";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_21 5 0>;
-+ enable-active-low;
++ gpio = <&gpio_ext_74 13 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
+ regulator-always-on;
+ };
+
-+ radio_switch: regulator@11 {
++ mpcie_3v3: regulator@12 {
+ compatible = "regulator-fixed";
-+ regulator-name = "radio_on";
++ regulator-name = "mPCIe 3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio_ext_20 13 GPIO_ACTIVE_HIGH>;
++ gpio = <&gpio_ext_77 14 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ mpcie_1v8: regulator@13 {
++ compatible = "regulator-fixed";
++ regulator-name = "mPCIe 1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ gpio = <&gpio_ext_77 15 GPIO_ACTIVE_HIGH>;
++ startup-delay-us = <200000>;
+ enable-active-high;
-+ regulator-always-on;
+ };
+
+ kim {
+ compatible = "kim";
-+ nshutdown_gpio = <343>; /* pca9535@i2c2.0x20 pin 3 */
++ nshutdown_gpio = <343>; /* gpio_ext_74 pin 3 */
+ /* serial1 */
+ dev_name = "/dev/ttySC1";
+ flow_cntrl = <1>;
@@ -11557,6 +16629,17 @@ index 0000000..5a6c38b
+ };
+ };
+
++ hdmi-out {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con: endpoint {
++ remote-endpoint = <&adv7513_out>;
++ };
++ };
++ };
++
+ radio: si468x@0 {
+ compatible = "si,si468x-pcm";
+ status = "okay";
@@ -11566,9 +16649,24 @@ index 0000000..5a6c38b
+};
+
+&pfc {
-+ hscif4_pins: hscif4 {
-+ groups = "hscif4_data_a", "hscif4_ctrl";
-+ function = "hscif4";
++ scif1_pins: scif1 {
++ groups = "scif1_data_b";
++ function = "scif1";
++ };
++
++ hscif0_pins: hscif0 {
++ groups = "hscif0_data", "hscif0_ctrl";
++ function = "hscif0";
++ };
++
++ hscif1_pins: hscif1 {
++ groups = "hscif1_data_a", "hscif1_ctrl_a";
++ function = "hscif1";
++ };
++
++ du_pins: du {
++ groups = "du_rgb888", "du_sync", "du_clk_out_0", "du_disp";
++ function = "du";
+ };
+
+ sdhi3_pins_3v3: sd3_3v3 {
@@ -11584,12 +16682,12 @@ index 0000000..5a6c38b
+ };
+
+ sound_0_pins: sound0 {
-+ groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++ groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
+ function = "ssi";
+ };
+
+ sound_1_pins: sound1 {
-+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
++ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data_a";
+ function = "ssi";
+ };
+
@@ -11598,6 +16696,11 @@ index 0000000..5a6c38b
+ function = "ssi";
+ };
+
++ sound_3_pins: sound3 {
++ groups = "ssi78_ctrl", "ssi7_data", "ssi8_data";
++ function = "ssi";
++ };
++
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
@@ -11624,77 +16727,60 @@ index 0000000..5a6c38b
+ };
+};
+
-+&gpio0 {
-+ video_a_irq {
-+ gpio-hog;
-+ gpios = <13 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-A irq";
-+ };
-+
-+ video_b_irq {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "Video-B irq";
-+ };
++&du {
++ pinctrl-0 = <&du_pins>;
++ pinctrl-names = "default";
+
-+ gpioext_2_20_irq {
-+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x20@i2c2 irq";
++ ports {
++ port@0 {
++ endpoint {
++ remote-endpoint = <&adv7513_in>;
++ };
++ };
++ port@2 {
++ endpoint {
++ remote-endpoint = <&lvds_enc_in>;
++ };
++ };
+ };
+};
+
-+&gpio1 {
-+ gpioext_2_21_irq {
++&gpio2 {
++ bl_pwm {
+ gpio-hog;
-+ gpios = <15 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x21@i2c2 irq";
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "BL PWM 100%";
+ };
++};
+
-+ wifi_irq {
++&gpio6 {
++ audio_sw {
+ gpio-hog;
-+ gpios = <25 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "wifi irq";
++ gpios = <21 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Onboard MCh Audio";
+ };
+};
+
-+&gpio5 {
-+ touch_irq {
-+ gpio-hog;
-+ gpios = <6 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "touch irq";
-+ };
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
+
-+ /* From TI forum */
-+ /* BT_AUD_OUT should be pulled low when WL_EN is activated. */
-+ /* in case it isn't, wilink8 ends up in one of the test modes that introduces various issues */
-+ bt_strap {
-+ gpio-hog;
-+ gpios = <14 GPIO_ACTIVE_HIGH>;
-+ output-low;
-+ line-name = "BT strap pin";
-+ };
++ status = "okay";
+};
+
-+&gpio7 {
-+ gpioext_2_21_irq {
-+ gpio-hog;
-+ gpios = <3 GPIO_ACTIVE_HIGH>;
-+ input;
-+ line-name = "0x21@i2c4 irq";
-+ };
++&hscif0 {
++ pinctrl-0 = <&hscif0_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
+};
+
-+&hscif4 {
-+ pinctrl-0 = <&hscif4_pins>;
++&hscif1 {
++ pinctrl-0 = <&hscif1_pins>;
+ pinctrl-names = "default";
-+ uart-has-rtscts;
+
+ status = "okay";
+};
@@ -11702,32 +16788,82 @@ index 0000000..5a6c38b
+&i2c2 {
+ clock-frequency = <100000>;
+
-+ gpio_ext_20: pca9535@20 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x20>;
++ gpio_ext_74: pca9539@74 {
++ compatible = "nxp,pca9539";
++ reg = <0x74>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
-+ interrupt-parent = <&gpio0>;
-+ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ interrupt-parent = <&gpio6>;
++ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++ hub_pwen {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB pwen";
++ };
++ hub_rst {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB rst";
++ };
++ otg_offvbus {
++ gpio-hog;
++ gpios = <8 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "OTG off VBUSn";
++ };
++ otg_extlpn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "OTG EXTLPn";
++ };
++ otg_stat1 {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat1";
++ };
++ otg_stat2 {
++ gpio-hog;
++ gpios = <11 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "OTG Stat2";
++ };
+ };
+
-+ gpio_ext_21: pca9535@21 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x21>;
++ gpio_ext_75: pca9539@75 {
++ compatible = "nxp,pca9539";
++ reg = <0x75>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
-+ interrupt-parent = <&gpio1>;
-+ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
++ interrupt-parent = <&gpio6>;
++ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++
++ gps_rst {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "GPS rst";
++ };
++ fpdl_shdn {
++ gpio-hog;
++ gpios = <9 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "FPDLink shdn";
++ };
+ };
+
+ i2cswitch2: pca9548@74 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios = <&gpio6 5 GPIO_ACTIVE_LOW>;
++ reg = <0x71>;
++ reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+
+ i2c@0 {
+ #address-cells = <1>;
@@ -11761,7 +16897,40 @@ index 0000000..5a6c38b
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
-+ /* A2B node(s) */
++
++ hdmi@3d {
++ compatible = "adi,adv7511w";
++ reg = <0x3d>;
++ interrupt-parent = <&gpio2>;
++ interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
++ pd-gpios = <&gpio_ext_75 5 GPIO_ACTIVE_LOW>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++ adi,clock-delay = <1200>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7513_in: endpoint {
++ remote-endpoint = <&du_out_rgb>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ adv7513_out: endpoint {
++ remote-endpoint = <&hdmi_con>;
++ };
++ };
++ };
++ };
+ };
+
+ i2c@5 {
@@ -11807,7 +16976,7 @@ index 0000000..5a6c38b
+ };
+
+ lsm9ds0_acc_mag@1d {
-+ compatible = "st,lsm9ds0_acc_magn";
++ compatible = "st,lsm9ds0_accel_magn";
+ reg = <0x1d>;
+ };
+
@@ -11822,15 +16991,39 @@ index 0000000..5a6c38b
+};
+
+&i2c4 {
-+ gpio_ext_22: pca9535@21 {
-+ compatible = "nxp,pca9535";
-+ reg = <0x22>;
++ gpio_ext_76: pca9539@76 {
++ compatible = "nxp,pca9539";
++ reg = <0x76>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio7>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+
++ port_b_a0 {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-B A0";
++ };
++ port_b_a1 {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-B A1";
++ };
++ port_a_a0 {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "Video-A A0";
++ };
++ port_a_a1 {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "Video-A A1";
++ };
+ cmos_pwdn {
+ gpio-hog;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
@@ -11857,14 +17050,68 @@ index 0000000..5a6c38b
+ output-high;
+ line-name = "RaspB_IO0";
+ };
++ sam_rst {
++ gpio-hog;
++ gpios = <4 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "SAM RST";
++ };
++ sam_pwr {
++ gpio-hog;
++ gpios = <5 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "SAM PWR";
++ };
++ /* 0 - FPDLink output, 1 - LVDS output */
++ lvds_vs_fpdl {
++ gpio-hog;
++ gpios = <14 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LVDS switch";
++ };
++ };
++
++ gpio_ext_77: pca9539@77 {
++ compatible = "nxp,pca9539";
++ reg = <0x77>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio5>;
++ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++
++ mpcie_wake {
++ gpio-hog;
++ gpios = <0 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "mPCIe WAKE#";
++ };
++ mpcie_wdisable {
++ gpio-hog;
++ gpios = <1 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "mPCIe W_DISABLE";
++ };
++ mpcie_clreq {
++ gpio-hog;
++ gpios = <2 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe CLKREQ#";
++ };
++ mpcie_ovc {
++ gpio-hog;
++ gpios = <3 GPIO_ACTIVE_HIGH>;
++ input;
++ line-name = "mPCIe OVC";
++ };
+ };
+
+ i2cswitch4: pca9548@74 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
-+ reg = <0x74>;
-+ reset-gpios= <&gpio6 21 GPIO_ACTIVE_LOW>;
++ reg = <0x71>;
++ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
+
+ i2c@0 {
+ #address-cells = <1>;
@@ -12089,32 +17336,6 @@ index 0000000..5a6c38b
+ /* MOST node(s) */
+ };
+
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+
-+ rpi_camera: ov5647@36 {
-+ compatible = "ovti,ov5647";
-+ reg = <0x36>;
-+
-+ port@0 {
-+ rpi_camera_in: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2>;
-+ remote-endpoint = <&vin4ep0>;
-+ };
-+ };
-+ };
-+ };
-+
-+ i2c@5 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <5>;
-+ /* CMOS camera node(s) */
-+ };
-+
+ i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -12397,29 +17618,6 @@ index 0000000..5a6c38b
+ };
+};
+
-+&vin4 {
-+ status = "okay";
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port@0 {
-+ vin4ep0: endpoint {
-+ csi,select = "csi20";
-+ virtual,channel = <0>;
-+ remote-endpoint = <&rpi_camera_in>;
-+ data-lanes = <1 2>;
-+ };
-+ };
-+ port@1 {
-+ csi2ep0: endpoint {
-+ remote-endpoint = <&csi2_20_ep>;
-+ };
-+ };
-+ };
-+};
-+
+&csi2_40 {
+ status = "okay";
+
@@ -12454,38 +17652,17 @@ index 0000000..5a6c38b
+ };
+};
+
-+&csi2_20 {
-+ status = "okay";
-+
-+ virtual,channel {
-+ csi2_vc0 {
-+ data,type = "raw8";
-+ receive,vc = <0>;
-+ };
-+ };
-+
-+ port {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ csi2_20_ep: endpoint {
-+ clock-lanes = <0>;
-+ data-lanes = <1 2>;
-+ csi-rate = <280>;
-+ };
-+ };
-+};
-+
+&rcar_sound {
-+ pinctrl-0 = <&sound_clk_pins>;
++ pinctrl-0 = <&sound_clk_pins &sound_3_pins>;
++ pinctrl-names = "default";
+
+ /* Multi DAI */
+ #sound-dai-cells = <1>;
+
+ rcar_sound,dai {
+ dai0 {
-+ playback = <&ssi7>;
-+ capture = <&ssi8>;
++ playback = <&ssi3>;
++ capture = <&ssi4>;
+ };
+
+ dai1 {
@@ -12496,6 +17673,11 @@ index 0000000..5a6c38b
+ dai2 {
+ capture = <&ssi6>;
+ };
++
++ dai3 {
++ playback = <&ssi7>;
++ capture = <&ssi8>;
++ };
+ };
+};
+
@@ -12521,7 +17703,7 @@ index 0000000..5a6c38b
+ compatible = "ti,wl1837";
+ reg = <2>;
+ interrupt-parent = <&gpio1>;
-+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
++ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
@@ -12582,10 +17764,15 @@ index 0000000..5a6c38b
+ };
+};
+
-+&ssi8 {
++&ssi4 {
+ shared-pin;
+};
+
++&pciec1 {
++ pcie3v3-supply = <&mpcie_3v3>;
++ pcie1v8-supply = <&mpcie_1v8>;
++};
++
+/* uncomment to enable CN47: SD on SDHI3 */
+//#include "ulcb-kf-sd3.dtsi"
+/* CN48 (Raspberry Pi) on VIN4 */
@@ -13292,10 +18479,10 @@ index 0000000..2145f5e
+};
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
new file mode 100644
-index 0000000..d3b4ece
+index 0000000..bcd9865
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf-rpi.dtsi
-@@ -0,0 +1,75 @@
+@@ -0,0 +1,77 @@
+/*
+ * Device Tree Source for the H3ULCB Kingfisher board:
+ * this adding conflicting resource on VIN4 for Raspberry Pi camera
@@ -13330,6 +18517,8 @@ index 0000000..d3b4ece
+};
+
+&vin4 {
++ status = "okay";
++
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;