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-rw-r--r--meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0064-ADV7511-limit-maximum-pixelclock.patch76
1 files changed, 76 insertions, 0 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0064-ADV7511-limit-maximum-pixelclock.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0064-ADV7511-limit-maximum-pixelclock.patch
new file mode 100644
index 0000000..3ca9284
--- /dev/null
+++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0064-ADV7511-limit-maximum-pixelclock.patch
@@ -0,0 +1,76 @@
+From 1df040dabaec1697f81b71f15739b499f3e4266e Mon Sep 17 00:00:00 2001
+From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
+Date: Fri, 9 Jun 2017 20:12:26 +0300
+Subject: [PATCH] ADV7511: limit maximum pixelclock
+
+DU0 (RGB) supports clock freq up to 100MHz only.
+Add ability to set max clock via dts.
+
+Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 3 +++
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 +++++-
+ 2 files changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+index 161c923..12ee238 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -242,6 +242,7 @@ enum adv7511_sync_polarity {
+ * @input_style: The input component arrangement variant
+ * @input_justification: Video input format bit justification
+ * @clock_delay: Clock delay for the input clock (in ps)
++ * @clock_max_rate: Clock maximum rate (in Hz)
+ * @embedded_sync: Video input uses BT.656-style embedded sync
+ * @sync_pulse: Select the sync pulse
+ * @vsync_polarity: vsync input signal configuration
+@@ -255,6 +256,7 @@ struct adv7511_link_config {
+ enum adv7511_input_justification input_justification;
+
+ int clock_delay;
++ int clock_max_rate;
+
+ bool embedded_sync;
+ enum adv7511_input_sync_pulse sync_pulse;
+@@ -307,6 +309,7 @@ struct adv7511 {
+ bool powered;
+
+ struct drm_display_mode curr_mode;
++ int clock_max_rate;
+
+ unsigned int f_tmds;
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index 41b45de..5dfa619 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -323,6 +323,7 @@ static void adv7511_set_link_config(struct adv7511 *adv7511,
+ adv7511->hsync_polarity = config->hsync_polarity;
+ adv7511->vsync_polarity = config->vsync_polarity;
+ adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
++ adv7511->clock_max_rate = config->clock_max_rate;
+ }
+
+ static void adv7511_power_on(struct adv7511 *adv7511)
+@@ -621,7 +622,7 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+ static int adv7511_mode_valid(struct adv7511 *adv7511,
+ struct drm_display_mode *mode)
+ {
+- if (mode->clock > 165000)
++ if (mode->clock > adv7511->clock_max_rate)
+ return MODE_CLOCK_HIGH;
+
+ return MODE_OK;
+@@ -917,6 +918,9 @@ static int adv7511_parse_dt(struct device_node *np,
+ if (config->clock_delay < -1200 || config->clock_delay > 1600)
+ return -EINVAL;
+
++ if (of_property_read_u32(np, "adi,clock-max-rate", &config->clock_max_rate))
++ config->clock_max_rate = 166000;
++
+ config->embedded_sync = of_property_read_bool(np, "adi,embedded-sync");
+
+ /* Hardcode the sync pulse configurations for now. */
+--
+1.9.1
+