diff options
Diffstat (limited to 'meta-rcar-gen3-adas/recipes-kernel')
17 files changed, 2338 insertions, 0 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/GPL-COPYING b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/GPL-COPYING new file mode 100644 index 0000000..d159169 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/GPL-COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. 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If this is what you want to do, use the GNU Lesser General +Public License instead of this License. diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/MIT-COPYING b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/MIT-COPYING new file mode 100644 index 0000000..28e2a15 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/MIT-COPYING @@ -0,0 +1,41 @@ + +This software is Copyright (C) 2013 Renesas Electronics Corporation + +You may use, distribute and copy this software under the terms of the MIT +license displayed below. + +----------------------------------------------------------------------------- + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + Alternatively, the contents of this file may be used under the terms of + the GNU General Public License Version 2 ("GPL") in which case the provisions + of GPL are applicable instead of those above. + + If you wish to allow use of your version of this file only under the terms of + GPL, and not to allow others to use your version of this file under the terms + of the MIT license, indicate your decision by deleting the provisions above + and replace them with the notice and other provisions required by GPL as set + out in the file called "GPL-COPYING" included in this distribution. If you do + not delete the provisions above, a recipient may use your version of this file + under the terms of either the MIT license or GPL. + +----------------------------------------------------------------------------- + + EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS + PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR + COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +----------------------------------------------------------------------------- diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/Makefile b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/Makefile new file mode 100644 index 0000000..2e26bfb --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/Makefile @@ -0,0 +1,14 @@ +obj-m := cmemdrv.o + +SRC := $(shell pwd) + +all: + $(MAKE) -C $(KERNEL_SRC) M=$(SRC) + +modules_install: + $(MAKE) -C $(KERNEL_SRC) M=$(SRC) modules_install + +clean: + rm -f *.o *~ core .depend .*.cmd *.ko *.mod.c + rm -f Module.markers Module.symvers modules.order + rm -rf .tmp_versions Modules.symvers diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/cmemdrv.c b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/cmemdrv.c new file mode 100644 index 0000000..a5d4363 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/files/cmemdrv.c @@ -0,0 +1,457 @@ +/*************************************************************************/ /* + Memory Driver (kernel module) + + Copyright (C) 2015 - 2017 Renesas Electronics Corporation + + License Dual MIT/GPLv2 + + The contents of this file are subject to the MIT license as set out below. + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + Alternatively, the contents of this file may be used under the terms of + the GNU General Public License Version 2 ("GPL") in which case the provisions + of GPL are applicable instead of those above. + + If you wish to allow use of your version of this file only under the terms of + GPL, and not to allow others to use your version of this file under the terms + of the MIT license, indicate your decision by deleting the provisions above + and replace them with the notice and other provisions required by GPL as set + out in the file called "GPL-COPYING" included in this distribution. If you do + not delete the provisions above, a recipient may use your version of this file + under the terms of either the MIT license or GPL. + + This License is also included in this distribution in the file called + "MIT-COPYING". + + EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS + PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR + COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + GPLv2: + If you wish to use this file under the terms of GPL, following terms are + effective. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; version 2 of the License. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ /*************************************************************************/ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/fs.h> +#include <asm/uaccess.h> +#include <linux/dma-mapping.h> +#include <linux/slab.h> +#include <linux/device.h> +#include <linux/of_device.h> + +#define MAX_AREA_NUM 4 +#define DEFAULT_AREA_SIZE (16 * 1024 * 1024) + +#define PARAM_SET 1 +#define M_LOCK 3 +#define M_UNLOCK 4 +#define GET_PHYS_ADDR 5 +#define M_ALLOCATE 6 +#define M_UNALLOCATE 7 +#define TRY_CONV 8 + +#define IOCTL_FROM_IMP_TO_CPU 0 +#define IOCTL_FROM_CPU_TO_IMP 1 + +struct mem_area_data { + struct device *dev; + size_t size; + void *virt_ptr; + dma_addr_t phys_addr; +}; + +struct mem_access_data { + struct mem_area_data* area; + int start_offset; + int offset; + int width; + int height; + int stride; + int locked; + int tl; +}; + +static unsigned int bsize_count; +static unsigned long bsize[MAX_AREA_NUM]; +module_param_array(bsize, ulong, &bsize_count, S_IRUGO); +static int cached = 1; +module_param(cached, int, S_IRUGO); + +#ifdef CFG_USE_FPGA +static unsigned long cfg_bsize = 0; +module_param(cfg_bsize, ulong, S_IRUGO); +#endif + +static unsigned int cmem_major = 88; // 0:auto +module_param(cmem_major, uint, S_IRUGO); + +static struct class *cmem_class = NULL; +static struct mem_area_data *cmem_areas[MAX_AREA_NUM]; + +static int cv_v_to_p(unsigned long vaddr, unsigned long *paddr) +{ + struct vm_area_struct *vma; + unsigned long start, offset; + unsigned long pfn; + int ret; + + *paddr = 0; + + vma = find_vma(current->active_mm, vaddr); + if (vma == NULL) + return -EINVAL; + + start = vaddr & PAGE_MASK; + ret = follow_pfn(vma, start, &pfn); + if (ret < 0) + return ret; + + offset = offset_in_page(vaddr); + *paddr = (pfn << PAGE_SHIFT) + offset; + + return 0; +} + +static void do_tl(u64 *src, u64 *dst, unsigned int height, unsigned int step) +{ + unsigned int i; + int j; + unsigned int yaddr; + u64 *isrc, *idst, *isrcp, *idstp; + + for (j = 0; j < height ; j += 2) { + yaddr = (j & ~0x1f) * step | ((j & 0x1f) << 7); + isrc = src + (yaddr >> 3); + idst = dst + (j * step >> 3); + for (i = 0; i < step >> 3; i += 16) { + idstp = idst + i; + isrcp = isrc + (i << 5); + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + idstp = idst + i + (step >> 3); + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + *idstp++ = *isrcp++; + + //idst[i] = isrc[((i >> 4) << 9) + (i & 0xf)]; + } + } +} + +static ssize_t dev_read(struct file *filep, char *buf, size_t len, loff_t *ppos) +{ + size_t count; + struct mem_access_data *p = filep->private_data; + + if (p->tl) { + do_tl( (u64 *)(p->area->virt_ptr + p->offset + p->start_offset), + (u64 *)buf, p->height, p->stride ); + count = len; + } else { + count = copy_to_user(buf, p->area->virt_ptr + p->offset + p->start_offset, len); + } + + return count; +} + +static ssize_t dev_write(struct file *filep, const char *buf, size_t len, loff_t *ppos) +{ + size_t count; + struct mem_access_data *p = filep->private_data; + + count = copy_from_user(p->area->virt_ptr + p->offset + p->start_offset, buf, len); + + return count; +} + +static long dev_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) +{ + struct mem_access_data *p = filep->private_data; + struct device *dev = p->area->dev; + u32 offset, size, dir; + + switch (cmd) { + case PARAM_SET : + p->width = ((unsigned int *)arg)[0]; + p->height = ((unsigned int *)arg)[1]; + p->stride = ((unsigned int *)arg)[2]; + p->tl = ((unsigned int *)arg)[3]; + p->offset = ((unsigned int *)arg)[4]; + break; + case M_ALLOCATE : + break; + case M_LOCK : + if (cached) { + offset = ((unsigned int *)arg)[0]; + size = ((unsigned int *)arg)[1]; + dir = ((unsigned int *)arg)[2]; + if (dir == IOCTL_FROM_IMP_TO_CPU) + dma_sync_single_for_device(dev, p->area->phys_addr + p->start_offset + offset, size, DMA_FROM_DEVICE); + else + dma_sync_single_for_device(dev, p->area->phys_addr + p->start_offset + offset, size, DMA_TO_DEVICE); + } + break; + case M_UNLOCK : + if (cached) { + offset = ((unsigned int *)arg)[0]; + size = ((unsigned int *)arg)[1]; + dir = ((unsigned int *)arg)[2]; + if (dir == IOCTL_FROM_IMP_TO_CPU) + dma_sync_single_for_cpu(dev, p->area->phys_addr + p->start_offset + offset, size, DMA_FROM_DEVICE); + else + dma_sync_single_for_cpu(dev, p->area->phys_addr + p->start_offset + offset, size, DMA_TO_DEVICE); + } + break; + case M_UNALLOCATE : + break; + case GET_PHYS_ADDR : + *((unsigned int *)arg) = p->area->phys_addr; + break; + case TRY_CONV : + cv_v_to_p( ( (unsigned long *)arg )[0], (unsigned long *)arg + 1); + break; + default: + dev_warn(dev, "## unknown ioctl command %d\n", cmd); + return -EINVAL; + } + + return 0; +} + +static int dev_mmap(struct file *filep, struct vm_area_struct *vma) +{ + struct mem_access_data *p = filep->private_data; + unsigned long off; + unsigned long start; + + if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) + return -EINVAL; + + off = vma->vm_pgoff << PAGE_SHIFT; + start = p->area->phys_addr; + + if ((vma->vm_end - vma->vm_start + off) > p->area->size) + return -EINVAL; + + off += start; + vma->vm_pgoff = off >> PAGE_SHIFT; + vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; + if (!cached) + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + return remap_pfn_range( vma, + vma->vm_start, + vma->vm_pgoff, + vma->vm_end - vma->vm_start, + vma->vm_page_prot ) ; +} + +static int dev_open(struct inode *inode, struct file *filep) +{ + struct mem_access_data *mem_access_p; + int minor = iminor(inode); + struct mem_area_data* area = cmem_areas[minor]; + + mem_access_p = kzalloc(sizeof(*mem_access_p), GFP_KERNEL); + if (!mem_access_p) + return -ENOMEM; + + dev_dbg(area->dev, "Device Open\n"); + mem_access_p->area = area; + filep->private_data = mem_access_p; + + return 0; +} + +static int dev_rls(struct inode *inode, struct file *filep) +{ + struct mem_access_data *mem_access_p = filep->private_data; + kfree(mem_access_p); + return 0; +} + +static struct file_operations fops = { + .owner = THIS_MODULE, + .read = dev_read, + .write = dev_write, + .unlocked_ioctl = dev_ioctl, + .compat_ioctl = dev_ioctl, + .mmap = dev_mmap, + .open = dev_open, + .release = dev_rls, +}; + +static int cmemdrv_create_device(dev_t devt, size_t size) +{ + int ret; + struct mem_area_data *area; + struct device *dev; + void *virt_b_ptr; + dma_addr_t phy_b_addr; + + dev = device_create(cmem_class, NULL, devt, NULL, "cmem%d", MINOR(devt)); + if (IS_ERR(dev)) { + pr_err("cmem: unable to create device cmem%d\n", MINOR(devt)); + return PTR_ERR(dev); + } + + area = devm_kzalloc(dev, sizeof(*area), GFP_KERNEL); + if (!area) { + ret = -ENOMEM; + goto err; + } + area->dev = dev; + +#ifdef CONFIG_ARM64 + { + struct device_node *np; + np = of_find_compatible_node(NULL, NULL, "shared-dma-pool"); + of_dma_configure(dev, np); + } +#endif + + virt_b_ptr = dmam_alloc_coherent(dev, size + PAGE_SIZE, &phy_b_addr, GFP_KERNEL); + if (!virt_b_ptr) { + dev_err(dev, "Memory allocation failed.. (size:0x%zx)\n", size); + ret = -ENOMEM; + goto err; + } + + area->virt_ptr = PTR_ALIGN(virt_b_ptr, PAGE_SIZE); + area->phys_addr = phy_b_addr + (area->virt_ptr - virt_b_ptr); + area->size = size; + cmem_areas[MINOR(devt)] = area; + dev_notice(dev, "Memory allocated.. 0x%08lx (size:0x%zx)\n", (unsigned long)area->phys_addr, size); + + return 0; + +err: + device_destroy(cmem_class, devt); + return ret; +} + +static int __init cmemdrv_init(void) +{ + int i = 0; + int ret; + + if (bsize_count == 0) + bsize[bsize_count++] = DEFAULT_AREA_SIZE; /* add default area */ + +#ifdef CFG_USE_FPGA + if (cfg_bsize && bsize_count < MAX_AREA_NUM) + bsize[bsize_count++] = cfg_bsize; /* for compatibility */ +#endif + + ret = register_chrdev(cmem_major, "CMem", &fops); + if (ret < 0) { + pr_err("cmem: unable to get major %d\n", cmem_major); + return ret; + } + if (cmem_major == 0) + cmem_major = ret; + + cmem_class = class_create(THIS_MODULE, "cmem"); + if (IS_ERR(cmem_class)) { + pr_err("cmem: unable to create class\n"); + ret = PTR_ERR(cmem_class); + goto err1; + } + + for (i = 0; i < bsize_count; i++) { + ret = cmemdrv_create_device(MKDEV(cmem_major, i), bsize[i]); + if (ret < 0) + goto err2; + } + + return 0; + +err2: + for (i--; i >= 0; i--) + device_destroy(cmem_class, MKDEV(cmem_major, i)); + + class_destroy(cmem_class); +err1: + unregister_chrdev(cmem_major, "CMem"); + return ret; +} + +static void __exit cmemdrv_exit(void) +{ + int i; + for (i = 0; i < bsize_count; i++) + device_destroy(cmem_class, MKDEV(cmem_major, i)); + + class_destroy(cmem_class); + unregister_chrdev(cmem_major, "CMem"); +} + +module_init(cmemdrv_init) +module_exit(cmemdrv_exit) + +MODULE_AUTHOR("RenesasElectronicsCorp."); +MODULE_DESCRIPTION("Userspace I/O driver for image memory"); +MODULE_LICENSE("GPL v2"); diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/kernel-module-cmemdrv_0.1.bb b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/kernel-module-cmemdrv_0.1.bb new file mode 100644 index 0000000..c460c6f --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-cmemdrv/kernel-module-cmemdrv_0.1.bb @@ -0,0 +1,24 @@ +SUMMARY = "Cache Memory Primitive Module" +LICENSE = "GPLv2 & MIT" +LIC_FILES_CHKSUM = " \ + file://GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \ + " + +inherit module + +PR = "r0" +PV = "0.1" + +SRC_URI = " \ + file://Makefile \ + file://cmemdrv.c \ + file://GPL-COPYING \ + file://MIT-COPYING \ + " + +S = "${WORKDIR}" + +KERNEL_MODULE_AUTOLOAD += "cmemdrv" +KERNEL_MODULE_PROBECONF += "cmemdrv" +module_conf_cmemdrv = "options cmemdrv bsize=0x7000000" diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/GPL-COPYING b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/GPL-COPYING new file mode 100644 index 0000000..d159169 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/GPL-COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + <signature of Ty Coon>, 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/MIT-COPYING b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/MIT-COPYING new file mode 100644 index 0000000..28e2a15 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/MIT-COPYING @@ -0,0 +1,41 @@ + +This software is Copyright (C) 2013 Renesas Electronics Corporation + +You may use, distribute and copy this software under the terms of the MIT +license displayed below. + +----------------------------------------------------------------------------- + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + Alternatively, the contents of this file may be used under the terms of + the GNU General Public License Version 2 ("GPL") in which case the provisions + of GPL are applicable instead of those above. + + If you wish to allow use of your version of this file only under the terms of + GPL, and not to allow others to use your version of this file under the terms + of the MIT license, indicate your decision by deleting the provisions above + and replace them with the notice and other provisions required by GPL as set + out in the file called "GPL-COPYING" included in this distribution. If you do + not delete the provisions above, a recipient may use your version of this file + under the terms of either the MIT license or GPL. + +----------------------------------------------------------------------------- + + EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS + PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR + COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +----------------------------------------------------------------------------- diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/Makefile b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/Makefile new file mode 100644 index 0000000..9d35e2a --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/Makefile @@ -0,0 +1,14 @@ +obj-m := uio_imp.o + +SRC := $(shell pwd) + +all: + $(MAKE) -C $(KERNEL_SRC) M=$(SRC) + +modules_install: + $(MAKE) -C $(KERNEL_SRC) M=$(SRC) modules_install + +clean: + rm -f *.o *~ core .depend .*.cmd *.ko *.mod.c + rm -f Module.markers Module.symvers modules.order + rm -rf .tmp_versions Modules.symvers diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/uio_imp.c b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/uio_imp.c new file mode 100644 index 0000000..ca90d2c --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/files/uio_imp.c @@ -0,0 +1,559 @@ +/*************************************************************************/ /* + IMP Driver (kernel module) + + Copyright (C) 2015 - 2017 Renesas Electronics Corporation + + License Dual MIT/GPLv2 + + The contents of this file are subject to the MIT license as set out below. + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + Alternatively, the contents of this file may be used under the terms of + the GNU General Public License Version 2 ("GPL") in which case the provisions + of GPL are applicable instead of those above. + + If you wish to allow use of your version of this file only under the terms of + GPL, and not to allow others to use your version of this file under the terms + of the MIT license, indicate your decision by deleting the provisions above + and replace them with the notice and other provisions required by GPL as set + out in the file called "GPL-COPYING" included in this distribution. If you do + not delete the provisions above, a recipient may use your version of this file + under the terms of either the MIT license or GPL. + + This License is also included in this distribution in the file called + "MIT-COPYING". + + EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS + PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR + COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + GPLv2: + If you wish to use this file under the terms of GPL, following terms are + effective. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; version 2 of the License. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ /*************************************************************************/ + +#include <linux/platform_device.h> +#include <linux/uio_driver.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/pm_runtime.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/dma-mapping.h> +#include <linux/irq.h> +#include <linux/irqdomain.h> + +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> + +#define DRIVER_NAME "uio_imp" +#define DRIVER_VER "0.0" + +#define LUIO_DEVICE_IMP 0 +#define LUIO_DEVICE_IMPSC 1 +#define LUIO_DEVICE_IMPDES 2 +#define LUIO_DEVICE_IMRLSX 3 +#define LUIO_DEVICE_IMRX 4 +#define LUIO_DEVICE_MEM 5 +#define LUIO_DEVICE_VSP 6 +#define LUIO_DEVICE_IMPDMAC 7 + +#define IMP_INTERNAL_REG_SIZE 0x1000 +#define IMP_NUM_DIST_HWIRQ 32 + +static int bsize = 7 * 1024 * 1024; +module_param(bsize, uint, S_IRUGO); + +static bool clear_int = 0; +module_param(clear_int, bool, S_IRUGO); + +struct imp_dev_data { + int dtype; + irqreturn_t (*handler)(int irq, struct uio_info *dev_info); + void (*sreset)(struct uio_info *info); + const char *name; +}; + +struct uio_imp_platdata { + struct uio_info *uioinfo; + struct platform_device *pdev; + const struct imp_dev_data *dev_data; + + struct irq_chip irq_chip; + struct irq_domain *irq_domain; + unsigned int domain_irq[IMP_NUM_DIST_HWIRQ]; + int max_hwirq; +}; + +static unsigned int ReadReg(struct uio_info *info, + unsigned long reg_offs) +{ + return ioread32(info->mem[0].internal_addr + reg_offs); +} + +static void WriteReg(struct uio_info *info, + unsigned long reg_offs, u32 data) +{ + iowrite32(data, info->mem[0].internal_addr + reg_offs); +} + +static irqreturn_t imp_handler(int irq, struct uio_info *dev_info) +{ + u32 stat = ReadReg(dev_info, 0x10); + + if (clear_int && (stat & 0x00000020)) { + /* clear INT state */ + WriteReg(dev_info, 0x10, 0x00000020); + return IRQ_NONE; + } + + if (stat != 0) { + /* mask all interrupts */ + WriteReg(dev_info, 0x14, ReadReg(dev_info, 0x14) & 0x0fffffff); + + return IRQ_HANDLED; + } else { + return IRQ_NONE; + } +} + +static void imp_sreset(struct uio_info *info) +{ + /* software reset */ + WriteReg(info, 0x08, 0x80000000); + WriteReg(info, 0x08, 0x00000000); + ReadReg(info, 0x08); + + /* 32bit addressing mode */ + WriteReg(info, 0x08, 0x00000001); + + /* mask all interrupts */ + WriteReg(info, 0x14, 0); +} + +static irqreturn_t impsc_handler(int irq, struct uio_info *dev_info) +{ + u32 stat = ReadReg(dev_info, 0x14); + + if (clear_int && (stat & 0x00000004)) { + /* clear INT state */ + WriteReg(dev_info, 0x18, 0x00000004); + return IRQ_NONE; + } + + if (stat != 0) { + /* mask all interrupts */ + WriteReg(dev_info, 0x20, 0xffffffff); + + return IRQ_HANDLED; + } else { + return IRQ_NONE; + } +} + +static void impsc_sreset(struct uio_info *info) +{ + /* software reset */ + WriteReg(info, 0x08, 0x00000001); + WriteReg(info, 0x08, 0x00000000); + ReadReg(info, 0x08); + + /* mask all interrupts */ + WriteReg(info, 0x20, 0xffffffff); +} + +static irqreturn_t impdist_handler(int irq, struct uio_info *dev_info) +{ + unsigned int bit; + unsigned long stat; + struct uio_imp_platdata *priv = dev_info->priv; + + stat = ReadReg(dev_info, 0x100); /* sr */ + stat &= ~ReadReg(dev_info, 0x10c); /* imr */ + + if (stat & 0x100) + stat |= ReadReg(dev_info, 0x110); /* g0intsel */ + if (stat & 0x200) + stat |= ReadReg(dev_info, 0x114); /* g1intsel */ + if (stat & 0x400) + stat |= ReadReg(dev_info, 0x118); /* g2intsel */ + stat &= ~0x700; + + if (!stat) + return IRQ_NONE; + + for_each_set_bit(bit, &stat, IMP_NUM_DIST_HWIRQ) + generic_handle_irq(priv->domain_irq[bit]); + + return IRQ_HANDLED; +} + +static void impdist_irq_enable(struct irq_data *d) +{ + struct uio_imp_platdata *priv = irq_data_get_irq_chip_data(d); + int hw_irq = irqd_to_hwirq(d); + unsigned int d_var; + + d_var = ReadReg(priv->uioinfo, 0x10c) & ~BIT(hw_irq); + WriteReg(priv->uioinfo, 0x10c, d_var); +} + +static void impdist_irq_disable(struct irq_data *d) +{ + struct uio_imp_platdata *priv = irq_data_get_irq_chip_data(d); + int hw_irq = irqd_to_hwirq(d); + unsigned int d_var; + + d_var = ReadReg(priv->uioinfo, 0x10c) | BIT(hw_irq); + WriteReg(priv->uioinfo, 0x10c, d_var); +} + +static int impdist_irq_domain_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + struct uio_imp_platdata *priv = h->host_data; + + dev_dbg(&priv->pdev->dev, "impdist_irq_domain_map: virq=%d, hw=%d\n", virq, (int)hw); + priv->domain_irq[hw] = virq; + irq_set_chip_data(virq, priv); + irq_set_chip_and_handler(virq, &priv->irq_chip, handle_simple_irq); + return 0; +} + +static struct irq_domain_ops impdist_irq_domain_ops = { + .map = impdist_irq_domain_map, +}; + +static void impdist_sreset(struct uio_info *info) +{ + WriteReg(info, 0x500, 0); +} + +static irqreturn_t impdmac_handler(int irq, struct uio_info *dev_info) +{ + u32 stat = ReadReg(dev_info, 0x08); + + if (clear_int && (stat & 0x00000040)) { + /* clear INT state */ + WriteReg(dev_info, 0x0c, 0x00000040); + return IRQ_NONE; + } + + if (stat != 0) { + /* mask all interrupts */ + WriteReg(dev_info, 0x14, 0xffffffff); + + return IRQ_HANDLED; + } else { + return IRQ_NONE; + } +} + +static void impdmac_sreset(struct uio_info *info) +{ + /* software reset */ + WriteReg(info, 0x04, 0x80000000); + WriteReg(info, 0x04, 0x00000000); + ReadReg(info, 0x04); + + /* mask all interrupts */ + WriteReg(info, 0x14, 0xffffffff); +} + +static const struct imp_dev_data imp_dev_data_legacy = { + .dtype = LUIO_DEVICE_IMP, + .handler = imp_handler, + .sreset = imp_sreset, +}; +static const struct imp_dev_data imp_dev_data_shader = { + .dtype = LUIO_DEVICE_IMPSC, + .handler = impsc_handler, + .sreset = impsc_sreset, +}; +static const struct imp_dev_data imp_dev_data_distributer = { + .dtype = LUIO_DEVICE_IMPDES, + .handler = impdist_handler, + .sreset = impdist_sreset, +}; +static const struct imp_dev_data imp_dev_data_memory = { + .dtype = LUIO_DEVICE_MEM, +}; +static const struct imp_dev_data imp_dev_data_dmac = { + .dtype = LUIO_DEVICE_IMPDMAC, + .handler = impdmac_handler, + .sreset = impdmac_sreset, +}; + +static const struct of_device_id of_imp_match[] = { + { .compatible = "renesas,impx4-legacy", .data = &imp_dev_data_legacy }, + { .compatible = "renesas,impx4-shader", .data = &imp_dev_data_shader }, + { .compatible = "renesas,impx4-distributer", .data = &imp_dev_data_distributer }, + { .compatible = "renesas,impx4-memory", .data = &imp_dev_data_memory }, + { .compatible = "renesas,impx5-dmac", .data = &imp_dev_data_dmac }, + { /* Terminator */ }, +}; +MODULE_DEVICE_TABLE(of, of_imp_match); + +static int uio_imp_open(struct uio_info *info, struct inode *inode) +{ + struct uio_imp_platdata *priv = info->priv; + + /* software reset */ + if (priv->dev_data->sreset) + priv->dev_data->sreset(info); + + return 0; +} + +static int uio_imp_release(struct uio_info *info, struct inode *inode) +{ + return 0; +} + +static int uio_imp_probe(struct platform_device *pdev) +{ + struct uio_info *uioinfo; + struct uio_imp_platdata *priv; + const struct imp_dev_data *dev_data; + struct resource *res; + struct uio_mem *uiomem; + int ret = -EINVAL; + + /* alloc uioinfo for one device */ + uioinfo = devm_kzalloc(&pdev->dev, sizeof(*uioinfo), + GFP_KERNEL); + if (!uioinfo) { + dev_err(&pdev->dev, "unable to kmalloc\n"); + return -ENOMEM; + } + + if (pdev->dev.of_node) { + const struct of_device_id *match; + match = of_match_node(of_imp_match, pdev->dev.of_node); + if (!match) + return ret; + + dev_data = match->data; + uioinfo->name = pdev->dev.of_node->name; + uioinfo->version = DRIVER_VER; + } else { + dev_data = pdev->dev.platform_data; + uioinfo->name = dev_data->name; + uioinfo->version = DRIVER_VER; + } + + if (!dev_data) { + dev_err(&pdev->dev, "missing platform_data\n"); + return ret; + } + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) { + dev_err(&pdev->dev, "unable to kmalloc\n"); + return -ENOMEM; + } + + priv->uioinfo = uioinfo; + priv->pdev = pdev; + priv->dev_data = dev_data; + + /* MEM */ + uiomem = &uioinfo->mem[0]; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (res) { + uiomem->memtype = UIO_MEM_PHYS; + uiomem->addr = res->start; + uiomem->size = resource_size(res); + uiomem->name = res->name; + + /* If reg[1] is shown, use it as internnal addr. + Otherwise, use reg[0]. */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (res) + uiomem->internal_addr = devm_ioremap_nocache(&pdev->dev, + res->start, resource_size(res)); + else + uiomem->internal_addr = devm_ioremap_nocache(&pdev->dev, + uiomem->addr, IMP_INTERNAL_REG_SIZE); + + if (!uiomem->internal_addr) { + dev_err(&pdev->dev, "unable to ioremap\n"); + return -ENOMEM; + } + } else if (dev_data->dtype == LUIO_DEVICE_MEM) { + /* allocate physically-contiguous memory */ + int buffer_size = bsize; + dev_info(&pdev->dev, "Allocating Buffer size = %d\n", buffer_size); + uiomem->memtype = UIO_MEM_PHYS; + uiomem->size = buffer_size; + uiomem->name = "mem"; + + uiomem->internal_addr = dmam_alloc_coherent(&pdev->dev, + buffer_size, &uiomem->addr, GFP_KERNEL); + if (!uiomem->internal_addr) { + dev_err(&pdev->dev, "unable to dma_alloc_coherent\n"); + return -ENOMEM; + } + } else { + dev_err(&pdev->dev, "missing memory map\n"); + return -EINVAL; + } + + /* IRQ */ + if (dev_data->handler) { + if (pdev->dev.of_node) + uioinfo->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); + else { + ret = platform_get_irq(pdev, 0); + if (ret >= 0) + uioinfo->irq = ret; + else if (ret != -ENXIO) { + dev_err(&pdev->dev, "failed to get IRQ\n"); + return ret; + } + } + if (uioinfo->irq) { + uioinfo->handler = dev_data->handler; + if (dev_data->dtype != LUIO_DEVICE_IMPDES) + uioinfo->irq_flags = IRQF_SHARED; + } + } + dev_dbg(&pdev->dev, "irq = %d\n", (int)uioinfo->irq); + + /* irq demuxing on distributer handler */ + if (uioinfo->irq && dev_data->dtype == LUIO_DEVICE_IMPDES) { + struct irq_chip *irq_chip = &priv->irq_chip; + irq_chip->name = uioinfo->name; + irq_chip->irq_mask = impdist_irq_disable; + irq_chip->irq_unmask = impdist_irq_enable; + irq_chip->irq_enable = impdist_irq_enable; + irq_chip->irq_disable = impdist_irq_disable; + irq_chip->flags = IRQCHIP_SKIP_SET_WAKE; + + priv->irq_domain = irq_domain_add_simple(pdev->dev.of_node, + IMP_NUM_DIST_HWIRQ, 0, + &impdist_irq_domain_ops, priv); + if (!priv->irq_domain) { + dev_err(&pdev->dev, "cannot initialize irq domain\n"); + ret = -ENXIO; + goto err1; + } + } + + pm_runtime_enable(&pdev->dev); + pm_runtime_get_sync(&priv->pdev->dev); + +#ifdef CFG_USE_FPGA + dev_info(&pdev->dev, "%s(0x%08lx)\n", + uioinfo->name, (unsigned long)uiomem->addr); +#else + /* software reset */ + if (dev_data->sreset) + dev_data->sreset(uioinfo); + + /* print hardware version */ + if (uiomem->internal_addr && dev_data->dtype != LUIO_DEVICE_MEM) { + unsigned int vcr0 = ReadReg(uioinfo, 0x0); + unsigned int vcr1 = ReadReg(uioinfo, 0x4); + dev_info(&pdev->dev, "%s(0x%08lx): VCR = 0x%08x, 0x%08x\n", + uioinfo->name, (unsigned long)uiomem->addr, vcr0, vcr1); + } +#endif /* CFG_USE_FPGA */ + + uioinfo->open = uio_imp_open; + uioinfo->release = uio_imp_release; + uioinfo->priv = priv; + + ret = uio_register_device(&pdev->dev, priv->uioinfo); + if (ret) { + dev_err(&pdev->dev, "unable to register uio device\n"); + goto err2; + } + + platform_set_drvdata(pdev, priv); + return 0; + +err2: + pm_runtime_put_sync(&priv->pdev->dev); + pm_runtime_disable(&pdev->dev); + if (priv->irq_domain) + irq_domain_remove(priv->irq_domain); + +err1: + if (pdev->dev.of_node && uioinfo->irq) + irq_dispose_mapping(uioinfo->irq); + + return ret; +} + +static int uio_imp_remove(struct platform_device *pdev) +{ + struct uio_imp_platdata *priv = platform_get_drvdata(pdev); + + uio_unregister_device(priv->uioinfo); + pm_runtime_put_sync(&priv->pdev->dev); + pm_runtime_disable(&pdev->dev); + + if (priv->irq_domain) + irq_domain_remove(priv->irq_domain); + + if (pdev->dev.of_node && priv->uioinfo->irq) + irq_dispose_mapping(priv->uioinfo->irq); + + return 0; +} + +static int uio_imp_runtime_nop(struct device *dev) +{ + return 0; +} + +static const struct dev_pm_ops uio_imp_dev_pm_ops = { + .runtime_suspend = uio_imp_runtime_nop, + .runtime_resume = uio_imp_runtime_nop, +}; + +static struct platform_driver uio_imp = { + .probe = uio_imp_probe, + .remove = uio_imp_remove, + .driver = { + .name = DRIVER_NAME, + .pm = &uio_imp_dev_pm_ops, + .of_match_table = of_match_ptr(of_imp_match), + }, +}; + +module_platform_driver(uio_imp); + +MODULE_AUTHOR("RenesasElectronicsCorp."); +MODULE_DESCRIPTION("Userspace I/O driver for IMP"); +MODULE_LICENSE("GPL v2"); diff --git a/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/kernel-module-uio-imp_0.1.bb b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/kernel-module-uio-imp_0.1.bb new file mode 100644 index 0000000..1000b7d --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/kernel-module-uio-imp/kernel-module-uio-imp_0.1.bb @@ -0,0 +1,27 @@ +SUMMARY = "IMP Primitive Driver Module" +LICENSE = "GPLv2 & MIT" +LIC_FILES_CHKSUM = " \ + file://GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \ + " + +inherit module + +PR = "r0" +PV = "0.1" + +SRC_URI = " \ + file://Makefile \ + file://uio_imp.c \ + file://GPL-COPYING \ + file://MIT-COPYING \ + " + +S = "${WORKDIR}" + +KERNEL_MODULE_AUTOLOAD += "uio_imp" +KERNEL_MODULE_PROBECONF += "uio_imp" + +module_conf_uio_imp = "" +module_conf_uio_imp_r8a7795 = "options uio_imp clear_int" +module_conf_uio_imp_r8a7796 = "options uio_imp clear_int" diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0049-clk-r8a779x-add-IMP-clock.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0049-clk-r8a779x-add-IMP-clock.patch new file mode 100644 index 0000000..a7cf942 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0049-clk-r8a779x-add-IMP-clock.patch @@ -0,0 +1,59 @@ +From 9075957822c829026acfb5e8982a77f895a7a640 Mon Sep 17 00:00:00 2001 +From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +Date: Mon, 27 Nov 2017 16:53:06 +0300 +Subject: [PATCH] clk: r8a779x: add IMP clock + +This adds IMP clock sources for Gen3 SoCs + +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +--- + drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + + drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + + drivers/clk/renesas/r8a7797-cpg-mssr.c | 7 +++++++ + 3 files changed, 9 insertions(+) + +diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c +index bc10df3..9061f7f 100644 +--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c +@@ -234,6 +234,7 @@ enum clk_ids { + DEF_MOD("imr2", 821, R8A7795_CLK_S2D1), + DEF_MOD("imr1", 822, R8A7795_CLK_S2D1), + DEF_MOD("imr0", 823, R8A7795_CLK_S2D1), ++ DEF_MOD("imp", 824, R8A7795_CLK_S1D1), + DEF_MOD("gpio7", 905, R8A7795_CLK_S3D4), + DEF_MOD("gpio6", 906, R8A7795_CLK_S3D4), + DEF_MOD("gpio5", 907, R8A7795_CLK_S3D4), +diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c +index 819d3c6..e886d8a 100644 +--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c +@@ -204,6 +204,7 @@ enum clk_ids { + DEF_MOD("vin1", 810, R8A7796_CLK_S0D2), + DEF_MOD("vin0", 811, R8A7796_CLK_S0D2), + DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6), ++ DEF_MOD("imp", 824, R8A7796_CLK_S1D1), + DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4), + DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4), + DEF_MOD("gpio5", 907, R8A7796_CLK_S3D4), +diff --git a/drivers/clk/renesas/r8a7797-cpg-mssr.c b/drivers/clk/renesas/r8a7797-cpg-mssr.c +index 29dfe4a..6655592 100644 +--- a/drivers/clk/renesas/r8a7797-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7797-cpg-mssr.c +@@ -129,6 +129,13 @@ enum clk_ids { + DEF_MOD("imr2", 821, R8A7797_CLK_S2D1), + DEF_MOD("imr1", 822, R8A7797_CLK_S2D1), + DEF_MOD("imr0", 823, R8A7797_CLK_S2D1), ++ DEF_MOD("imp3", 824, R8A7797_CLK_S1D1), ++ DEF_MOD("imp2", 825, R8A7797_CLK_S1D1), ++ DEF_MOD("imp1", 826, R8A7797_CLK_S1D1), ++ DEF_MOD("imp0", 827, R8A7797_CLK_S1D1), ++ DEF_MOD("imp-ocv1", 828, R8A7797_CLK_S1D1), ++ DEF_MOD("imp-ocv0", 829, R8A7797_CLK_S1D1), ++ DEF_MOD("impram", 830, R8A7797_CLK_S1D1), + DEF_MOD("gpio5", 907, R8A7797_CLK_CP), + DEF_MOD("gpio4", 908, R8A7797_CLK_CP), + DEF_MOD("gpio3", 909, R8A7797_CLK_CP), +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch new file mode 100644 index 0000000..316f182 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch @@ -0,0 +1,418 @@ +From 9dcc1345c0b04ebab6e5b9f676881716bf985753 Mon Sep 17 00:00:00 2001 +From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +Date: Tue, 28 Nov 2017 14:47:12 +0300 +Subject: [PATCH] arm64: dts: renesas: r8a779x: add IMP nodes + +This adds IMP resource nodes for Gen3 SoCs + +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +--- + arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 98 +++++++++++++++++++++++++++ + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 98 +++++++++++++++++++++++++++ + arch/arm64/boot/dts/renesas/r8a7796.dtsi | 62 +++++++++++++++++ + arch/arm64/boot/dts/renesas/r8a7797.dtsi | 99 ++++++++++++++++++++++++++++ + 4 files changed, 357 insertions(+) + +diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +index b3f3102..e15af8c 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +@@ -2794,6 +2794,104 @@ + }; + }; + ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp2 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff940000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <2>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp3 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff960000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <3>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc1 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff990000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <5>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsl0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff9c0000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <12>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xffa40000 0 0x20000>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imprtt { ++ compatible = "renesas,impx5-rtt"; ++ reg = <0 0xff8d0000 0 0x1000>, ++ <0 0xe6150000 0 0x1000>; ++ interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ + imrlx4_ch0: imr-lx4@fe860000 { + compatible = "renesas,imr-lx4"; + reg = <0 0xfe860000 0 0x2000>; +diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +index 02c5931..8ba4cec 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +@@ -2790,6 +2790,104 @@ + }; + }; + ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp2 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff940000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <2>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imp3 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff960000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <3>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsc1 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff990000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <5>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impsl0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff9c0000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <12>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xffa40000 0 0x20000>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ ++ imprtt { ++ compatible = "renesas,impx5-rtt"; ++ reg = <0 0xff8d0000 0 0x1000>, ++ <0 0xe6150000 0 0x1000>; ++ interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7795_PD_A3IR>; ++ }; ++ + imrlx4_ch0: imr-lx4@fe860000 { + compatible = "renesas,imr-lx4"; + reg = <0 0xfe860000 0 0x2000>; +diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +index b94d9e0..7c19f35 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +@@ -2531,5 +2531,67 @@ + }; + }; + }; ++ ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xffa40000 0 0x20000>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; ++ ++ imprtt { ++ compatible = "renesas,impx5-rtt"; ++ reg = <0 0xff8d0000 0 0x1000>, ++ <0 0xe6150000 0 0x1000>; ++ interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7796_PD_A3IR>; ++ }; + }; + }; +diff --git a/arch/arm64/boot/dts/renesas/r8a7797.dtsi b/arch/arm64/boot/dts/renesas/r8a7797.dtsi +index 1be93e8..232eb19 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7797.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7797.dtsi +@@ -970,6 +970,105 @@ + status = "okay"; + }; + ++ imp_distributer: impdes0 { ++ compatible = "renesas,impx4-distributer"; ++ reg = <0 0xffa00000 0 0x4000>; ++ interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ imp0 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff900000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <0>; ++ clocks = <&cpg CPG_MOD 827>; ++ power-domains = <&sysc R8A7797_PD_A2IR0>; ++ }; ++ ++ imp1 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff920000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <1>; ++ clocks = <&cpg CPG_MOD 826>; ++ power-domains = <&sysc R8A7797_PD_A2IR1>; ++ }; ++ ++ imp2 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff940000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <2>; ++ clocks = <&cpg CPG_MOD 825>; ++ power-domains = <&sysc R8A7797_PD_A2IR2>; ++ }; ++ ++ imp3 { ++ compatible = "renesas,impx4-legacy"; ++ reg = <0 0xff960000 0 0x20000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <3>; ++ clocks = <&cpg CPG_MOD 824>; ++ power-domains = <&sysc R8A7797_PD_A2IR3>; ++ }; ++ ++ impsc0 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff980000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <4>; ++ clocks = <&cpg CPG_MOD 829>; ++ power-domains = <&sysc R8A7797_PD_A2SC0>; ++ }; ++ ++ impsc1 { ++ compatible = "renesas,impx4-shader"; ++ reg = <0 0xff990000 0 0x10000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <5>; ++ clocks = <&cpg CPG_MOD 828>; ++ power-domains = <&sysc R8A7797_PD_A2SC1>; ++ }; ++ ++ impdm0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x1000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <16>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ ++ impdm1 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa10000 0 0x1000>, ++ <0 0xffa10800 0 0x0800>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <17>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ ++ imppsc0 { ++ compatible = "renesas,impx5-dmac"; ++ reg = <0 0xffa20000 0 0x4000>; ++ interrupt-parent = <&imp_distributer>; ++ interrupts = <12>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ ++ impc0 { ++ compatible = "renesas,impx4-memory"; ++ reg = <0 0xed000000 0 0x100000>; ++ clocks = <&cpg CPG_MOD 830>; ++ power-domains = <&sysc R8A7797_PD_A3IR>; ++ }; ++ + imrlx4_ch0: imr-lx4@fe860000 { + compatible = "renesas,imr-lx4"; + reg = <0 0xfe860000 0 0x2000>; +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg index b856d48..9796ba5 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/eagle.cfg @@ -26,3 +26,4 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y CONFIG_HID_MULTITOUCH=y CONFIG_SERIAL_SH_SCI_DMA=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg index 29425e5..a42b74c 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/salvator-x.cfg @@ -29,3 +29,4 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y CONFIG_HID_MULTITOUCH=y CONFIG_SERIAL_SH_SCI_DMA=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg index b52636a..4e24c06 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/ulcb.cfg @@ -78,3 +78,4 @@ CONFIG_AIM_NETWORK=y CONFIG_AIM_SOUND=y CONFIG_AIM_V4L2=y CONFIG_HDM_DIM2=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg index 0d06354..211da49 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/v3msk.cfg @@ -30,3 +30,4 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y CONFIG_HID_MULTITOUCH=y CONFIG_SERIAL_SH_SCI_DMA=y +CONFIG_UIO=y diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend index c1b71e7..0b4d393 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend @@ -49,6 +49,8 @@ SRC_URI_append = " \ file://0046-arm64-dts-renesas-r8a779x-add-mlp-nodes.patch \ ${@base_conditional("KF_ENABLE_SD3", "1", " file://0047-arm64-dts-renesas-ulcb-kf-enable-sd3.patch", "", d)} \ ${@base_conditional("KF_ENABLE_MOST", "1", " file://0048-arm64-dts-renesas-ulcb-kf-enable-most.patch", "", d)} \ + file://0049-clk-r8a779x-add-IMP-clock.patch \ + file://0050-arm64-dts-renesas-r8a779x-add-IMP-nodes.patch \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE1", "1", " file://0050-arm64-dts-Gen3-view-boards-TYPE1-first-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_SECOND4_TYPE1", "1", " file://0051-arm64-dts-Gen3-view-boards-TYPE1-second-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE2", "1", " file://0052-arm64-dts-Gen3-view-boards-TYPE2-first-4-cameras.patch", "", d)} \ |