diff options
Diffstat (limited to 'meta-rcar-gen3-adas')
10 files changed, 762 insertions, 1 deletions
diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch index 4acd0f1..dc4649a 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0040-arm64-dts-renesas-add-ADAS-boards.patch @@ -15509,7 +15509,7 @@ new file mode 100644 index 0000000..4ead97a --- /dev/null +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi -@@ -0,0 +1,1520 @@ +@@ -0,0 +1,1542 @@ +/* + * Device Tree Source for the ULCB Kingfisher board + * @@ -15887,6 +15887,11 @@ index 0000000..4ead97a + groups = "vin5_data8", "vin5_sync", "vin5_clk"; + function = "vin5"; + }; ++ ++ mlp_pins: mlp { ++ groups = "mlb_3pin"; ++ function = "mlb_3pin"; ++ }; +}; + +&du { @@ -15903,6 +15908,15 @@ index 0000000..4ead97a + }; +}; + ++&gpio4 { ++ most_rst { ++ gpio-hog; ++ gpios = <14 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "MOST RST"; ++ }; ++}; ++ +&gpio6 { + audio_sw { + gpio-hog; @@ -17028,6 +17042,14 @@ index 0000000..4ead97a + pcie1v8-supply = <&mpcie_1v8>; +}; + ++&mlp { ++ pinctrl-0 = <&mlp_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ clock-speed = "1024fs"; ++}; ++ +/* uncomment to enable CN47: SD on SDHI3 */ +//#include "ulcb-kf-sd3.dtsi" diff --git a/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi b/arch/arm64/boot/dts/renesas/ulcb-vb-cn12.dtsi diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0044-pinctrl-r8a779x-add-mlb-pinmux.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0044-pinctrl-r8a779x-add-mlb-pinmux.patch new file mode 100644 index 0000000..8541e19 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0044-pinctrl-r8a779x-add-mlb-pinmux.patch @@ -0,0 +1,154 @@ +From 7f797fef45307ed6c5960cc116ce8de65d192269 Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Fri, 7 Jul 2017 16:22:40 +0300 +Subject: [PATCH] pinctrl: r8a779x: add mlb pinmux + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +--- + drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 14 ++++++++++++++ + drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 14 ++++++++++++++ + drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 14 ++++++++++++++ + 3 files changed, 42 insertions(+) + +diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c +index 378065d..f544546 100644 +--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c ++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c +@@ -2403,6 +2403,14 @@ enum { + IRQ5_MARK, + }; + ++/* - MLB+ ------------------------------------------------------------------- */ ++static const unsigned int mlb_3pin_pins[] = { ++ RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), ++}; ++static const unsigned int mlb_3pin_mux[] = { ++ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, ++}; ++ + /* - MSIOF0 ----------------------------------------------------------------- */ + static const unsigned int msiof0_clk_pins[] = { + /* SCK */ +@@ -4266,6 +4274,7 @@ enum { + SH_PFC_PIN_GROUP(intc_ex_irq3), + SH_PFC_PIN_GROUP(intc_ex_irq4), + SH_PFC_PIN_GROUP(intc_ex_irq5), ++ SH_PFC_PIN_GROUP(mlb_3pin), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), +@@ -4682,6 +4691,10 @@ enum { + "intc_ex_irq5", + }; + ++static const char * const mlb_3pin_groups[] = { ++ "mlb_3pin", ++}; ++ + static const char * const msiof0_groups[] = { + "msiof0_clk", + "msiof0_sync", +@@ -5032,6 +5045,7 @@ enum { + SH_PFC_FUNCTION(i2c5), + SH_PFC_FUNCTION(i2c6), + SH_PFC_FUNCTION(intc_ex), ++ SH_PFC_FUNCTION(mlb_3pin), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), +diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +index 1198998..928bbbc 100644 +--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c ++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +@@ -2466,6 +2466,14 @@ enum { + IRQ5_MARK, + }; + ++/* - MLB+ ------------------------------------------------------------------- */ ++static const unsigned int mlb_3pin_pins[] = { ++ RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), ++}; ++static const unsigned int mlb_3pin_mux[] = { ++ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, ++}; ++ + /* - MSIOF0 ----------------------------------------------------------------- */ + static const unsigned int msiof0_clk_pins[] = { + /* SCK */ +@@ -4387,6 +4395,7 @@ enum { + SH_PFC_PIN_GROUP(intc_ex_irq3), + SH_PFC_PIN_GROUP(intc_ex_irq4), + SH_PFC_PIN_GROUP(intc_ex_irq5), ++ SH_PFC_PIN_GROUP(mlb_3pin), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), +@@ -4811,6 +4820,10 @@ enum { + "intc_ex_irq5", + }; + ++static const char * const mlb_3pin_groups[] = { ++ "mlb_3pin", ++}; ++ + static const char * const msiof0_groups[] = { + "msiof0_clk", + "msiof0_sync", +@@ -5169,6 +5182,7 @@ enum { + SH_PFC_FUNCTION(i2c5), + SH_PFC_FUNCTION(i2c6), + SH_PFC_FUNCTION(intc_ex), ++ SH_PFC_FUNCTION(mlb_3pin), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), +diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +index 1cef61b..26a69dc 100644 +--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c ++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +@@ -2468,6 +2468,14 @@ enum { + IRQ5_MARK, + }; + ++/* - MLB+ ------------------------------------------------------------------- */ ++static const unsigned int mlb_3pin_pins[] = { ++ RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), ++}; ++static const unsigned int mlb_3pin_mux[] = { ++ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, ++}; ++ + /* - MSIOF0 ----------------------------------------------------------------- */ + static const unsigned int msiof0_clk_pins[] = { + /* SCK */ +@@ -4310,6 +4318,7 @@ enum { + SH_PFC_PIN_GROUP(intc_ex_irq3), + SH_PFC_PIN_GROUP(intc_ex_irq4), + SH_PFC_PIN_GROUP(intc_ex_irq5), ++ SH_PFC_PIN_GROUP(mlb_3pin), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), +@@ -4722,6 +4731,10 @@ enum { + "intc_ex_irq5", + }; + ++static const char * const mlb_3pin_groups[] = { ++ "mlb_3pin", ++}; ++ + static const char * const msiof0_groups[] = { + "msiof0_clk", + "msiof0_sync", +@@ -5054,6 +5067,7 @@ enum { + SH_PFC_FUNCTION(i2c5), + SH_PFC_FUNCTION(i2c6), + SH_PFC_FUNCTION(intc_ex), ++ SH_PFC_FUNCTION(mlb_3pin), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0045-clk-r8a779x-add-mlp-clock.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0045-clk-r8a779x-add-mlp-clock.patch new file mode 100644 index 0000000..ca473a1 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0045-clk-r8a779x-add-mlp-clock.patch @@ -0,0 +1,38 @@ +From 741e7fcf44527632a06538419f000843b24d9293 Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Fri, 7 Jul 2017 16:23:44 +0300 +Subject: [PATCH] clk: r8a779x: add mlp clock + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +--- + drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + + drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c +index f833031..38d1f41 100644 +--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c +@@ -219,6 +219,7 @@ enum clk_ids { + DEF_MOD("lvds", 727, R8A7795_CLK_S0D4), + DEF_MOD("hdmi1", 728, R8A7795_CLK_HDMI), + DEF_MOD("hdmi0", 729, R8A7795_CLK_HDMI), ++ DEF_MOD("mlp", 802, R8A7795_CLK_S2D1), + DEF_MOD("vin7", 804, R8A7795_CLK_S0D2), + DEF_MOD("vin6", 805, R8A7795_CLK_S0D2), + DEF_MOD("vin5", 806, R8A7795_CLK_S0D2), +diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c +index b938750..6a5936e 100644 +--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c ++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c +@@ -194,6 +194,7 @@ enum clk_ids { + DEF_MOD("du0", 724, R8A7796_CLK_S2D1), + DEF_MOD("lvds", 727, R8A7796_CLK_S2D1), + DEF_MOD("hdmi0", 729, R8A7796_CLK_HDMI), ++ DEF_MOD("mlp", 802, R8A7796_CLK_S2D1), + DEF_MOD("vin7", 804, R8A7796_CLK_S0D2), + DEF_MOD("vin6", 805, R8A7796_CLK_S0D2), + DEF_MOD("vin5", 806, R8A7796_CLK_S0D2), +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0046-arm64-dts-renesas-r8a779x-add-mlp-nodes.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0046-arm64-dts-renesas-r8a779x-add-mlp-nodes.patch new file mode 100644 index 0000000..1f17f0e --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0046-arm64-dts-renesas-r8a779x-add-mlp-nodes.patch @@ -0,0 +1,87 @@ +From 8d5de721b2e037ce77f886a4307ea5668df9417f Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Fri, 7 Jul 2017 16:25:06 +0300 +Subject: [PATCH] arm64: dts: renesas: r8a779x: add mlp nodes + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +--- + arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 13 +++++++++++++ + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 13 +++++++++++++ + arch/arm64/boot/dts/renesas/r8a7796.dtsi | 13 +++++++++++++ + 3 files changed, 39 insertions(+) + +diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +index 89c70bb7738b..44a290b32899 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +@@ -2072,6 +2072,19 @@ + status = "disabled"; + }; + ++ mlp: mlp@ec520000 { ++ compatible = "rcar,medialb-dim2"; ++ reg = <0 0xec520000 0 0x800>; ++ interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 802>; ++ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; ++ status = "disabled"; ++ }; ++ + msiof0: spi@e6e90000 { + #address-cells = <1>; + #size-cells = <0>; +diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +index 89c70bb7738b..44a290b32899 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +@@ -2072,6 +2072,19 @@ + status = "disabled"; + }; + ++ mlp: mlp@ec520000 { ++ compatible = "rcar,medialb-dim2"; ++ reg = <0 0xec520000 0 0x800>; ++ interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 802>; ++ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; ++ status = "disabled"; ++ }; ++ + msiof0: spi@e6e90000 { + #address-cells = <1>; + #size-cells = <0>; +diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +index f430df9df961..565d6e7de4cc 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +@@ -1955,6 +1955,19 @@ + status = "disabled"; + }; + ++ mlp: mlp@ec520000 { ++ compatible = "rcar,medialb-dim2"; ++ reg = <0 0xec520000 0 0x800>; ++ interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&cpg CPG_MOD 802>; ++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; ++ status = "disabled"; ++ }; ++ + msiof1: spi@e6ea0000 { + compatible = "renesas,msiof-r8a7796"; + reg = <0 0xe6ea0000 0 0x0064>; +-- +2.13.0 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0073-MOST-dim2-add-device-tree-support.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0073-MOST-dim2-add-device-tree-support.patch new file mode 100644 index 0000000..b3e2e0b --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0073-MOST-dim2-add-device-tree-support.patch @@ -0,0 +1,169 @@ +From cc64770782e6bb01b2d8b76c1731a28d5d06d135 Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Fri, 7 Jul 2017 20:42:36 +0300 +Subject: [PATCH] MOST: dim2: add device tree support + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +--- + drivers/staging/most/hdm-dim2/dim2_hdm.c | 72 ++++++++++++++++++++++---------- + 1 file changed, 50 insertions(+), 22 deletions(-) + +diff --git a/drivers/staging/most/hdm-dim2/dim2_hdm.c b/drivers/staging/most/hdm-dim2/dim2_hdm.c +index a36449551513..f28f169180fe 100644 +--- a/drivers/staging/most/hdm-dim2/dim2_hdm.c ++++ b/drivers/staging/most/hdm-dim2/dim2_hdm.c +@@ -14,6 +14,7 @@ + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + + #include <linux/module.h> ++#include <linux/of_platform.h> + #include <linux/printk.h> + #include <linux/kernel.h> + #include <linux/init.h> +@@ -21,6 +22,7 @@ + #include <linux/interrupt.h> + #include <linux/slab.h> + #include <linux/io.h> ++#include <linux/clk.h> + #include <linux/dma-mapping.h> + #include <linux/sched.h> + #include <linux/kthread.h> +@@ -101,6 +103,7 @@ struct dim2_hdm { + struct most_interface most_iface; + char name[16 + sizeof "dim2-"]; + void __iomem *io_base; ++ struct clk *clk; + int clk_speed; + struct task_struct *netinfo_task; + wait_queue_head_t netinfo_waitq; +@@ -165,6 +168,27 @@ void dimcb_on_error(u8 error_id, const char *error_message) + error_message); + } + ++static int dim_parce_speed(const char *clock_speed) ++{ ++ if (!strcmp(clock_speed, "256fs")) ++ return CLK_256FS; ++ else if (!strcmp(clock_speed, "512fs")) ++ return CLK_512FS; ++ else if (!strcmp(clock_speed, "1024fs")) ++ return CLK_1024FS; ++ else if (!strcmp(clock_speed, "2048fs")) ++ return CLK_2048FS; ++ else if (!strcmp(clock_speed, "3072fs")) ++ return CLK_3072FS; ++ else if (!strcmp(clock_speed, "4096fs")) ++ return CLK_4096FS; ++ else if (!strcmp(clock_speed, "6144fs")) ++ return CLK_6144FS; ++ else if (!strcmp(clock_speed, "8192fs")) ++ return CLK_8192FS; ++ return -1; ++} ++ + /** + * startup_dim - initialize the dim2 interface + * @pdev: platform device +@@ -178,32 +202,12 @@ static int startup_dim(struct platform_device *pdev) + struct dim2_platform_data *pdata = pdev->dev.platform_data; + u8 hal_ret; + +- dev->clk_speed = -1; +- +- if (clock_speed) { +- if (!strcmp(clock_speed, "256fs")) +- dev->clk_speed = CLK_256FS; +- else if (!strcmp(clock_speed, "512fs")) +- dev->clk_speed = CLK_512FS; +- else if (!strcmp(clock_speed, "1024fs")) +- dev->clk_speed = CLK_1024FS; +- else if (!strcmp(clock_speed, "2048fs")) +- dev->clk_speed = CLK_2048FS; +- else if (!strcmp(clock_speed, "3072fs")) +- dev->clk_speed = CLK_3072FS; +- else if (!strcmp(clock_speed, "4096fs")) +- dev->clk_speed = CLK_4096FS; +- else if (!strcmp(clock_speed, "6144fs")) +- dev->clk_speed = CLK_6144FS; +- else if (!strcmp(clock_speed, "8192fs")) +- dev->clk_speed = CLK_8192FS; +- } ++ if (clock_speed) ++ dev->clk_speed = dim_parce_speed(clock_speed); + + if (dev->clk_speed == -1) { + pr_info("Bad or missing clock speed parameter, using default value: 3072fs\n"); + dev->clk_speed = CLK_3072FS; +- } else { +- pr_info("Selected clock speed: %s\n", clock_speed); + } + if (pdata && pdata->init) { + int ret = pdata->init(pdata, dev->io_base, dev->clk_speed); +@@ -735,6 +739,7 @@ static int dim2_probe(struct platform_device *pdev) + int ret, i; + struct kobject *kobj; + int irq; ++ struct device_node *np = pdev->dev.of_node; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) +@@ -765,6 +770,14 @@ static int dim2_probe(struct platform_device *pdev) + dev_err(&pdev->dev, "failed to request mlb_int irq %d\n", irq); + return ret; + } ++ ++ dev->clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(dev->clk)) { ++ dev_err(&pdev->dev, "cannot get clock\n"); ++ ret = PTR_ERR(dev->clk); ++ return ret; ++ } ++ clk_prepare_enable(dev->clk); + + init_waitqueue_head(&dev->netinfo_waitq); + dev->deliver_netinfo = 0; +@@ -814,6 +827,12 @@ static int dim2_probe(struct platform_device *pdev) + dev->most_iface.poison_channel = poison_channel; + dev->most_iface.request_netinfo = request_netinfo; + ++ if (np) { ++ const char *tmp; ++ if (!of_property_read_string(np, "clock-speed", &tmp)) ++ dev->clk_speed = dim_parce_speed(tmp); ++ } ++ + kobj = most_register_interface(&dev->most_iface); + if (IS_ERR(kobj)) { + ret = PTR_ERR(kobj); +@@ -866,6 +885,8 @@ static int dim2_remove(struct platform_device *pdev) + most_deregister_interface(&dev->most_iface); + kthread_stop(dev->netinfo_task); + ++ clk_disable_unprepare(dev->clk); ++ + /* + * break link to local platform_device_id struct + * to prevent crash by unload platform device module +@@ -882,12 +903,19 @@ static struct platform_device_id dim2_id[] = { + + MODULE_DEVICE_TABLE(platform, dim2_id); + ++static const struct of_device_id dim2_of_match[] = { ++ { .compatible = "rcar,medialb-dim2", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, dim2_of_match); ++ + static struct platform_driver dim2_driver = { + .probe = dim2_probe, + .remove = dim2_remove, + .id_table = dim2_id, + .driver = { + .name = "hdm_dim2", ++ .of_match_table = dim2_of_match, + }, + }; + +-- +2.13.0 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0074-MOST-dim2-add-R-Car3-related-initialization.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0074-MOST-dim2-add-R-Car3-related-initialization.patch new file mode 100644 index 0000000..572da2a --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0074-MOST-dim2-add-R-Car3-related-initialization.patch @@ -0,0 +1,63 @@ +From 41d15fa6003b65080f05d271bf495104013754f9 Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Fri, 7 Jul 2017 20:43:33 +0300 +Subject: [PATCH 112/114] MOST: dim2: add R-Car3 related initialization + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +--- + drivers/staging/most/hdm-dim2/dim2_hdm.c | 28 +++++++++++++++++++++++++++- + 1 file changed, 27 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/most/hdm-dim2/dim2_hdm.c b/drivers/staging/most/hdm-dim2/dim2_hdm.c +index f28f169180fe..c1beabc28fa8 100644 +--- a/drivers/staging/most/hdm-dim2/dim2_hdm.c ++++ b/drivers/staging/most/hdm-dim2/dim2_hdm.c +@@ -26,6 +26,7 @@ + #include <linux/dma-mapping.h> + #include <linux/sched.h> + #include <linux/kthread.h> ++#include <linux/delay.h> + + #include <mostcore.h> + #include <networking.h> +@@ -189,6 +191,26 @@ static int dim_parce_speed(const char *clock_speed) + return -1; + } + ++static int dim_rcar_init(struct dim2_hdm *dev) ++{ ++ /* PLL */ ++ __raw_writel(0x04, dev->io_base + 0x600); ++ ++ /* 512FS Enable Register */ ++ if (dev->clk_speed == CLK_512FS) ++ __raw_writel(0x01, dev->io_base + 0x604); ++ else ++ __raw_writel(0x00, dev->io_base + 0x604); ++ ++ udelay(200); ++ ++ /* BBCR = 0b11 */ ++ __raw_writel(0x03, dev->io_base + 0x500); ++ __raw_writel(0x0002FF02, dev->io_base + 0x508); ++ ++ return 0; ++} ++ + /** + * startup_dim - initialize the dim2 interface + * @pdev: platform device +@@ -216,6 +238,10 @@ static int startup_dim(struct platform_device *pdev) + return ret; + } + ++ if (1 /* renesas */) { ++ dim_rcar_init(dev); ++ } ++ + pr_info("sync: num of frames per sub-buffer: %u\n", fcnt); + hal_ret = dim_startup(dev->io_base, dev->clk_speed, fcnt); + if (hal_ret != DIM_NO_ERROR) { +-- +2.13.0 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0075-MOST-core-fix-memory-allocation-at-arm64.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0075-MOST-core-fix-memory-allocation-at-arm64.patch new file mode 100644 index 0000000..33a7c3a --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0075-MOST-core-fix-memory-allocation-at-arm64.patch @@ -0,0 +1,54 @@ +From 90bfbf16c895aa53e1d017d4ce7f4f8121e0da3c Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Fri, 7 Jul 2017 20:45:01 +0300 +Subject: [PATCH 113/114] MOST: core: fix memory allocation at arm64 + +Provide valid dev pointer to dma_alloc_coherent + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +--- + drivers/staging/most/hdm-dim2/dim2_hdm.c | 1 + + drivers/staging/most/mostcore/core.c | 2 +- + drivers/staging/most/mostcore/mostcore.h | 1 + + 3 files changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/most/hdm-dim2/dim2_hdm.c b/drivers/staging/most/hdm-dim2/dim2_hdm.c +index c1beabc28fa8..81edf4f4beb3 100644 +--- a/drivers/staging/most/hdm-dim2/dim2_hdm.c ++++ b/drivers/staging/most/hdm-dim2/dim2_hdm.c +@@ -852,6 +852,7 @@ static int dim2_probe(struct platform_device *pdev) + dev->most_iface.enqueue = enqueue; + dev->most_iface.poison_channel = poison_channel; + dev->most_iface.request_netinfo = request_netinfo; ++ dev->most_iface.dev = &pdev->dev; + + if (np) { + const char *tmp; +diff --git a/drivers/staging/most/mostcore/core.c b/drivers/staging/most/mostcore/core.c +index 7c619feb12d3..ce56d5ca582c 100644 +--- a/drivers/staging/most/mostcore/core.c ++++ b/drivers/staging/most/mostcore/core.c +@@ -1265,7 +1265,7 @@ static int arm_mbo_chain(struct most_c_obj *c, int dir, + mbo->context = c; + mbo->ifp = c->iface; + mbo->hdm_channel_id = c->channel_id; +- mbo->virt_address = dma_alloc_coherent(NULL, ++ mbo->virt_address = dma_alloc_coherent(c->iface->dev, + coherent_buf_size, + &mbo->bus_address, + GFP_KERNEL); +diff --git a/drivers/staging/most/mostcore/mostcore.h b/drivers/staging/most/mostcore/mostcore.h +index 60e018e499ef..334908639067 100644 +--- a/drivers/staging/most/mostcore/mostcore.h ++++ b/drivers/staging/most/mostcore/mostcore.h +@@ -247,6 +247,7 @@ struct most_interface { + struct mbo *mbo); + int (*poison_channel)(struct most_interface *iface, int channel_idx); + void (*request_netinfo)(struct most_interface *iface, int channel_idx); ++ struct device *dev; + void *priv; + }; + +-- +2.13.0 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0076-MOST-dim2-Renesas-R-Car3-variant.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0076-MOST-dim2-Renesas-R-Car3-variant.patch new file mode 100644 index 0000000..5ab496b --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0076-MOST-dim2-Renesas-R-Car3-variant.patch @@ -0,0 +1,120 @@ +From d595053486568b5be30fda582becf9240d171c66 Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Mon, 25 Sep 2017 7:16:25 +0300 +Subject: [PATCH] MOST: dim2: Renesas R-Car3 variant + +- R-Car H3 has 8 FPSB +- remove not existing registers access + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +--- + drivers/staging/most/hdm-dim2/dim2_hal.c | 8 ++++---- + drivers/staging/most/hdm-dim2/dim2_hdm.c | 2 +- + drivers/staging/most/hdm-dim2/dim2_reg.h | 18 +++++++++--------- + 3 files changed, 14 insertions(+), 14 deletions(-) + +diff --git a/drivers/staging/most/hdm-dim2/dim2_hal.c b/drivers/staging/most/hdm-dim2/dim2_hal.c +index 0b9816c..231138c 100644 +--- a/drivers/staging/most/hdm-dim2/dim2_hal.c ++++ b/drivers/staging/most/hdm-dim2/dim2_hal.c +@@ -528,11 +528,11 @@ static void dim2_cleanup(void) + + /* clear status for all dma channels */ + dimcb_io_write(&g.dim2->ACSR0, 0xFFFFFFFF); +- dimcb_io_write(&g.dim2->ACSR1, 0xFFFFFFFF); ++// dimcb_io_write(&g.dim2->ACSR1, 0xFFFFFFFF); + + /* mask interrupts for all channels */ + dimcb_io_write(&g.dim2->ACMR0, 0); +- dimcb_io_write(&g.dim2->ACMR1, 0); ++// dimcb_io_write(&g.dim2->ACMR1, 0); + } + + static void dim2_initialize(bool enable_6pin, u8 mlb_clock) +@@ -548,7 +548,7 @@ static void dim2_initialize(bool enable_6pin, u8 mlb_clock) + + /* activate all HBI channels */ + dimcb_io_write(&g.dim2->HCMR0, 0xFFFFFFFF); +- dimcb_io_write(&g.dim2->HCMR1, 0xFFFFFFFF); ++// dimcb_io_write(&g.dim2->HCMR1, 0xFFFFFFFF); + + /* enable HBI */ + dimcb_io_write(&g.dim2->HCTL, bit_mask(HCTL_EN_BIT)); +@@ -778,7 +778,7 @@ static u8 init_ctrl_async(struct dim_channel *ch, u8 type, u8 is_tx, + void dim_service_mlb_int_irq(void) + { + dimcb_io_write(&g.dim2->MS0, 0); +- dimcb_io_write(&g.dim2->MS1, 0); ++// dimcb_io_write(&g.dim2->MS1, 0); + } + + u16 dim_norm_ctrl_async_buffer_size(u16 buf_size) +diff --git a/drivers/staging/most/hdm-dim2/dim2_hdm.c b/drivers/staging/most/hdm-dim2/dim2_hdm.c +index 195efff..84f56c9 100644 +--- a/drivers/staging/most/hdm-dim2/dim2_hdm.c ++++ b/drivers/staging/most/hdm-dim2/dim2_hdm.c +@@ -54,7 +54,7 @@ + * The values 0, 1, 2, 3, 4, 5, 6 represent corresponding number of frames per + * sub-buffer 1, 2, 4, 8, 16, 32, 64. + */ +-static u8 fcnt = 4; /* (1 << fcnt) frames per subbuffer */ ++static u8 fcnt = 3; /* (1 << fcnt) frames per subbuffer */ + module_param(fcnt, byte, 0); + MODULE_PARM_DESC(fcnt, "Num of frames per sub-buffer for sync channels as a power of 2"); + +diff --git a/drivers/staging/most/hdm-dim2/dim2_reg.h b/drivers/staging/most/hdm-dim2/dim2_reg.h +index 01fe499..54e9b6e 100644 +--- a/drivers/staging/most/hdm-dim2/dim2_reg.h ++++ b/drivers/staging/most/hdm-dim2/dim2_reg.h +@@ -20,28 +20,28 @@ + struct dim2_regs { + /* 0x00 */ u32 MLBC0; + /* 0x01 */ u32 rsvd0[1]; +- /* 0x02 */ u32 MLBPC0; ++ /* 0x02 */ u32 MLBPC0; /* no at R-Car3 */ + /* 0x03 */ u32 MS0; + /* 0x04 */ u32 rsvd1[1]; +- /* 0x05 */ u32 MS1; ++ /* 0x05 */ u32 MS1; /* no at R-Car3 */ + /* 0x06 */ u32 rsvd2[2]; + /* 0x08 */ u32 MSS; + /* 0x09 */ u32 MSD; + /* 0x0A */ u32 rsvd3[1]; + /* 0x0B */ u32 MIEN; + /* 0x0C */ u32 rsvd4[1]; +- /* 0x0D */ u32 MLBPC2; +- /* 0x0E */ u32 MLBPC1; ++ /* 0x0D */ u32 MLBPC2; /* no at R-Car3 */ ++ /* 0x0E */ u32 MLBPC1; /* no at R-Car3 */ + /* 0x0F */ u32 MLBC1; + /* 0x10 */ u32 rsvd5[0x10]; + /* 0x20 */ u32 HCTL; + /* 0x21 */ u32 rsvd6[1]; + /* 0x22 */ u32 HCMR0; +- /* 0x23 */ u32 HCMR1; ++ /* 0x23 */ u32 HCMR1; /* no at R-Car3 */ + /* 0x24 */ u32 HCER0; +- /* 0x25 */ u32 HCER1; ++ /* 0x25 */ u32 HCER1; /* no at R-Car3 */ + /* 0x26 */ u32 HCBR0; +- /* 0x27 */ u32 HCBR1; ++ /* 0x27 */ u32 HCBR1; /* no at R-Car3 */ + /* 0x28 */ u32 rsvd7[8]; + /* 0x30 */ u32 MDAT0; + /* 0x31 */ u32 MDAT1; +@@ -57,9 +57,9 @@ struct dim2_regs { + /* 0xF0 */ u32 ACTL; + /* 0xF1 */ u32 rsvd9[3]; + /* 0xF4 */ u32 ACSR0; +- /* 0xF5 */ u32 ACSR1; ++ /* 0xF5 */ u32 ACSR1; /* no at R-Car3 */ + /* 0xF6 */ u32 ACMR0; +- /* 0xF7 */ u32 ACMR1; ++ /* 0xF7 */ u32 ACMR1; /* no at R-Car3 */ + }; + + #define DIM2_MASK(n) (~((~(u32)0) << (n))) +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0077-MOST-dim2-add-timeouts.patch b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0077-MOST-dim2-add-timeouts.patch new file mode 100644 index 0000000..d47c5c6 --- /dev/null +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0077-MOST-dim2-add-timeouts.patch @@ -0,0 +1,46 @@ +From f02aa2831e169a9f17eebb2784db4c95944ba927 Mon Sep 17 00:00:00 2001 +From: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Date: Mon, 25 Sep 2017 07:13:29 +0300 +Subject: [PATCH] MOST: dim2: add timeouts + +Get rid from loop hang if device not functional + +Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +--- + drivers/staging/most/hdm-dim2/dim2_hal.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/most/hdm-dim2/dim2_hal.c b/drivers/staging/most/hdm-dim2/dim2_hal.c +index 231138c..ee0e307 100644 +--- a/drivers/staging/most/hdm-dim2/dim2_hal.c ++++ b/drivers/staging/most/hdm-dim2/dim2_hal.c +@@ -18,6 +18,7 @@ + #include "dim2_errors.h" + #include "dim2_reg.h" + #include <linux/stddef.h> ++#include <linux/delay.h> + + /* + * Size factor for isochronous DBR buffer. +@@ -148,11 +149,16 @@ static void free_dbr(int offs, int size) + + static void dim2_transfer_madr(u32 val) + { ++ int timeout = 1000; + dimcb_io_write(&g.dim2->MADR, val); + + /* wait for transfer completion */ +- while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1) ++ while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1) { ++ if (--timeout == 0) ++ break; ++ udelay(1); + continue; ++ } + + dimcb_io_write(&g.dim2->MCTL, 0); /* clear transfer complete */ + } +-- +1.9.1 + diff --git a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend index 1bb0580..c65e8ad 100644 --- a/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend +++ b/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas_4.9.bbappend @@ -43,6 +43,9 @@ SRC_URI_append = " \ file://0041-arm64-dts-renesas-ulcb-enlarge-cma-region.patch \ file://0042-arm64-dts-renesas-r8a7795-es1-h3ulcb-disable-eMMC.patch \ file://0043-arm64-dts-renesas-ulcb-use-versaclock-for-du-rgb-and-lvds.patch \ + file://0044-pinctrl-r8a779x-add-mlb-pinmux.patch \ + file://0045-clk-r8a779x-add-mlp-clock.patch \ + file://0046-arm64-dts-renesas-r8a779x-add-mlp-nodes.patch \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE1", "1", " file://0050-arm64-dts-Gen3-view-boards-TYPE1-first-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_SECOND4_TYPE1", "1", " file://0051-arm64-dts-Gen3-view-boards-TYPE1-second-4-cameras.patch", "", d)} \ ${@base_conditional("LVDSCAMERA_FIRST4_TYPE2", "1", " file://0052-arm64-dts-Gen3-view-boards-TYPE2-first-4-cameras.patch", "", d)} \ @@ -55,6 +58,11 @@ SRC_URI_append = " \ file://0070-clk-clk-5p49x-add-5P49V5925-chip.patch \ file://0071-ASoC-add-dummy-device-for-WL18xx-PCM-audio.patch \ file://0072-usb-hub-disable-autosuspend-for-SMSC-hubs.patch \ + file://0073-MOST-dim2-add-device-tree-support.patch \ + file://0074-MOST-dim2-add-R-Car3-related-initialization.patch \ + file://0075-MOST-core-fix-memory-allocation-at-arm64.patch \ + file://0076-MOST-dim2-Renesas-R-Car3-variant.patch \ + file://0077-MOST-dim2-add-timeouts.patch \ " SRC_URI_append_h3ulcb = " file://ulcb.cfg" |