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authorYannick GICQUEL <yannick.gicquel@iot.bzh>2015-09-29 11:53:58 +0200
committerYannick GICQUEL <yannick.gicquel@iot.bzh>2015-09-29 11:53:58 +0200
commit37733120e9fa485574cbecfeb93e4d6d5cd6f04f (patch)
tree76b7f52dd1e427e1a03e144b3ce2584d03784c76 /meta-rcar-gen2/recipes-kernel/linux/linux-renesas
parentbf30de66badcac7ef82d3758aa44c116ee791a28 (diff)
porter: kernel: disable interlace mode
This change default configuration of rcar-du driver to avoid flickering on HDMI plug. This may be related to misalignment between ADV7511 and the SoC (tbc). This issue was observed on two different screen models. Change-Id: I161b9d659c14de7fa5b0ce4b55fb5cf968c11e3f Signed-off-by: Yannick GICQUEL <yannick.gicquel@iot.bzh>
Diffstat (limited to 'meta-rcar-gen2/recipes-kernel/linux/linux-renesas')
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-drm-rcar-du-r8a7791-disable-interlace-mode.patch26
1 files changed, 26 insertions, 0 deletions
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-drm-rcar-du-r8a7791-disable-interlace-mode.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-drm-rcar-du-r8a7791-disable-interlace-mode.patch
new file mode 100644
index 0000000..012bc94
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-drm-rcar-du-r8a7791-disable-interlace-mode.patch
@@ -0,0 +1,26 @@
+From 9fba622435c36541df97c60b2d7ade25039508de Mon Sep 17 00:00:00 2001
+From: Yannick GICQUEL <yannick.gicquel@iot.bzh>
+Date: Tue, 29 Sep 2015 09:02:55 +0200
+Subject: [PATCH] drm: rcar-du: r8a7791: disable interlace mode
+
+Signed-off-by: Yannick GICQUEL <yannick.gicquel@iot.bzh>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+index c6b9292..5512c7a 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -443,7 +443,7 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
+ .drgbs_bit = 1,
+ .max_xres = 1920,
+ .max_yres = 1080,
+- .interlace = true,
++ .interlace = false,
+ .lvds0_crtc = BIT(0),
+ .lvds1_crtc = 0,
+ .vspd_crtc = BIT(0) | BIT(1),
+--
+1.9.1
+